1/* 2 * Copyright Linux Kernel Team 3 * 4 * SPDX-License-Identifier: GPL-2.0-only 5 * 6 * This file is derived from an intermediate build stage of the 7 * Linux kernel. The licenses of all input files to this process 8 * are compatible with GPL-2.0-only. 9 */ 10 11/dts-v1/; 12 13/ { 14 interrupt-parent = < 0x01 >; 15 #address-cells = < 0x01 >; 16 #size-cells = < 0x01 >; 17 compatible = "hardkernel,odroid-xu4\0samsung,exynos5800\0samsung,exynos5"; 18 model = "Hardkernel Odroid XU4"; 19 20 aliases { 21 i2c0 = "/soc/i2c@12c60000"; 22 i2c1 = "/soc/i2c@12c70000"; 23 i2c2 = "/soc/i2c@12c80000"; 24 i2c3 = "/soc/i2c@12c90000"; 25 serial0 = "/soc/serial@12c00000"; 26 serial1 = "/soc/serial@12c10000"; 27 serial2 = "/soc/serial@12c20000"; 28 serial3 = "/soc/serial@12c30000"; 29 i2c4 = "/soc/i2c@12ca0000"; 30 i2c5 = "/soc/i2c@12cb0000"; 31 i2c6 = "/soc/i2c@12cc0000"; 32 i2c7 = "/soc/i2c@12cd0000"; 33 usbdrdphy0 = "/soc/phy@12100000"; 34 usbdrdphy1 = "/soc/phy@12500000"; 35 mshc0 = "/soc/mmc@12200000"; 36 mshc1 = "/soc/mmc@12210000"; 37 mshc2 = "/soc/mmc@12220000"; 38 pinctrl0 = "/soc/pinctrl@13400000"; 39 pinctrl1 = "/soc/pinctrl@13410000"; 40 pinctrl2 = "/soc/pinctrl@14000000"; 41 pinctrl3 = "/soc/pinctrl@14010000"; 42 pinctrl4 = "/soc/pinctrl@3860000"; 43 i2c8 = "/soc/i2c@12e00000"; 44 i2c9 = "/soc/i2c@12e10000"; 45 i2c10 = "/soc/i2c@12e20000"; 46 gsc0 = "/soc/video-scaler@13e00000"; 47 gsc1 = "/soc/video-scaler@13e10000"; 48 spi0 = "/soc/spi@12d20000"; 49 spi1 = "/soc/spi@12d30000"; 50 spi2 = "/soc/spi@12d40000"; 51 }; 52 53 soc { 54 compatible = "simple-bus"; 55 #address-cells = < 0x01 >; 56 #size-cells = < 0x01 >; 57 ranges; 58 59 chipid@10000000 { 60 compatible = "samsung,exynos4210-chipid"; 61 reg = < 0x10000000 0x100 >; 62 }; 63 64 memory-controller@12250000 { 65 compatible = "samsung,exynos4210-srom"; 66 reg = < 0x12250000 0x14 >; 67 }; 68 69 interrupt-controller@10440000 { 70 compatible = "samsung,exynos4210-combiner"; 71 #interrupt-cells = < 0x02 >; 72 interrupt-controller; 73 samsung,combiner-nr = < 0x20 >; 74 reg = < 0x10440000 0x1000 >; 75 interrupts = < 0x00 0x00 0x04 0x00 0x01 0x04 0x00 0x02 0x04 0x00 0x03 0x04 0x00 0x04 0x04 0x00 0x05 0x04 0x00 0x06 0x04 0x00 0x07 0x04 0x00 0x08 0x04 0x00 0x09 0x04 0x00 0x0a 0x04 0x00 0x0b 0x04 0x00 0x0c 0x04 0x00 0x0d 0x04 0x00 0x0e 0x04 0x00 0x0f 0x04 0x00 0x10 0x04 0x00 0x11 0x04 0x00 0x12 0x04 0x00 0x13 0x04 0x00 0x14 0x04 0x00 0x15 0x04 0x00 0x16 0x04 0x00 0x17 0x04 0x00 0x18 0x04 0x00 0x19 0x04 0x00 0x1a 0x04 0x00 0x1b 0x04 0x00 0x1c 0x04 0x00 0x1d 0x04 0x00 0x1e 0x04 0x00 0x1f 0x04 >; 76 phandle = < 0x0e >; 77 }; 78 79 interrupt-controller@10481000 { 80 compatible = "arm,gic-400\0arm,cortex-a15-gic\0arm,cortex-a9-gic"; 81 #interrupt-cells = < 0x03 >; 82 interrupt-controller; 83 reg = < 0x10481000 0x1000 0x10482000 0x2000 0x10484000 0x2000 0x10486000 0x2000 >; 84 interrupts = < 0x01 0x09 0xf04 >; 85 phandle = < 0x01 >; 86 }; 87 88 syscon@10050000 { 89 compatible = "samsung,exynos5-sysreg\0syscon"; 90 reg = < 0x10050000 0x5000 >; 91 phandle = < 0x05 >; 92 }; 93 94 serial@12c00000 { 95 compatible = "samsung,exynos4210-uart"; 96 reg = < 0x12c00000 0x100 >; 97 interrupts = < 0x00 0x33 0x04 >; 98 clocks = < 0x02 0x101 0x02 0x80 >; 99 clock-names = "uart\0clk_uart_baud0"; 100 dmas = < 0x03 0x0d 0x03 0x0e >; 101 dma-names = "rx\0tx"; 102 }; 103 104 serial@12c10000 { 105 compatible = "samsung,exynos4210-uart"; 106 reg = < 0x12c10000 0x100 >; 107 interrupts = < 0x00 0x34 0x04 >; 108 clocks = < 0x02 0x102 0x02 0x81 >; 109 clock-names = "uart\0clk_uart_baud0"; 110 dmas = < 0x04 0x0f 0x04 0x10 >; 111 dma-names = "rx\0tx"; 112 }; 113 114 serial@12c20000 { 115 compatible = "samsung,exynos4210-uart"; 116 reg = < 0x12c20000 0x100 >; 117 interrupts = < 0x00 0x35 0x04 >; 118 clocks = < 0x02 0x103 0x02 0x82 >; 119 clock-names = "uart\0clk_uart_baud0"; 120 dmas = < 0x03 0x0f 0x03 0x10 >; 121 dma-names = "rx\0tx"; 122 }; 123 124 serial@12c30000 { 125 compatible = "samsung,exynos4210-uart"; 126 reg = < 0x12c30000 0x100 >; 127 interrupts = < 0x00 0x36 0x04 >; 128 clocks = < 0x02 0x104 0x02 0x83 >; 129 clock-names = "uart\0clk_uart_baud0"; 130 dmas = < 0x04 0x11 0x04 0x12 >; 131 dma-names = "rx\0tx"; 132 }; 133 134 i2c@12c60000 { 135 compatible = "samsung,s3c2440-i2c"; 136 reg = < 0x12c60000 0x100 >; 137 interrupts = < 0x00 0x38 0x04 >; 138 #address-cells = < 0x01 >; 139 #size-cells = < 0x00 >; 140 samsung,sysreg-phandle = < 0x05 >; 141 status = "disabled"; 142 clocks = < 0x02 0x105 >; 143 clock-names = "i2c"; 144 pinctrl-names = "default"; 145 pinctrl-0 = < 0x06 >; 146 }; 147 148 i2c@12c70000 { 149 compatible = "samsung,s3c2440-i2c"; 150 reg = < 0x12c70000 0x100 >; 151 interrupts = < 0x00 0x39 0x04 >; 152 #address-cells = < 0x01 >; 153 #size-cells = < 0x00 >; 154 samsung,sysreg-phandle = < 0x05 >; 155 status = "disabled"; 156 clocks = < 0x02 0x106 >; 157 clock-names = "i2c"; 158 pinctrl-names = "default"; 159 pinctrl-0 = < 0x07 >; 160 }; 161 162 i2c@12c80000 { 163 compatible = "samsung,s3c2440-i2c"; 164 reg = < 0x12c80000 0x100 >; 165 interrupts = < 0x00 0x3a 0x04 >; 166 #address-cells = < 0x01 >; 167 #size-cells = < 0x00 >; 168 samsung,sysreg-phandle = < 0x05 >; 169 status = "okay"; 170 clocks = < 0x02 0x107 >; 171 clock-names = "i2c"; 172 pinctrl-names = "default"; 173 pinctrl-0 = < 0x08 >; 174 samsung,i2c-sda-delay = < 0x64 >; 175 samsung,i2c-max-bus-freq = < 0x101d0 >; 176 phandle = < 0x4c >; 177 }; 178 179 i2c@12c90000 { 180 compatible = "samsung,s3c2440-i2c"; 181 reg = < 0x12c90000 0x100 >; 182 interrupts = < 0x00 0x3b 0x04 >; 183 #address-cells = < 0x01 >; 184 #size-cells = < 0x00 >; 185 samsung,sysreg-phandle = < 0x05 >; 186 status = "disabled"; 187 clocks = < 0x02 0x108 >; 188 clock-names = "i2c"; 189 pinctrl-names = "default"; 190 pinctrl-0 = < 0x09 >; 191 }; 192 193 pwm@12dd0000 { 194 compatible = "samsung,exynos4210-pwm"; 195 reg = < 0x12dd0000 0x100 >; 196 interrupts = < 0x00 0x24 0x04 0x00 0x25 0x04 0x00 0x26 0x04 0x00 0x27 0x04 0x00 0x28 0x04 >; 197 samsung,pwm-outputs = < 0x00 0x02 >; 198 #pwm-cells = < 0x03 >; 199 clocks = < 0x02 0x117 >; 200 clock-names = "timers"; 201 pinctrl-0 = < 0x0a 0x0b >; 202 pinctrl-names = "default"; 203 status = "okay"; 204 phandle = < 0x99 >; 205 }; 206 207 rtc@101e0000 { 208 compatible = "samsung,s3c6410-rtc"; 209 reg = < 0x101e0000 0x100 >; 210 interrupts = < 0x00 0x2b 0x04 0x00 0x2c 0x04 >; 211 status = "okay"; 212 clocks = < 0x02 0x13d 0x0c 0x00 >; 213 clock-names = "rtc\0rtc_src"; 214 interrupt-parent = < 0x0d >; 215 }; 216 217 fimd@14400000 { 218 compatible = "samsung,exynos5420-fimd"; 219 interrupt-parent = < 0x0e >; 220 reg = < 0x14400000 0x40000 >; 221 interrupt-names = "fifo\0vsync\0lcd_sys"; 222 interrupts = < 0x12 0x04 0x12 0x05 0x12 0x06 >; 223 samsung,sysreg = < 0x05 >; 224 status = "disabled"; 225 clocks = < 0x02 0x93 0x02 0x1a5 >; 226 clock-names = "sclk_fimd\0fimd"; 227 power-domains = < 0x0f >; 228 iommus = < 0x10 0x11 >; 229 iommu-names = "m0\0m1"; 230 }; 231 232 dp-controller@145b0000 { 233 compatible = "samsung,exynos5-dp"; 234 reg = < 0x145b0000 0x1000 >; 235 interrupts = < 0x0a 0x03 >; 236 interrupt-parent = < 0x0e >; 237 status = "disabled"; 238 clocks = < 0x02 0x19c >; 239 clock-names = "dp"; 240 phys = < 0x12 >; 241 phy-names = "dp"; 242 power-domains = < 0x0f >; 243 }; 244 245 sss@10830000 { 246 compatible = "samsung,exynos4210-secss"; 247 reg = < 0x10830000 0x300 >; 248 interrupts = < 0x00 0x70 0x04 >; 249 clocks = < 0x02 0x1d7 >; 250 clock-names = "secss"; 251 }; 252 253 rng@10830400 { 254 compatible = "samsung,exynos5250-prng"; 255 reg = < 0x10830400 0x200 >; 256 clocks = < 0x02 0x1d7 >; 257 clock-names = "secss"; 258 }; 259 260 rng@10830600 { 261 compatible = "samsung,exynos5250-trng"; 262 reg = < 0x10830600 0x100 >; 263 clocks = < 0x02 0x1d7 >; 264 clock-names = "secss"; 265 }; 266 267 g2d@10850000 { 268 compatible = "samsung,exynos5250-g2d"; 269 reg = < 0x10850000 0x1000 >; 270 interrupts = < 0x00 0x5b 0x04 >; 271 status = "okay"; 272 iommus = < 0x13 0x14 >; 273 clocks = < 0x02 0x1e1 >; 274 clock-names = "fimg2d"; 275 }; 276 277 arm-a7-pmu { 278 compatible = "arm,cortex-a7-pmu"; 279 interrupt-parent = < 0x01 >; 280 interrupts = < 0x00 0xa0 0x04 0x00 0xa1 0x04 0x00 0xa2 0x04 0x00 0xa3 0x04 >; 281 status = "okay"; 282 interrupt-affinity = < 0x15 0x16 0x17 0x18 >; 283 }; 284 285 arm-a15-pmu { 286 compatible = "arm,cortex-a15-pmu"; 287 interrupt-parent = < 0x0e >; 288 interrupts = < 0x01 0x02 0x07 0x00 0x10 0x06 0x13 0x02 >; 289 status = "okay"; 290 interrupt-affinity = < 0x19 0x1a 0x1b 0x1c >; 291 }; 292 293 sysram@2020000 { 294 compatible = "mmio-sram"; 295 reg = < 0x2020000 0x54000 >; 296 #address-cells = < 0x01 >; 297 #size-cells = < 0x01 >; 298 ranges = < 0x00 0x2020000 0x54000 >; 299 300 smp-sysram@0 { 301 compatible = "samsung,exynos4210-sysram"; 302 reg = < 0x00 0x1000 >; 303 }; 304 305 smp-sysram@53000 { 306 compatible = "samsung,exynos4210-sysram-ns"; 307 reg = < 0x53000 0x1000 >; 308 }; 309 }; 310 311 mct@101c0000 { 312 compatible = "samsung,exynos4210-mct"; 313 reg = < 0x101c0000 0xb00 >; 314 interrupt-parent = < 0x1d >; 315 interrupts = < 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b >; 316 clocks = < 0x02 0x01 0x02 0x13b >; 317 clock-names = "fin_pll\0mct"; 318 319 mct-map { 320 #interrupt-cells = < 0x01 >; 321 #address-cells = < 0x00 >; 322 #size-cells = < 0x00 >; 323 interrupt-map = < 0x00 0x0e 0x17 0x03 0x01 0x0e 0x17 0x04 0x02 0x0e 0x19 0x02 0x03 0x0e 0x19 0x03 0x04 0x01 0x00 0x78 0x04 0x05 0x01 0x00 0x79 0x04 0x06 0x01 0x00 0x7a 0x04 0x07 0x01 0x00 0x7b 0x04 0x08 0x01 0x00 0x80 0x04 0x09 0x01 0x00 0x81 0x04 0x0a 0x01 0x00 0x82 0x04 0x0b 0x01 0x00 0x83 0x04 >; 324 phandle = < 0x1d >; 325 }; 326 }; 327 328 watchdog@101d0000 { 329 compatible = "samsung,exynos5420-wdt"; 330 reg = < 0x101d0000 0x100 >; 331 interrupts = < 0x00 0x2a 0x04 >; 332 clocks = < 0x02 0x13c >; 333 clock-names = "watchdog"; 334 samsung,syscon-phandle = < 0x0d >; 335 }; 336 337 i2c@12ca0000 { 338 compatible = "samsung,exynos5250-hsi2c"; 339 reg = < 0x12ca0000 0x1000 >; 340 interrupts = < 0x00 0x3c 0x04 >; 341 #address-cells = < 0x01 >; 342 #size-cells = < 0x00 >; 343 status = "okay"; 344 clocks = < 0x02 0x109 >; 345 clock-names = "hsi2c"; 346 pinctrl-names = "default"; 347 pinctrl-0 = < 0x1e >; 348 349 s2mps11_pmic@66 { 350 compatible = "samsung,s2mps11-pmic"; 351 reg = < 0x66 >; 352 samsung,s2mps11-acokb-ground; 353 interrupt-parent = < 0x1f >; 354 interrupts = < 0x04 0x02 >; 355 pinctrl-names = "default"; 356 pinctrl-0 = < 0x20 >; 357 358 clocks { 359 #clock-cells = < 0x01 >; 360 clock-output-names = "s2mps11_ap\0s2mps11_cp\0s2mps11_bt"; 361 phandle = < 0x0c >; 362 }; 363 364 regulators { 365 366 LDO1 { 367 regulator-name = "vdd_ldo1"; 368 regulator-min-microvolt = < 0xf4240 >; 369 regulator-max-microvolt = < 0xf4240 >; 370 regulator-always-on; 371 }; 372 373 LDO2 { 374 regulator-name = "vdd_ldo2"; 375 regulator-min-microvolt = < 0x1b7740 >; 376 regulator-max-microvolt = < 0x1b7740 >; 377 regulator-always-on; 378 }; 379 380 LDO3 { 381 regulator-name = "vddq_mmc0"; 382 regulator-min-microvolt = < 0x1b7740 >; 383 regulator-max-microvolt = < 0x1b7740 >; 384 phandle = < 0x37 >; 385 }; 386 387 LDO4 { 388 regulator-name = "vdd_adc"; 389 regulator-min-microvolt = < 0x1b7740 >; 390 regulator-max-microvolt = < 0x1b7740 >; 391 phandle = < 0x47 >; 392 }; 393 394 LDO5 { 395 regulator-name = "vdd_ldo5"; 396 regulator-min-microvolt = < 0x1b7740 >; 397 regulator-max-microvolt = < 0x1b7740 >; 398 regulator-always-on; 399 }; 400 401 LDO6 { 402 regulator-name = "vdd_ldo6"; 403 regulator-min-microvolt = < 0xf4240 >; 404 regulator-max-microvolt = < 0xf4240 >; 405 regulator-always-on; 406 phandle = < 0x50 >; 407 }; 408 409 LDO7 { 410 regulator-name = "vdd_ldo7"; 411 regulator-min-microvolt = < 0x1b7740 >; 412 regulator-max-microvolt = < 0x1b7740 >; 413 regulator-always-on; 414 phandle = < 0x4f >; 415 }; 416 417 LDO8 { 418 regulator-name = "vdd_ldo8"; 419 regulator-min-microvolt = < 0x1b7740 >; 420 regulator-max-microvolt = < 0x1b7740 >; 421 regulator-always-on; 422 }; 423 424 LDO9 { 425 regulator-name = "vdd_ldo9"; 426 regulator-min-microvolt = < 0x2dc6c0 >; 427 regulator-max-microvolt = < 0x2dc6c0 >; 428 regulator-always-on; 429 phandle = < 0x24 >; 430 }; 431 432 LDO10 { 433 regulator-name = "vdd_ldo10"; 434 regulator-min-microvolt = < 0x1b7740 >; 435 regulator-max-microvolt = < 0x1b7740 >; 436 regulator-always-on; 437 }; 438 439 LDO11 { 440 regulator-name = "vdd_ldo11"; 441 regulator-min-microvolt = < 0xf4240 >; 442 regulator-max-microvolt = < 0xf4240 >; 443 regulator-always-on; 444 phandle = < 0x25 >; 445 }; 446 447 LDO12 { 448 regulator-name = "vdd_ldo12"; 449 regulator-min-microvolt = < 0xc3500 >; 450 regulator-max-microvolt = < 0x243d58 >; 451 }; 452 453 LDO13 { 454 regulator-name = "vddq_mmc2"; 455 regulator-min-microvolt = < 0x2ab980 >; 456 regulator-max-microvolt = < 0x2ab980 >; 457 phandle = < 0x3e >; 458 }; 459 460 LDO14 { 461 regulator-name = "vdd_ldo14"; 462 regulator-min-microvolt = < 0xc3500 >; 463 regulator-max-microvolt = < 0x3c45b0 >; 464 }; 465 466 LDO15 { 467 regulator-name = "vdd_ldo15"; 468 regulator-min-microvolt = < 0x325aa0 >; 469 regulator-max-microvolt = < 0x325aa0 >; 470 regulator-always-on; 471 }; 472 473 LDO16 { 474 regulator-name = "vdd_ldo16"; 475 regulator-min-microvolt = < 0xc3500 >; 476 regulator-max-microvolt = < 0x3c45b0 >; 477 }; 478 479 LDO17 { 480 regulator-name = "vdd_ldo17"; 481 regulator-min-microvolt = < 0x325aa0 >; 482 regulator-max-microvolt = < 0x325aa0 >; 483 regulator-always-on; 484 }; 485 486 LDO18 { 487 regulator-name = "vdd_emmc_1V8"; 488 regulator-min-microvolt = < 0x1b7740 >; 489 regulator-max-microvolt = < 0x1b7740 >; 490 phandle = < 0x36 >; 491 }; 492 493 LDO19 { 494 regulator-name = "vdd_sd"; 495 regulator-min-microvolt = < 0x2ab980 >; 496 regulator-max-microvolt = < 0x2ab980 >; 497 phandle = < 0x3d >; 498 }; 499 500 LDO20 { 501 regulator-name = "vdd_ldo20"; 502 regulator-min-microvolt = < 0xc3500 >; 503 regulator-max-microvolt = < 0x3c45b0 >; 504 }; 505 506 LDO21 { 507 regulator-name = "vdd_ldo21"; 508 regulator-min-microvolt = < 0xc3500 >; 509 regulator-max-microvolt = < 0x3c45b0 >; 510 }; 511 512 LDO22 { 513 regulator-name = "vdd_ldo22"; 514 regulator-min-microvolt = < 0xc3500 >; 515 regulator-max-microvolt = < 0x243d58 >; 516 }; 517 518 LDO23 { 519 regulator-name = "vdd_mifs"; 520 regulator-min-microvolt = < 0x10c8e0 >; 521 regulator-max-microvolt = < 0x10c8e0 >; 522 regulator-always-on; 523 }; 524 525 LDO24 { 526 regulator-name = "vdd_ldo24"; 527 regulator-min-microvolt = < 0xc3500 >; 528 regulator-max-microvolt = < 0x3c45b0 >; 529 }; 530 531 LDO25 { 532 regulator-name = "vdd_ldo25"; 533 regulator-min-microvolt = < 0xc3500 >; 534 regulator-max-microvolt = < 0x3c45b0 >; 535 }; 536 537 LDO26 { 538 regulator-name = "vdd_ldo26"; 539 regulator-min-microvolt = < 0x2dc6c0 >; 540 regulator-max-microvolt = < 0x2dc6c0 >; 541 regulator-always-on; 542 }; 543 544 LDO27 { 545 regulator-name = "vdd_g3ds"; 546 regulator-min-microvolt = < 0xf4240 >; 547 regulator-max-microvolt = < 0xf4240 >; 548 regulator-always-on; 549 }; 550 551 LDO28 { 552 regulator-name = "vdd_ldo28"; 553 regulator-min-microvolt = < 0xc3500 >; 554 regulator-max-microvolt = < 0x3c45b0 >; 555 }; 556 557 LDO29 { 558 regulator-name = "vdd_ldo29"; 559 regulator-min-microvolt = < 0xc3500 >; 560 regulator-max-microvolt = < 0x3c45b0 >; 561 }; 562 563 LDO30 { 564 regulator-name = "vdd_ldo30"; 565 regulator-min-microvolt = < 0xc3500 >; 566 regulator-max-microvolt = < 0x3c45b0 >; 567 }; 568 569 LDO31 { 570 regulator-name = "vdd_ldo31"; 571 regulator-min-microvolt = < 0xc3500 >; 572 regulator-max-microvolt = < 0x3c45b0 >; 573 }; 574 575 LDO32 { 576 regulator-name = "vdd_ldo32"; 577 regulator-min-microvolt = < 0xc3500 >; 578 regulator-max-microvolt = < 0x3c45b0 >; 579 }; 580 581 LDO33 { 582 regulator-name = "vdd_ldo33"; 583 regulator-min-microvolt = < 0xc3500 >; 584 regulator-max-microvolt = < 0x3c45b0 >; 585 }; 586 587 LDO34 { 588 regulator-name = "vdd_ldo34"; 589 regulator-min-microvolt = < 0xc3500 >; 590 regulator-max-microvolt = < 0x3c45b0 >; 591 }; 592 593 LDO35 { 594 regulator-name = "vdd_ldo35"; 595 regulator-min-microvolt = < 0xc3500 >; 596 regulator-max-microvolt = < 0x243d58 >; 597 }; 598 599 LDO36 { 600 regulator-name = "vdd_ldo36"; 601 regulator-min-microvolt = < 0xc3500 >; 602 regulator-max-microvolt = < 0x3c45b0 >; 603 }; 604 605 LDO37 { 606 regulator-name = "vdd_ldo37"; 607 regulator-min-microvolt = < 0xc3500 >; 608 regulator-max-microvolt = < 0x3c45b0 >; 609 }; 610 611 LDO38 { 612 regulator-name = "vdd_ldo38"; 613 regulator-min-microvolt = < 0xc3500 >; 614 regulator-max-microvolt = < 0x3c45b0 >; 615 }; 616 617 BUCK1 { 618 regulator-name = "vdd_mif"; 619 regulator-min-microvolt = < 0xc3500 >; 620 regulator-max-microvolt = < 0x13d620 >; 621 regulator-always-on; 622 regulator-boot-on; 623 }; 624 625 BUCK2 { 626 regulator-name = "vdd_arm"; 627 regulator-min-microvolt = < 0xc3500 >; 628 regulator-max-microvolt = < 0x16e360 >; 629 regulator-always-on; 630 regulator-boot-on; 631 phandle = < 0x95 >; 632 }; 633 634 BUCK3 { 635 regulator-name = "vdd_int"; 636 regulator-min-microvolt = < 0xc3500 >; 637 regulator-max-microvolt = < 0x155cc0 >; 638 regulator-always-on; 639 regulator-boot-on; 640 phandle = < 0x66 >; 641 }; 642 643 BUCK4 { 644 regulator-name = "vdd_g3d"; 645 regulator-min-microvolt = < 0xc3500 >; 646 regulator-max-microvolt = < 0x155cc0 >; 647 regulator-always-on; 648 regulator-boot-on; 649 }; 650 651 BUCK5 { 652 regulator-name = "vdd_mem"; 653 regulator-min-microvolt = < 0xc3500 >; 654 regulator-max-microvolt = < 0x155cc0 >; 655 regulator-always-on; 656 regulator-boot-on; 657 }; 658 659 BUCK6 { 660 regulator-name = "vdd_kfc"; 661 regulator-min-microvolt = < 0xc3500 >; 662 regulator-max-microvolt = < 0x16e360 >; 663 regulator-always-on; 664 regulator-boot-on; 665 phandle = < 0x92 >; 666 }; 667 668 BUCK7 { 669 regulator-name = "vdd_1.0v_ldo"; 670 regulator-min-microvolt = < 0xc3500 >; 671 regulator-max-microvolt = < 0x16e360 >; 672 regulator-always-on; 673 regulator-boot-on; 674 }; 675 676 BUCK8 { 677 regulator-name = "vdd_1.8v_ldo"; 678 regulator-min-microvolt = < 0xc3500 >; 679 regulator-max-microvolt = < 0x16e360 >; 680 regulator-always-on; 681 regulator-boot-on; 682 }; 683 684 BUCK9 { 685 regulator-name = "vdd_2.8v_ldo"; 686 regulator-min-microvolt = < 0x2dc6c0 >; 687 regulator-max-microvolt = < 0x393870 >; 688 regulator-always-on; 689 regulator-boot-on; 690 }; 691 692 BUCK10 { 693 regulator-name = "vdd_vmem"; 694 regulator-min-microvolt = < 0x2b7cd0 >; 695 regulator-max-microvolt = < 0x2b7cd0 >; 696 regulator-always-on; 697 regulator-boot-on; 698 }; 699 }; 700 }; 701 }; 702 703 i2c@12cb0000 { 704 compatible = "samsung,exynos5250-hsi2c"; 705 reg = < 0x12cb0000 0x1000 >; 706 interrupts = < 0x00 0x3d 0x04 >; 707 #address-cells = < 0x01 >; 708 #size-cells = < 0x00 >; 709 status = "disabled"; 710 clocks = < 0x02 0x10a >; 711 clock-names = "hsi2c"; 712 pinctrl-names = "default"; 713 pinctrl-0 = < 0x21 >; 714 }; 715 716 i2c@12cc0000 { 717 compatible = "samsung,exynos5250-hsi2c"; 718 reg = < 0x12cc0000 0x1000 >; 719 interrupts = < 0x00 0x3e 0x04 >; 720 #address-cells = < 0x01 >; 721 #size-cells = < 0x00 >; 722 status = "disabled"; 723 clocks = < 0x02 0x10b >; 724 clock-names = "hsi2c"; 725 pinctrl-names = "default"; 726 pinctrl-0 = < 0x22 >; 727 }; 728 729 i2c@12cd0000 { 730 compatible = "samsung,exynos5250-hsi2c"; 731 reg = < 0x12cd0000 0x1000 >; 732 interrupts = < 0x00 0x3f 0x04 >; 733 #address-cells = < 0x01 >; 734 #size-cells = < 0x00 >; 735 status = "disabled"; 736 clocks = < 0x02 0x10c >; 737 clock-names = "hsi2c"; 738 pinctrl-names = "default"; 739 pinctrl-0 = < 0x23 >; 740 }; 741 742 usb3-0 { 743 compatible = "samsung,exynos5250-dwusb3"; 744 #address-cells = < 0x01 >; 745 #size-cells = < 0x01 >; 746 ranges; 747 clocks = < 0x02 0x16e >; 748 clock-names = "usbdrd30"; 749 vdd33-supply = < 0x24 >; 750 vdd10-supply = < 0x25 >; 751 752 dwc3@12000000 { 753 compatible = "snps,dwc3"; 754 reg = < 0x12000000 0x10000 >; 755 interrupts = < 0x00 0x48 0x04 >; 756 phys = < 0x26 0x00 0x26 0x01 >; 757 phy-names = "usb2-phy\0usb3-phy"; 758 snps,dis_u3_susphy_quirk; 759 dr_mode = "host"; 760 }; 761 }; 762 763 phy@12100000 { 764 compatible = "samsung,exynos5420-usbdrd-phy"; 765 reg = < 0x12100000 0x100 >; 766 #phy-cells = < 0x01 >; 767 clocks = < 0x02 0x16e 0x02 0x98 >; 768 clock-names = "phy\0ref"; 769 samsung,pmu-syscon = < 0x0d >; 770 phandle = < 0x26 >; 771 }; 772 773 usb3-1 { 774 compatible = "samsung,exynos5250-dwusb3"; 775 #address-cells = < 0x01 >; 776 #size-cells = < 0x01 >; 777 ranges; 778 clocks = < 0x02 0x16f >; 779 clock-names = "usbdrd30"; 780 vdd33-supply = < 0x24 >; 781 vdd10-supply = < 0x25 >; 782 783 dwc3@12400000 { 784 compatible = "snps,dwc3"; 785 reg = < 0x12400000 0x10000 >; 786 phys = < 0x27 0x00 0x27 0x01 >; 787 phy-names = "usb2-phy\0usb3-phy"; 788 snps,dis_u3_susphy_quirk; 789 interrupts = < 0x00 0x49 0x04 >; 790 dr_mode = "host"; 791 }; 792 }; 793 794 phy@12500000 { 795 compatible = "samsung,exynos5420-usbdrd-phy"; 796 reg = < 0x12500000 0x100 >; 797 #phy-cells = < 0x01 >; 798 clocks = < 0x02 0x16f 0x02 0x99 >; 799 clock-names = "phy\0ref"; 800 samsung,pmu-syscon = < 0x0d >; 801 phandle = < 0x27 >; 802 }; 803 804 usb@12110000 { 805 compatible = "samsung,exynos4210-ehci"; 806 reg = < 0x12110000 0x100 >; 807 interrupts = < 0x00 0x47 0x04 >; 808 #address-cells = < 0x01 >; 809 #size-cells = < 0x00 >; 810 clocks = < 0x02 0x16d >; 811 clock-names = "usbhost"; 812 813 port@0 { 814 reg = < 0x00 >; 815 phys = < 0x28 0x01 >; 816 }; 817 }; 818 819 usb@12120000 { 820 compatible = "samsung,exynos4210-ohci"; 821 reg = < 0x12120000 0x100 >; 822 interrupts = < 0x00 0x47 0x04 >; 823 #address-cells = < 0x01 >; 824 #size-cells = < 0x00 >; 825 clocks = < 0x02 0x16d >; 826 clock-names = "usbhost"; 827 828 port@0 { 829 reg = < 0x00 >; 830 phys = < 0x28 0x01 >; 831 }; 832 }; 833 834 phy@12130000 { 835 compatible = "samsung,exynos5250-usb2-phy"; 836 reg = < 0x12130000 0x100 >; 837 #phy-cells = < 0x01 >; 838 clocks = < 0x02 0x16d 0x02 0x98 >; 839 clock-names = "phy\0ref"; 840 samsung,sysreg-phandle = < 0x05 >; 841 samsung,pmureg-phandle = < 0x0d >; 842 phandle = < 0x28 >; 843 }; 844 845 opp_table0 { 846 compatible = "operating-points-v2"; 847 opp-shared; 848 phandle = < 0x94 >; 849 850 opp-1800000000 { 851 opp-hz = < 0x00 0x6b49d200 >; 852 opp-microvolt = < 0x1312d0 >; 853 clock-latency-ns = < 0x222e0 >; 854 }; 855 856 opp-1700000000 { 857 opp-hz = < 0x00 0x6553f100 >; 858 opp-microvolt = < 0x1312d0 >; 859 clock-latency-ns = < 0x222e0 >; 860 }; 861 862 opp-1600000000 { 863 opp-hz = < 0x00 0x5f5e1000 >; 864 opp-microvolt = < 0x1312d0 >; 865 clock-latency-ns = < 0x222e0 >; 866 }; 867 868 opp-1500000000 { 869 opp-hz = < 0x00 0x59682f00 >; 870 opp-microvolt = < 0x10c8e0 >; 871 clock-latency-ns = < 0x222e0 >; 872 }; 873 874 opp-1400000000 { 875 opp-hz = < 0x00 0x53724e00 >; 876 opp-microvolt = < 0x10c8e0 >; 877 clock-latency-ns = < 0x222e0 >; 878 }; 879 880 opp-1300000000 { 881 opp-hz = < 0x00 0x4d7c6d00 >; 882 opp-microvolt = < 0x10c8e0 >; 883 clock-latency-ns = < 0x222e0 >; 884 }; 885 886 opp-1200000000 { 887 opp-hz = < 0x00 0x47868c00 >; 888 opp-microvolt = < 0xf4240 >; 889 clock-latency-ns = < 0x222e0 >; 890 }; 891 892 opp-1100000000 { 893 opp-hz = < 0x00 0x4190ab00 >; 894 opp-microvolt = < 0xf4240 >; 895 clock-latency-ns = < 0x222e0 >; 896 }; 897 898 opp-1000000000 { 899 opp-hz = < 0x00 0x3b9aca00 >; 900 opp-microvolt = < 0xf4240 >; 901 clock-latency-ns = < 0x222e0 >; 902 }; 903 904 opp-900000000 { 905 opp-hz = < 0x00 0x35a4e900 >; 906 opp-microvolt = < 0xf4240 >; 907 clock-latency-ns = < 0x222e0 >; 908 }; 909 910 opp-800000000 { 911 opp-hz = < 0x00 0x2faf0800 >; 912 opp-microvolt = < 0xdbba0 >; 913 clock-latency-ns = < 0x222e0 >; 914 }; 915 916 opp-700000000 { 917 opp-hz = < 0x00 0x29b92700 >; 918 opp-microvolt = < 0xdbba0 >; 919 clock-latency-ns = < 0x222e0 >; 920 }; 921 922 opp-600000000 { 923 opp-hz = < 0x00 0x23c34600 >; 924 opp-microvolt = < 0xdbba0 >; 925 clock-latency-ns = < 0x222e0 >; 926 }; 927 928 opp-500000000 { 929 opp-hz = < 0x00 0x1dcd6500 >; 930 opp-microvolt = < 0xdbba0 >; 931 clock-latency-ns = < 0x222e0 >; 932 }; 933 934 opp-400000000 { 935 opp-hz = < 0x00 0x17d78400 >; 936 opp-microvolt = < 0xdbba0 >; 937 clock-latency-ns = < 0x222e0 >; 938 }; 939 940 opp-300000000 { 941 opp-hz = < 0x00 0x11e1a300 >; 942 opp-microvolt = < 0xdbba0 >; 943 clock-latency-ns = < 0x222e0 >; 944 }; 945 946 opp-200000000 { 947 opp-hz = < 0x00 0xbebc200 >; 948 opp-microvolt = < 0xdbba0 >; 949 clock-latency-ns = < 0x222e0 >; 950 }; 951 }; 952 953 opp_table1 { 954 compatible = "operating-points-v2"; 955 opp-shared; 956 phandle = < 0x91 >; 957 958 opp-1300000000 { 959 opp-hz = < 0x00 0x4d7c6d00 >; 960 opp-microvolt = < 0x1312d0 >; 961 clock-latency-ns = < 0x222e0 >; 962 }; 963 964 opp-1200000000 { 965 opp-hz = < 0x00 0x47868c00 >; 966 opp-microvolt = < 0x1312d0 >; 967 clock-latency-ns = < 0x222e0 >; 968 }; 969 970 opp-1100000000 { 971 opp-hz = < 0x00 0x4190ab00 >; 972 opp-microvolt = < 0x1312d0 >; 973 clock-latency-ns = < 0x222e0 >; 974 }; 975 976 opp-1000000000 { 977 opp-hz = < 0x00 0x3b9aca00 >; 978 opp-microvolt = < 0x10c8e0 >; 979 clock-latency-ns = < 0x222e0 >; 980 }; 981 982 opp-900000000 { 983 opp-hz = < 0x00 0x35a4e900 >; 984 opp-microvolt = < 0x10c8e0 >; 985 clock-latency-ns = < 0x222e0 >; 986 }; 987 988 opp-800000000 { 989 opp-hz = < 0x00 0x2faf0800 >; 990 opp-microvolt = < 0x10c8e0 >; 991 clock-latency-ns = < 0x222e0 >; 992 }; 993 994 opp-700000000 { 995 opp-hz = < 0x00 0x29b92700 >; 996 opp-microvolt = < 0xf4240 >; 997 clock-latency-ns = < 0x222e0 >; 998 }; 999 1000 opp-600000000 { 1001 opp-hz = < 0x00 0x23c34600 >; 1002 opp-microvolt = < 0xf4240 >; 1003 clock-latency-ns = < 0x222e0 >; 1004 }; 1005 1006 opp-500000000 { 1007 opp-hz = < 0x00 0x1dcd6500 >; 1008 opp-microvolt = < 0xf4240 >; 1009 clock-latency-ns = < 0x222e0 >; 1010 }; 1011 1012 opp-400000000 { 1013 opp-hz = < 0x00 0x17d78400 >; 1014 opp-microvolt = < 0xf4240 >; 1015 clock-latency-ns = < 0x222e0 >; 1016 }; 1017 1018 opp-300000000 { 1019 opp-hz = < 0x00 0x11e1a300 >; 1020 opp-microvolt = < 0xdbba0 >; 1021 clock-latency-ns = < 0x222e0 >; 1022 }; 1023 1024 opp-200000000 { 1025 opp-hz = < 0x00 0xbebc200 >; 1026 opp-microvolt = < 0xdbba0 >; 1027 clock-latency-ns = < 0x222e0 >; 1028 }; 1029 }; 1030 1031 cci@10d20000 { 1032 compatible = "arm,cci-400"; 1033 #address-cells = < 0x01 >; 1034 #size-cells = < 0x01 >; 1035 reg = < 0x10d20000 0x1000 >; 1036 ranges = < 0x00 0x10d20000 0x6000 >; 1037 1038 slave-if@4000 { 1039 compatible = "arm,cci-400-ctrl-if"; 1040 interface-type = "ace"; 1041 reg = < 0x4000 0x1000 >; 1042 phandle = < 0x90 >; 1043 }; 1044 1045 slave-if@5000 { 1046 compatible = "arm,cci-400-ctrl-if"; 1047 interface-type = "ace"; 1048 reg = < 0x5000 0x1000 >; 1049 phandle = < 0x93 >; 1050 }; 1051 }; 1052 1053 clock-controller@10010000 { 1054 compatible = "samsung,exynos5800-clock"; 1055 reg = < 0x10010000 0x30000 >; 1056 #clock-cells = < 0x01 >; 1057 phandle = < 0x02 >; 1058 }; 1059 1060 audss-clock-controller@3810000 { 1061 compatible = "samsung,exynos5420-audss-clock"; 1062 reg = < 0x3810000 0x0c >; 1063 #clock-cells = < 0x01 >; 1064 clocks = < 0x02 0x01 0x02 0x9f 0x02 0x94 0x02 0x95 >; 1065 clock-names = "pll_ref\0pll_in\0sclk_audio\0sclk_pcm_in"; 1066 power-domains = < 0x29 >; 1067 assigned-clocks = < 0x2a 0x02 0x02 0x05 >; 1068 assigned-clock-rates = < 0xbb800 0xbb80000 >; 1069 phandle = < 0x2a >; 1070 }; 1071 1072 codec@11000000 { 1073 compatible = "samsung,mfc-v8"; 1074 reg = < 0x11000000 0x10000 >; 1075 interrupts = < 0x00 0x60 0x04 >; 1076 clocks = < 0x02 0x191 >; 1077 clock-names = "mfc"; 1078 power-domains = < 0x2b >; 1079 iommus = < 0x2c 0x2d >; 1080 iommu-names = "left\0right"; 1081 }; 1082 1083 mmc@12200000 { 1084 compatible = "samsung,exynos5420-dw-mshc-smu"; 1085 interrupts = < 0x00 0x4b 0x04 >; 1086 #address-cells = < 0x01 >; 1087 #size-cells = < 0x00 >; 1088 reg = < 0x12200000 0x2000 >; 1089 clocks = < 0x02 0x15f 0x02 0x84 >; 1090 clock-names = "biu\0ciu"; 1091 fifo-depth = < 0x40 >; 1092 status = "okay"; 1093 mmc-pwrseq = < 0x2e >; 1094 card-detect-delay = < 0xc8 >; 1095 samsung,dw-mshc-ciu-div = < 0x03 >; 1096 samsung,dw-mshc-sdr-timing = < 0x00 0x04 >; 1097 samsung,dw-mshc-ddr-timing = < 0x00 0x02 >; 1098 samsung,dw-mshc-hs400-timing = < 0x00 0x02 >; 1099 samsung,read-strobe-delay = < 0x5a >; 1100 pinctrl-names = "default"; 1101 pinctrl-0 = < 0x2f 0x30 0x31 0x32 0x33 0x34 0x35 >; 1102 bus-width = < 0x08 >; 1103 cap-mmc-highspeed; 1104 mmc-hs200-1_8v; 1105 mmc-hs400-1_8v; 1106 vmmc-supply = < 0x36 >; 1107 vqmmc-supply = < 0x37 >; 1108 }; 1109 1110 mmc@12210000 { 1111 compatible = "samsung,exynos5420-dw-mshc-smu"; 1112 interrupts = < 0x00 0x4c 0x04 >; 1113 #address-cells = < 0x01 >; 1114 #size-cells = < 0x00 >; 1115 reg = < 0x12210000 0x2000 >; 1116 clocks = < 0x02 0x160 0x02 0x85 >; 1117 clock-names = "biu\0ciu"; 1118 fifo-depth = < 0x40 >; 1119 status = "disabled"; 1120 }; 1121 1122 mmc@12220000 { 1123 compatible = "samsung,exynos5420-dw-mshc"; 1124 interrupts = < 0x00 0x4d 0x04 >; 1125 #address-cells = < 0x01 >; 1126 #size-cells = < 0x00 >; 1127 reg = < 0x12220000 0x1000 >; 1128 clocks = < 0x02 0x161 0x02 0x86 >; 1129 clock-names = "biu\0ciu"; 1130 fifo-depth = < 0x40 >; 1131 status = "okay"; 1132 card-detect-delay = < 0xc8 >; 1133 samsung,dw-mshc-ciu-div = < 0x03 >; 1134 samsung,dw-mshc-sdr-timing = < 0x00 0x04 >; 1135 samsung,dw-mshc-ddr-timing = < 0x00 0x02 >; 1136 pinctrl-names = "default"; 1137 pinctrl-0 = < 0x38 0x39 0x3a 0x3b 0x3c >; 1138 bus-width = < 0x04 >; 1139 cap-sd-highspeed; 1140 vmmc-supply = < 0x3d >; 1141 vqmmc-supply = < 0x3e >; 1142 }; 1143 1144 nocp@10ca1000 { 1145 compatible = "samsung,exynos5420-nocp"; 1146 reg = < 0x10ca1000 0x200 >; 1147 status = "okay"; 1148 phandle = < 0x62 >; 1149 }; 1150 1151 nocp@10ca1400 { 1152 compatible = "samsung,exynos5420-nocp"; 1153 reg = < 0x10ca1400 0x200 >; 1154 status = "okay"; 1155 phandle = < 0x63 >; 1156 }; 1157 1158 nocp@10ca1800 { 1159 compatible = "samsung,exynos5420-nocp"; 1160 reg = < 0x10ca1800 0x200 >; 1161 status = "okay"; 1162 phandle = < 0x64 >; 1163 }; 1164 1165 nocp@10ca1c00 { 1166 compatible = "samsung,exynos5420-nocp"; 1167 reg = < 0x10ca1c00 0x200 >; 1168 status = "okay"; 1169 phandle = < 0x65 >; 1170 }; 1171 1172 nocp@11a51000 { 1173 compatible = "samsung,exynos5420-nocp"; 1174 reg = < 0x11a51000 0x200 >; 1175 status = "disabled"; 1176 }; 1177 1178 nocp@11a51400 { 1179 compatible = "samsung,exynos5420-nocp"; 1180 reg = < 0x11a51400 0x200 >; 1181 status = "disabled"; 1182 }; 1183 1184 power-domain@10044000 { 1185 compatible = "samsung,exynos4210-pd"; 1186 reg = < 0x10044000 0x20 >; 1187 #power-domain-cells = < 0x00 >; 1188 label = "GSC"; 1189 phandle = < 0x55 >; 1190 }; 1191 1192 power-domain@10044020 { 1193 compatible = "samsung,exynos4210-pd"; 1194 reg = < 0x10044020 0x20 >; 1195 #power-domain-cells = < 0x00 >; 1196 label = "ISP"; 1197 }; 1198 1199 power-domain@10044060 { 1200 compatible = "samsung,exynos4210-pd"; 1201 reg = < 0x10044060 0x20 >; 1202 #power-domain-cells = < 0x00 >; 1203 label = "MFC"; 1204 phandle = < 0x2b >; 1205 }; 1206 1207 power-domain@10044120 { 1208 compatible = "samsung,exynos4210-pd"; 1209 reg = < 0x10044120 0x20 >; 1210 #power-domain-cells = < 0x00 >; 1211 label = "MSC"; 1212 phandle = < 0x58 >; 1213 }; 1214 1215 power-domain@100440c0 { 1216 compatible = "samsung,exynos4210-pd"; 1217 reg = < 0x100440c0 0x20 >; 1218 #power-domain-cells = < 0x00 >; 1219 label = "DISP"; 1220 phandle = < 0x0f >; 1221 }; 1222 1223 power-domain@100440e0 { 1224 compatible = "samsung,exynos4210-pd"; 1225 reg = < 0x100440e0 0x20 >; 1226 #power-domain-cells = < 0x00 >; 1227 label = "MAU"; 1228 phandle = < 0x29 >; 1229 }; 1230 1231 pinctrl@13400000 { 1232 compatible = "samsung,exynos5420-pinctrl"; 1233 reg = < 0x13400000 0x1000 >; 1234 interrupts = < 0x00 0x2d 0x04 >; 1235 1236 wakeup-interrupt-controller { 1237 compatible = "samsung,exynos4210-wakeup-eint"; 1238 interrupt-parent = < 0x01 >; 1239 interrupts = < 0x00 0x20 0x04 >; 1240 }; 1241 1242 gpy7 { 1243 gpio-controller; 1244 #gpio-cells = < 0x02 >; 1245 interrupt-controller; 1246 #interrupt-cells = < 0x02 >; 1247 }; 1248 1249 gpx0 { 1250 gpio-controller; 1251 #gpio-cells = < 0x02 >; 1252 interrupt-controller; 1253 interrupt-parent = < 0x0e >; 1254 #interrupt-cells = < 0x02 >; 1255 interrupts = < 0x17 0x00 0x18 0x00 0x19 0x00 0x19 0x01 0x1a 0x00 0x1a 0x01 0x1b 0x00 0x1b 0x01 >; 1256 phandle = < 0x1f >; 1257 }; 1258 1259 gpx1 { 1260 gpio-controller; 1261 #gpio-cells = < 0x02 >; 1262 interrupt-controller; 1263 interrupt-parent = < 0x0e >; 1264 #interrupt-cells = < 0x02 >; 1265 interrupts = < 0x1c 0x00 0x1c 0x01 0x1d 0x00 0x1d 0x01 0x1e 0x00 0x1e 0x01 0x1f 0x00 0x1f 0x01 >; 1266 }; 1267 1268 gpx2 { 1269 gpio-controller; 1270 #gpio-cells = < 0x02 >; 1271 interrupt-controller; 1272 #interrupt-cells = < 0x02 >; 1273 }; 1274 1275 gpx3 { 1276 gpio-controller; 1277 #gpio-cells = < 0x02 >; 1278 interrupt-controller; 1279 #interrupt-cells = < 0x02 >; 1280 phandle = < 0x4d >; 1281 }; 1282 1283 dp_hpd { 1284 samsung,pins = "gpx0-7"; 1285 samsung,pin-function = < 0x03 >; 1286 samsung,pin-pud = < 0x00 >; 1287 samsung,pin-drv = < 0x00 >; 1288 }; 1289 1290 hdmi-cec { 1291 samsung,pins = "gpx3-6"; 1292 samsung,pin-function = < 0x03 >; 1293 samsung,pin-pud = < 0x00 >; 1294 samsung,pin-drv = < 0x00 >; 1295 phandle = < 0x52 >; 1296 }; 1297 1298 s2mps11-irq { 1299 samsung,pins = "gpx0-4"; 1300 samsung,pin-function = < 0x0f >; 1301 samsung,pin-pud = < 0x00 >; 1302 samsung,pin-drv = < 0x00 >; 1303 phandle = < 0x20 >; 1304 }; 1305 1306 power-key { 1307 samsung,pins = "gpx0-3"; 1308 samsung,pin-function = < 0x00 >; 1309 samsung,pin-pud = < 0x00 >; 1310 samsung,pin-drv = < 0x00 >; 1311 phandle = < 0x96 >; 1312 }; 1313 1314 hdmi-hpd-irq { 1315 samsung,pins = "gpx3-7"; 1316 samsung,pin-function = < 0x00 >; 1317 samsung,pin-pud = < 0x01 >; 1318 samsung,pin-drv = < 0x00 >; 1319 phandle = < 0x4e >; 1320 }; 1321 }; 1322 1323 pinctrl@13410000 { 1324 compatible = "samsung,exynos5420-pinctrl"; 1325 reg = < 0x13410000 0x1000 >; 1326 interrupts = < 0x00 0x4e 0x04 >; 1327 1328 gpc0 { 1329 gpio-controller; 1330 #gpio-cells = < 0x02 >; 1331 interrupt-controller; 1332 #interrupt-cells = < 0x02 >; 1333 }; 1334 1335 gpc1 { 1336 gpio-controller; 1337 #gpio-cells = < 0x02 >; 1338 interrupt-controller; 1339 #interrupt-cells = < 0x02 >; 1340 }; 1341 1342 gpc2 { 1343 gpio-controller; 1344 #gpio-cells = < 0x02 >; 1345 interrupt-controller; 1346 #interrupt-cells = < 0x02 >; 1347 }; 1348 1349 gpc3 { 1350 gpio-controller; 1351 #gpio-cells = < 0x02 >; 1352 interrupt-controller; 1353 #interrupt-cells = < 0x02 >; 1354 }; 1355 1356 gpc4 { 1357 gpio-controller; 1358 #gpio-cells = < 0x02 >; 1359 interrupt-controller; 1360 #interrupt-cells = < 0x02 >; 1361 }; 1362 1363 gpd1 { 1364 gpio-controller; 1365 #gpio-cells = < 0x02 >; 1366 interrupt-controller; 1367 #interrupt-cells = < 0x02 >; 1368 phandle = < 0x98 >; 1369 }; 1370 1371 gpy0 { 1372 gpio-controller; 1373 #gpio-cells = < 0x02 >; 1374 }; 1375 1376 gpy1 { 1377 gpio-controller; 1378 #gpio-cells = < 0x02 >; 1379 }; 1380 1381 gpy2 { 1382 gpio-controller; 1383 #gpio-cells = < 0x02 >; 1384 }; 1385 1386 gpy3 { 1387 gpio-controller; 1388 #gpio-cells = < 0x02 >; 1389 }; 1390 1391 gpy4 { 1392 gpio-controller; 1393 #gpio-cells = < 0x02 >; 1394 }; 1395 1396 gpy5 { 1397 gpio-controller; 1398 #gpio-cells = < 0x02 >; 1399 }; 1400 1401 gpy6 { 1402 gpio-controller; 1403 #gpio-cells = < 0x02 >; 1404 }; 1405 1406 sd0-clk { 1407 samsung,pins = "gpc0-0"; 1408 samsung,pin-function = < 0x02 >; 1409 samsung,pin-pud = < 0x00 >; 1410 samsung,pin-drv = < 0x03 >; 1411 phandle = < 0x2f >; 1412 }; 1413 1414 sd0-cmd { 1415 samsung,pins = "gpc0-1"; 1416 samsung,pin-function = < 0x02 >; 1417 samsung,pin-pud = < 0x00 >; 1418 samsung,pin-drv = < 0x03 >; 1419 phandle = < 0x30 >; 1420 }; 1421 1422 sd0-cd { 1423 samsung,pins = "gpc0-2"; 1424 samsung,pin-function = < 0x02 >; 1425 samsung,pin-pud = < 0x03 >; 1426 samsung,pin-drv = < 0x03 >; 1427 phandle = < 0x34 >; 1428 }; 1429 1430 sd0-bus-width1 { 1431 samsung,pins = "gpc0-3"; 1432 samsung,pin-function = < 0x02 >; 1433 samsung,pin-pud = < 0x03 >; 1434 samsung,pin-drv = < 0x03 >; 1435 phandle = < 0x31 >; 1436 }; 1437 1438 sd0-bus-width4 { 1439 samsung,pins = "gpc0-4\0gpc0-5\0gpc0-6"; 1440 samsung,pin-function = < 0x02 >; 1441 samsung,pin-pud = < 0x03 >; 1442 samsung,pin-drv = < 0x03 >; 1443 phandle = < 0x32 >; 1444 }; 1445 1446 sd0-bus-width8 { 1447 samsung,pins = "gpc3-0\0gpc3-1\0gpc3-2\0gpc3-3"; 1448 samsung,pin-function = < 0x02 >; 1449 samsung,pin-pud = < 0x03 >; 1450 samsung,pin-drv = < 0x03 >; 1451 phandle = < 0x33 >; 1452 }; 1453 1454 sd0-rclk { 1455 samsung,pins = "gpc0-7"; 1456 samsung,pin-function = < 0x02 >; 1457 samsung,pin-pud = < 0x01 >; 1458 samsung,pin-drv = < 0x03 >; 1459 phandle = < 0x35 >; 1460 }; 1461 1462 sd1-clk { 1463 samsung,pins = "gpc1-0"; 1464 samsung,pin-function = < 0x02 >; 1465 samsung,pin-pud = < 0x00 >; 1466 samsung,pin-drv = < 0x03 >; 1467 }; 1468 1469 sd1-cmd { 1470 samsung,pins = "gpc1-1"; 1471 samsung,pin-function = < 0x02 >; 1472 samsung,pin-pud = < 0x00 >; 1473 samsung,pin-drv = < 0x03 >; 1474 }; 1475 1476 sd1-cd { 1477 samsung,pins = "gpc1-2"; 1478 samsung,pin-function = < 0x02 >; 1479 samsung,pin-pud = < 0x03 >; 1480 samsung,pin-drv = < 0x03 >; 1481 }; 1482 1483 sd1-int { 1484 samsung,pins = "gpd1-1"; 1485 samsung,pin-function = < 0x02 >; 1486 samsung,pin-pud = < 0x03 >; 1487 samsung,pin-drv = < 0x00 >; 1488 }; 1489 1490 sd1-bus-width1 { 1491 samsung,pins = "gpc1-3"; 1492 samsung,pin-function = < 0x02 >; 1493 samsung,pin-pud = < 0x03 >; 1494 samsung,pin-drv = < 0x03 >; 1495 }; 1496 1497 sd1-bus-width4 { 1498 samsung,pins = "gpc1-4\0gpc1-5\0gpc1-6"; 1499 samsung,pin-function = < 0x02 >; 1500 samsung,pin-pud = < 0x03 >; 1501 samsung,pin-drv = < 0x03 >; 1502 }; 1503 1504 sd1-bus-width8 { 1505 samsung,pins = "gpd1-4\0gpd1-5\0gpd1-6\0gpd1-7"; 1506 samsung,pin-function = < 0x02 >; 1507 samsung,pin-pud = < 0x03 >; 1508 samsung,pin-drv = < 0x03 >; 1509 }; 1510 1511 sd2-clk { 1512 samsung,pins = "gpc2-0"; 1513 samsung,pin-function = < 0x02 >; 1514 samsung,pin-pud = < 0x00 >; 1515 samsung,pin-drv = < 0x03 >; 1516 phandle = < 0x38 >; 1517 }; 1518 1519 sd2-cmd { 1520 samsung,pins = "gpc2-1"; 1521 samsung,pin-function = < 0x02 >; 1522 samsung,pin-pud = < 0x00 >; 1523 samsung,pin-drv = < 0x03 >; 1524 phandle = < 0x39 >; 1525 }; 1526 1527 sd2-cd { 1528 samsung,pins = "gpc2-2"; 1529 samsung,pin-function = < 0x02 >; 1530 samsung,pin-pud = < 0x03 >; 1531 samsung,pin-drv = < 0x03 >; 1532 phandle = < 0x3a >; 1533 }; 1534 1535 sd2-bus-width1 { 1536 samsung,pins = "gpc2-3"; 1537 samsung,pin-function = < 0x02 >; 1538 samsung,pin-pud = < 0x03 >; 1539 samsung,pin-drv = < 0x03 >; 1540 phandle = < 0x3b >; 1541 }; 1542 1543 sd2-bus-width4 { 1544 samsung,pins = "gpc2-4\0gpc2-5\0gpc2-6"; 1545 samsung,pin-function = < 0x02 >; 1546 samsung,pin-pud = < 0x03 >; 1547 samsung,pin-drv = < 0x03 >; 1548 phandle = < 0x3c >; 1549 }; 1550 1551 emmc-nrst { 1552 samsung,pins = "gpd1-0"; 1553 samsung,pin-function = < 0x00 >; 1554 samsung,pin-pud = < 0x00 >; 1555 samsung,pin-drv = < 0x00 >; 1556 phandle = < 0x97 >; 1557 }; 1558 }; 1559 1560 pinctrl@14000000 { 1561 compatible = "samsung,exynos5420-pinctrl"; 1562 reg = < 0x14000000 0x1000 >; 1563 interrupts = < 0x00 0x2e 0x04 >; 1564 1565 gpe0 { 1566 gpio-controller; 1567 #gpio-cells = < 0x02 >; 1568 interrupt-controller; 1569 #interrupt-cells = < 0x02 >; 1570 }; 1571 1572 gpe1 { 1573 gpio-controller; 1574 #gpio-cells = < 0x02 >; 1575 interrupt-controller; 1576 #interrupt-cells = < 0x02 >; 1577 }; 1578 1579 gpf0 { 1580 gpio-controller; 1581 #gpio-cells = < 0x02 >; 1582 interrupt-controller; 1583 #interrupt-cells = < 0x02 >; 1584 }; 1585 1586 gpf1 { 1587 gpio-controller; 1588 #gpio-cells = < 0x02 >; 1589 interrupt-controller; 1590 #interrupt-cells = < 0x02 >; 1591 }; 1592 1593 gpg0 { 1594 gpio-controller; 1595 #gpio-cells = < 0x02 >; 1596 interrupt-controller; 1597 #interrupt-cells = < 0x02 >; 1598 }; 1599 1600 gpg1 { 1601 gpio-controller; 1602 #gpio-cells = < 0x02 >; 1603 interrupt-controller; 1604 #interrupt-cells = < 0x02 >; 1605 }; 1606 1607 gpg2 { 1608 gpio-controller; 1609 #gpio-cells = < 0x02 >; 1610 interrupt-controller; 1611 #interrupt-cells = < 0x02 >; 1612 }; 1613 1614 gpj4 { 1615 gpio-controller; 1616 #gpio-cells = < 0x02 >; 1617 interrupt-controller; 1618 #interrupt-cells = < 0x02 >; 1619 }; 1620 1621 cam-gpio-a { 1622 samsung,pins = "gpe0-0\0gpe0-1\0gpe0-2\0gpe0-3\0gpe0-4\0gpe0-5\0gpe0-6\0gpe0-7\0gpe1-0\0gpe1-1"; 1623 samsung,pin-function = < 0x02 >; 1624 samsung,pin-pud = < 0x00 >; 1625 samsung,pin-drv = < 0x00 >; 1626 }; 1627 1628 cam-gpio-b { 1629 samsung,pins = "gpf0-0\0gpf0-1\0gpf0-2\0gpf0-3\0gpf1-0\0gpf1-1\0gpf1-2\0gpf1-3"; 1630 samsung,pin-function = < 0x03 >; 1631 samsung,pin-pud = < 0x00 >; 1632 samsung,pin-drv = < 0x00 >; 1633 }; 1634 1635 cam-i2c2-bus { 1636 samsung,pins = "gpf0-4\0gpf0-5"; 1637 samsung,pin-function = < 0x02 >; 1638 samsung,pin-pud = < 0x03 >; 1639 samsung,pin-drv = < 0x00 >; 1640 }; 1641 1642 cam-spi1-bus { 1643 samsung,pins = "gpe0-4\0gpe0-5\0gpf0-2\0gpf0-3"; 1644 samsung,pin-function = < 0x04 >; 1645 samsung,pin-pud = < 0x00 >; 1646 samsung,pin-drv = < 0x00 >; 1647 }; 1648 1649 cam-i2c1-bus { 1650 samsung,pins = "gpf0-2\0gpf0-3"; 1651 samsung,pin-function = < 0x02 >; 1652 samsung,pin-pud = < 0x03 >; 1653 samsung,pin-drv = < 0x00 >; 1654 }; 1655 1656 cam-i2c0-bus { 1657 samsung,pins = "gpf0-0\0gpf0-1"; 1658 samsung,pin-function = < 0x02 >; 1659 samsung,pin-pud = < 0x03 >; 1660 samsung,pin-drv = < 0x00 >; 1661 }; 1662 1663 cam-spi0-bus { 1664 samsung,pins = "gpf1-0\0gpf1-1\0gpf1-2\0gpf1-3"; 1665 samsung,pin-function = < 0x02 >; 1666 samsung,pin-pud = < 0x00 >; 1667 samsung,pin-drv = < 0x00 >; 1668 }; 1669 1670 cam-bayrgb-bus { 1671 samsung,pins = "gpg0-0\0gpg0-1\0gpg0-2\0gpg0-3\0gpg0-4\0gpg0-5\0gpg0-6\0gpg0-7\0gpg1-0\0gpg1-1\0gpg1-2\0gpg1-3\0gpg1-4\0gpg1-5\0gpg1-6\0gpg1-7\0gpg2-0"; 1672 samsung,pin-function = < 0x02 >; 1673 samsung,pin-pud = < 0x00 >; 1674 samsung,pin-drv = < 0x00 >; 1675 }; 1676 }; 1677 1678 pinctrl@14010000 { 1679 compatible = "samsung,exynos5420-pinctrl"; 1680 reg = < 0x14010000 0x1000 >; 1681 interrupts = < 0x00 0x32 0x04 >; 1682 1683 gpa0 { 1684 gpio-controller; 1685 #gpio-cells = < 0x02 >; 1686 interrupt-controller; 1687 #interrupt-cells = < 0x02 >; 1688 }; 1689 1690 gpa1 { 1691 gpio-controller; 1692 #gpio-cells = < 0x02 >; 1693 interrupt-controller; 1694 #interrupt-cells = < 0x02 >; 1695 }; 1696 1697 gpa2 { 1698 gpio-controller; 1699 #gpio-cells = < 0x02 >; 1700 interrupt-controller; 1701 #interrupt-cells = < 0x02 >; 1702 }; 1703 1704 gpb0 { 1705 gpio-controller; 1706 #gpio-cells = < 0x02 >; 1707 interrupt-controller; 1708 #interrupt-cells = < 0x02 >; 1709 }; 1710 1711 gpb1 { 1712 gpio-controller; 1713 #gpio-cells = < 0x02 >; 1714 interrupt-controller; 1715 #interrupt-cells = < 0x02 >; 1716 }; 1717 1718 gpb2 { 1719 gpio-controller; 1720 #gpio-cells = < 0x02 >; 1721 interrupt-controller; 1722 #interrupt-cells = < 0x02 >; 1723 }; 1724 1725 gpb3 { 1726 gpio-controller; 1727 #gpio-cells = < 0x02 >; 1728 interrupt-controller; 1729 #interrupt-cells = < 0x02 >; 1730 }; 1731 1732 gpb4 { 1733 gpio-controller; 1734 #gpio-cells = < 0x02 >; 1735 interrupt-controller; 1736 #interrupt-cells = < 0x02 >; 1737 }; 1738 1739 gph0 { 1740 gpio-controller; 1741 #gpio-cells = < 0x02 >; 1742 interrupt-controller; 1743 #interrupt-cells = < 0x02 >; 1744 }; 1745 1746 uart0-data { 1747 samsung,pins = "gpa0-0\0gpa0-1"; 1748 samsung,pin-function = < 0x02 >; 1749 samsung,pin-pud = < 0x00 >; 1750 samsung,pin-drv = < 0x00 >; 1751 }; 1752 1753 uart0-fctl { 1754 samsung,pins = "gpa0-2\0gpa0-3"; 1755 samsung,pin-function = < 0x02 >; 1756 samsung,pin-pud = < 0x00 >; 1757 samsung,pin-drv = < 0x00 >; 1758 }; 1759 1760 uart1-data { 1761 samsung,pins = "gpa0-4\0gpa0-5"; 1762 samsung,pin-function = < 0x02 >; 1763 samsung,pin-pud = < 0x00 >; 1764 samsung,pin-drv = < 0x00 >; 1765 }; 1766 1767 uart1-fctl { 1768 samsung,pins = "gpa0-6\0gpa0-7"; 1769 samsung,pin-function = < 0x02 >; 1770 samsung,pin-pud = < 0x00 >; 1771 samsung,pin-drv = < 0x00 >; 1772 }; 1773 1774 i2c2-bus { 1775 samsung,pins = "gpa0-6\0gpa0-7"; 1776 samsung,pin-function = < 0x03 >; 1777 samsung,pin-pud = < 0x03 >; 1778 samsung,pin-drv = < 0x00 >; 1779 phandle = < 0x08 >; 1780 }; 1781 1782 uart2-data { 1783 samsung,pins = "gpa1-0\0gpa1-1"; 1784 samsung,pin-function = < 0x02 >; 1785 samsung,pin-pud = < 0x00 >; 1786 samsung,pin-drv = < 0x00 >; 1787 }; 1788 1789 uart2-fctl { 1790 samsung,pins = "gpa1-2\0gpa1-3"; 1791 samsung,pin-function = < 0x02 >; 1792 samsung,pin-pud = < 0x00 >; 1793 samsung,pin-drv = < 0x00 >; 1794 }; 1795 1796 i2c3-bus { 1797 samsung,pins = "gpa1-2\0gpa1-3"; 1798 samsung,pin-function = < 0x03 >; 1799 samsung,pin-pud = < 0x03 >; 1800 samsung,pin-drv = < 0x00 >; 1801 phandle = < 0x09 >; 1802 }; 1803 1804 uart3-data { 1805 samsung,pins = "gpa1-4\0gpa1-5"; 1806 samsung,pin-function = < 0x02 >; 1807 samsung,pin-pud = < 0x00 >; 1808 samsung,pin-drv = < 0x00 >; 1809 }; 1810 1811 spi0-bus { 1812 samsung,pins = "gpa2-0\0gpa2-1\0gpa2-2\0gpa2-3"; 1813 samsung,pin-function = < 0x02 >; 1814 samsung,pin-pud = < 0x03 >; 1815 samsung,pin-drv = < 0x00 >; 1816 phandle = < 0x43 >; 1817 }; 1818 1819 spi1-bus { 1820 samsung,pins = "gpa2-4\0gpa2-6\0gpa2-7"; 1821 samsung,pin-function = < 0x02 >; 1822 samsung,pin-pud = < 0x03 >; 1823 samsung,pin-drv = < 0x00 >; 1824 phandle = < 0x44 >; 1825 }; 1826 1827 i2c4-hs-bus { 1828 samsung,pins = "gpa2-0\0gpa2-1"; 1829 samsung,pin-function = < 0x03 >; 1830 samsung,pin-pud = < 0x03 >; 1831 samsung,pin-drv = < 0x00 >; 1832 phandle = < 0x1e >; 1833 }; 1834 1835 i2c5-hs-bus { 1836 samsung,pins = "gpa2-2\0gpa2-3"; 1837 samsung,pin-function = < 0x03 >; 1838 samsung,pin-pud = < 0x03 >; 1839 samsung,pin-drv = < 0x00 >; 1840 phandle = < 0x21 >; 1841 }; 1842 1843 i2s1-bus { 1844 samsung,pins = "gpb0-0\0gpb0-1\0gpb0-2\0gpb0-3\0gpb0-4"; 1845 samsung,pin-function = < 0x02 >; 1846 samsung,pin-pud = < 0x00 >; 1847 samsung,pin-drv = < 0x00 >; 1848 phandle = < 0x41 >; 1849 }; 1850 1851 pcm1-bus { 1852 samsung,pins = "gpb0-0\0gpb0-1\0gpb0-2\0gpb0-3\0gpb0-4"; 1853 samsung,pin-function = < 0x03 >; 1854 samsung,pin-pud = < 0x00 >; 1855 samsung,pin-drv = < 0x00 >; 1856 }; 1857 1858 i2s2-bus { 1859 samsung,pins = "gpb1-0\0gpb1-1\0gpb1-2\0gpb1-3\0gpb1-4"; 1860 samsung,pin-function = < 0x02 >; 1861 samsung,pin-pud = < 0x00 >; 1862 samsung,pin-drv = < 0x00 >; 1863 phandle = < 0x42 >; 1864 }; 1865 1866 pcm2-bus { 1867 samsung,pins = "gpb1-0\0gpb1-1\0gpb1-2\0gpb1-3\0gpb1-4"; 1868 samsung,pin-function = < 0x03 >; 1869 samsung,pin-pud = < 0x00 >; 1870 samsung,pin-drv = < 0x00 >; 1871 }; 1872 1873 spdif-bus { 1874 samsung,pins = "gpb1-0\0gpb1-1"; 1875 samsung,pin-function = < 0x04 >; 1876 samsung,pin-pud = < 0x00 >; 1877 samsung,pin-drv = < 0x00 >; 1878 }; 1879 1880 spi2-bus { 1881 samsung,pins = "gpb1-1\0gpb1-3\0gpb1-4"; 1882 samsung,pin-function = < 0x05 >; 1883 samsung,pin-pud = < 0x03 >; 1884 samsung,pin-drv = < 0x00 >; 1885 phandle = < 0x45 >; 1886 }; 1887 1888 i2c6-hs-bus { 1889 samsung,pins = "gpb1-3\0gpb1-4"; 1890 samsung,pin-function = < 0x04 >; 1891 samsung,pin-pud = < 0x03 >; 1892 samsung,pin-drv = < 0x00 >; 1893 phandle = < 0x22 >; 1894 }; 1895 1896 pwm0-out { 1897 samsung,pins = "gpb2-0"; 1898 samsung,pin-function = < 0x02 >; 1899 samsung,pin-pud = < 0x00 >; 1900 samsung,pin-drv = < 0x00 >; 1901 phandle = < 0x0a >; 1902 }; 1903 1904 pwm1-out { 1905 samsung,pins = "gpb2-1"; 1906 samsung,pin-function = < 0x02 >; 1907 samsung,pin-pud = < 0x00 >; 1908 samsung,pin-drv = < 0x00 >; 1909 }; 1910 1911 pwm2-out { 1912 samsung,pins = "gpb2-2"; 1913 samsung,pin-function = < 0x02 >; 1914 samsung,pin-pud = < 0x00 >; 1915 samsung,pin-drv = < 0x00 >; 1916 phandle = < 0x0b >; 1917 }; 1918 1919 pwm3-out { 1920 samsung,pins = "gpb2-3"; 1921 samsung,pin-function = < 0x02 >; 1922 samsung,pin-pud = < 0x00 >; 1923 samsung,pin-drv = < 0x00 >; 1924 }; 1925 1926 i2c7-hs-bus { 1927 samsung,pins = "gpb2-2\0gpb2-3"; 1928 samsung,pin-function = < 0x03 >; 1929 samsung,pin-pud = < 0x03 >; 1930 samsung,pin-drv = < 0x00 >; 1931 phandle = < 0x23 >; 1932 }; 1933 1934 i2c0-bus { 1935 samsung,pins = "gpb3-0\0gpb3-1"; 1936 samsung,pin-function = < 0x02 >; 1937 samsung,pin-pud = < 0x03 >; 1938 samsung,pin-drv = < 0x00 >; 1939 phandle = < 0x06 >; 1940 }; 1941 1942 i2c1-bus { 1943 samsung,pins = "gpb3-2\0gpb3-3"; 1944 samsung,pin-function = < 0x02 >; 1945 samsung,pin-pud = < 0x03 >; 1946 samsung,pin-drv = < 0x00 >; 1947 phandle = < 0x07 >; 1948 }; 1949 1950 i2c8-hs-bus { 1951 samsung,pins = "gpb3-4\0gpb3-5"; 1952 samsung,pin-function = < 0x02 >; 1953 samsung,pin-pud = < 0x03 >; 1954 samsung,pin-drv = < 0x00 >; 1955 phandle = < 0x48 >; 1956 }; 1957 1958 i2c9-hs-bus { 1959 samsung,pins = "gpb3-6\0gpb3-7"; 1960 samsung,pin-function = < 0x02 >; 1961 samsung,pin-pud = < 0x03 >; 1962 samsung,pin-drv = < 0x00 >; 1963 phandle = < 0x49 >; 1964 }; 1965 1966 i2c10-hs-bus { 1967 samsung,pins = "gpb4-0\0gpb4-1"; 1968 samsung,pin-function = < 0x02 >; 1969 samsung,pin-pud = < 0x03 >; 1970 samsung,pin-drv = < 0x00 >; 1971 phandle = < 0x4a >; 1972 }; 1973 }; 1974 1975 pinctrl@3860000 { 1976 compatible = "samsung,exynos5420-pinctrl"; 1977 reg = < 0x3860000 0x1000 >; 1978 interrupts = < 0x00 0x2f 0x04 >; 1979 power-domains = < 0x29 >; 1980 1981 gpz { 1982 gpio-controller; 1983 #gpio-cells = < 0x02 >; 1984 interrupt-controller; 1985 #interrupt-cells = < 0x02 >; 1986 }; 1987 1988 i2s0-bus { 1989 samsung,pins = "gpz-0\0gpz-1\0gpz-2\0gpz-3\0gpz-4\0gpz-5\0gpz-6"; 1990 samsung,pin-function = < 0x02 >; 1991 samsung,pin-pud = < 0x00 >; 1992 samsung,pin-drv = < 0x00 >; 1993 phandle = < 0x40 >; 1994 }; 1995 }; 1996 1997 amba { 1998 #address-cells = < 0x01 >; 1999 #size-cells = < 0x01 >; 2000 compatible = "simple-bus"; 2001 interrupt-parent = < 0x01 >; 2002 ranges; 2003 2004 adma@3880000 { 2005 compatible = "arm,pl330\0arm,primecell"; 2006 reg = < 0x3880000 0x1000 >; 2007 interrupts = < 0x00 0x6e 0x04 >; 2008 clocks = < 0x2a 0x0a >; 2009 clock-names = "apb_pclk"; 2010 #dma-cells = < 0x01 >; 2011 #dma-channels = < 0x06 >; 2012 #dma-requests = < 0x10 >; 2013 power-domains = < 0x29 >; 2014 phandle = < 0x3f >; 2015 }; 2016 2017 pdma@121a0000 { 2018 compatible = "arm,pl330\0arm,primecell"; 2019 reg = < 0x121a0000 0x1000 >; 2020 interrupts = < 0x00 0x22 0x04 >; 2021 clocks = < 0x02 0x16a >; 2022 clock-names = "apb_pclk"; 2023 #dma-cells = < 0x01 >; 2024 #dma-channels = < 0x08 >; 2025 #dma-requests = < 0x20 >; 2026 phandle = < 0x03 >; 2027 }; 2028 2029 pdma@121b0000 { 2030 compatible = "arm,pl330\0arm,primecell"; 2031 reg = < 0x121b0000 0x1000 >; 2032 interrupts = < 0x00 0x23 0x04 >; 2033 clocks = < 0x02 0x16b >; 2034 clock-names = "apb_pclk"; 2035 #dma-cells = < 0x01 >; 2036 #dma-channels = < 0x08 >; 2037 #dma-requests = < 0x20 >; 2038 phandle = < 0x04 >; 2039 }; 2040 2041 mdma@10800000 { 2042 compatible = "arm,pl330\0arm,primecell"; 2043 reg = < 0x10800000 0x1000 >; 2044 interrupts = < 0x00 0x21 0x04 >; 2045 clocks = < 0x02 0x1d9 >; 2046 clock-names = "apb_pclk"; 2047 #dma-cells = < 0x01 >; 2048 #dma-channels = < 0x08 >; 2049 #dma-requests = < 0x01 >; 2050 }; 2051 2052 mdma@11c10000 { 2053 compatible = "arm,pl330\0arm,primecell"; 2054 reg = < 0x11c10000 0x1000 >; 2055 interrupts = < 0x00 0x7c 0x04 >; 2056 clocks = < 0x02 0x1ba >; 2057 clock-names = "apb_pclk"; 2058 #dma-cells = < 0x01 >; 2059 #dma-channels = < 0x08 >; 2060 #dma-requests = < 0x01 >; 2061 status = "disabled"; 2062 }; 2063 }; 2064 2065 i2s@3830000 { 2066 compatible = "samsung,exynos5420-i2s"; 2067 reg = < 0x3830000 0x100 >; 2068 dmas = < 0x3f 0x00 0x3f 0x02 0x3f 0x01 >; 2069 dma-names = "tx\0rx\0tx-sec"; 2070 clocks = < 0x2a 0x06 0x2a 0x06 0x2a 0x07 >; 2071 clock-names = "iis\0i2s_opclk0\0i2s_opclk1"; 2072 #clock-cells = < 0x01 >; 2073 clock-output-names = "i2s_cdclk0"; 2074 #sound-dai-cells = < 0x01 >; 2075 samsung,idma-addr = < 0x3000000 >; 2076 pinctrl-names = "default"; 2077 pinctrl-0 = < 0x40 >; 2078 power-domains = < 0x29 >; 2079 status = "okay"; 2080 phandle = < 0x9a >; 2081 }; 2082 2083 i2s@12d60000 { 2084 compatible = "samsung,exynos5420-i2s"; 2085 reg = < 0x12d60000 0x100 >; 2086 dmas = < 0x04 0x0c 0x04 0x0b >; 2087 dma-names = "tx\0rx"; 2088 clocks = < 0x02 0x113 0x02 0x8a >; 2089 clock-names = "iis\0i2s_opclk0"; 2090 #clock-cells = < 0x01 >; 2091 clock-output-names = "i2s_cdclk1"; 2092 #sound-dai-cells = < 0x01 >; 2093 pinctrl-names = "default"; 2094 pinctrl-0 = < 0x41 >; 2095 status = "disabled"; 2096 }; 2097 2098 i2s@12d70000 { 2099 compatible = "samsung,exynos5420-i2s"; 2100 reg = < 0x12d70000 0x100 >; 2101 dmas = < 0x03 0x0c 0x03 0x0b >; 2102 dma-names = "tx\0rx"; 2103 clocks = < 0x02 0x114 0x02 0x8b >; 2104 clock-names = "iis\0i2s_opclk0"; 2105 #clock-cells = < 0x01 >; 2106 clock-output-names = "i2s_cdclk2"; 2107 #sound-dai-cells = < 0x01 >; 2108 pinctrl-names = "default"; 2109 pinctrl-0 = < 0x42 >; 2110 status = "disabled"; 2111 }; 2112 2113 spi@12d20000 { 2114 compatible = "samsung,exynos4210-spi"; 2115 reg = < 0x12d20000 0x100 >; 2116 interrupts = < 0x00 0x44 0x04 >; 2117 dmas = < 0x03 0x05 0x03 0x04 >; 2118 dma-names = "tx\0rx"; 2119 #address-cells = < 0x01 >; 2120 #size-cells = < 0x00 >; 2121 pinctrl-names = "default"; 2122 pinctrl-0 = < 0x43 >; 2123 clocks = < 0x02 0x10f 0x02 0x87 >; 2124 clock-names = "spi\0spi_busclk0"; 2125 status = "disabled"; 2126 }; 2127 2128 spi@12d30000 { 2129 compatible = "samsung,exynos4210-spi"; 2130 reg = < 0x12d30000 0x100 >; 2131 interrupts = < 0x00 0x45 0x04 >; 2132 dmas = < 0x04 0x05 0x04 0x04 >; 2133 dma-names = "tx\0rx"; 2134 #address-cells = < 0x01 >; 2135 #size-cells = < 0x00 >; 2136 pinctrl-names = "default"; 2137 pinctrl-0 = < 0x44 >; 2138 clocks = < 0x02 0x110 0x02 0x88 >; 2139 clock-names = "spi\0spi_busclk0"; 2140 status = "disabled"; 2141 }; 2142 2143 spi@12d40000 { 2144 compatible = "samsung,exynos4210-spi"; 2145 reg = < 0x12d40000 0x100 >; 2146 interrupts = < 0x00 0x46 0x04 >; 2147 dmas = < 0x03 0x07 0x03 0x06 >; 2148 dma-names = "tx\0rx"; 2149 #address-cells = < 0x01 >; 2150 #size-cells = < 0x00 >; 2151 pinctrl-names = "default"; 2152 pinctrl-0 = < 0x45 >; 2153 clocks = < 0x02 0x111 0x02 0x89 >; 2154 clock-names = "spi\0spi_busclk0"; 2155 status = "disabled"; 2156 }; 2157 2158 dp-video-phy { 2159 compatible = "samsung,exynos5420-dp-video-phy"; 2160 samsung,pmu-syscon = < 0x0d >; 2161 #phy-cells = < 0x00 >; 2162 phandle = < 0x12 >; 2163 }; 2164 2165 mipi-video-phy { 2166 compatible = "samsung,s5pv210-mipi-video-phy"; 2167 syscon = < 0x0d >; 2168 #phy-cells = < 0x01 >; 2169 phandle = < 0x46 >; 2170 }; 2171 2172 dsi@14500000 { 2173 compatible = "samsung,exynos5410-mipi-dsi"; 2174 reg = < 0x14500000 0x10000 >; 2175 interrupts = < 0x00 0x52 0x04 >; 2176 phys = < 0x46 0x01 >; 2177 phy-names = "dsim"; 2178 clocks = < 0x02 0x19b 0x02 0x92 >; 2179 clock-names = "bus_clk\0pll_clk"; 2180 #address-cells = < 0x01 >; 2181 #size-cells = < 0x00 >; 2182 status = "disabled"; 2183 }; 2184 2185 adc@12d10000 { 2186 compatible = "samsung,exynos-adc-v2"; 2187 reg = < 0x12d10000 0x100 >; 2188 interrupts = < 0x00 0x6a 0x04 >; 2189 clocks = < 0x02 0x10e >; 2190 clock-names = "adc"; 2191 #io-channel-cells = < 0x01 >; 2192 io-channel-ranges; 2193 samsung,syscon-phandle = < 0x0d >; 2194 status = "okay"; 2195 vdd-supply = < 0x47 >; 2196 }; 2197 2198 i2c@12e00000 { 2199 compatible = "samsung,exynos5250-hsi2c"; 2200 reg = < 0x12e00000 0x1000 >; 2201 interrupts = < 0x00 0x57 0x04 >; 2202 #address-cells = < 0x01 >; 2203 #size-cells = < 0x00 >; 2204 pinctrl-names = "default"; 2205 pinctrl-0 = < 0x48 >; 2206 clocks = < 0x02 0x119 >; 2207 clock-names = "hsi2c"; 2208 status = "disabled"; 2209 }; 2210 2211 i2c@12e10000 { 2212 compatible = "samsung,exynos5250-hsi2c"; 2213 reg = < 0x12e10000 0x1000 >; 2214 interrupts = < 0x00 0x58 0x04 >; 2215 #address-cells = < 0x01 >; 2216 #size-cells = < 0x00 >; 2217 pinctrl-names = "default"; 2218 pinctrl-0 = < 0x49 >; 2219 clocks = < 0x02 0x11a >; 2220 clock-names = "hsi2c"; 2221 status = "disabled"; 2222 }; 2223 2224 i2c@12e20000 { 2225 compatible = "samsung,exynos5250-hsi2c"; 2226 reg = < 0x12e20000 0x1000 >; 2227 interrupts = < 0x00 0xcb 0x04 >; 2228 #address-cells = < 0x01 >; 2229 #size-cells = < 0x00 >; 2230 pinctrl-names = "default"; 2231 pinctrl-0 = < 0x4a >; 2232 clocks = < 0x02 0x11b >; 2233 clock-names = "hsi2c"; 2234 status = "disabled"; 2235 }; 2236 2237 hdmi@14530000 { 2238 compatible = "samsung,exynos5420-hdmi"; 2239 reg = < 0x14530000 0x70000 >; 2240 interrupts = < 0x00 0x5f 0x04 >; 2241 clocks = < 0x02 0x19d 0x02 0x8f 0x02 0x300 0x02 0x9e 0x02 0x280 >; 2242 clock-names = "hdmi\0sclk_hdmi\0sclk_pixel\0sclk_hdmiphy\0mout_hdmi"; 2243 phy = < 0x4b >; 2244 samsung,syscon-phandle = < 0x0d >; 2245 status = "okay"; 2246 power-domains = < 0x0f >; 2247 #sound-dai-cells = < 0x00 >; 2248 ddc = < 0x4c >; 2249 hpd-gpios = < 0x4d 0x07 0x00 >; 2250 pinctrl-names = "default"; 2251 pinctrl-0 = < 0x4e >; 2252 vdd_osc-supply = < 0x4f >; 2253 vdd_pll-supply = < 0x50 >; 2254 vdd-supply = < 0x50 >; 2255 phandle = < 0x51 >; 2256 }; 2257 2258 hdmiphy@145d0000 { 2259 reg = < 0x145d0000 0x20 >; 2260 phandle = < 0x4b >; 2261 }; 2262 2263 cec@101b0000 { 2264 compatible = "samsung,s5p-cec"; 2265 reg = < 0x101b0000 0x200 >; 2266 interrupts = < 0x00 0x72 0x04 >; 2267 clocks = < 0x02 0x139 >; 2268 clock-names = "hdmicec"; 2269 samsung,syscon-phandle = < 0x0d >; 2270 hdmi-phandle = < 0x51 >; 2271 pinctrl-names = "default"; 2272 pinctrl-0 = < 0x52 >; 2273 status = "okay"; 2274 needs-hpd; 2275 }; 2276 2277 mixer@14450000 { 2278 compatible = "samsung,exynos5420-mixer"; 2279 reg = < 0x14450000 0x10000 >; 2280 interrupts = < 0x00 0x5e 0x04 >; 2281 clocks = < 0x02 0x1af 0x02 0x19d 0x02 0x8f >; 2282 clock-names = "mixer\0hdmi\0sclk_hdmi"; 2283 power-domains = < 0x0f >; 2284 iommus = < 0x53 >; 2285 status = "okay"; 2286 }; 2287 2288 rotator@11c00000 { 2289 compatible = "samsung,exynos5250-rotator"; 2290 reg = < 0x11c00000 0x64 >; 2291 interrupts = < 0x00 0x54 0x04 >; 2292 clocks = < 0x02 0x1b9 >; 2293 clock-names = "rotator"; 2294 iommus = < 0x54 >; 2295 }; 2296 2297 video-scaler@13e00000 { 2298 compatible = "samsung,exynos5420-gsc\0samsung,exynos5-gsc"; 2299 reg = < 0x13e00000 0x1000 >; 2300 interrupts = < 0x00 0x55 0x04 >; 2301 clocks = < 0x02 0x1d1 >; 2302 clock-names = "gscl"; 2303 power-domains = < 0x55 >; 2304 iommus = < 0x56 >; 2305 }; 2306 2307 video-scaler@13e10000 { 2308 compatible = "samsung,exynos5420-gsc\0samsung,exynos5-gsc"; 2309 reg = < 0x13e10000 0x1000 >; 2310 interrupts = < 0x00 0x56 0x04 >; 2311 clocks = < 0x02 0x1d2 >; 2312 clock-names = "gscl"; 2313 power-domains = < 0x55 >; 2314 iommus = < 0x57 >; 2315 }; 2316 2317 scaler@12800000 { 2318 compatible = "samsung,exynos5420-scaler"; 2319 reg = < 0x12800000 0x1294 >; 2320 interrupts = < 0x00 0xdc 0x04 >; 2321 clocks = < 0x02 0x17d >; 2322 clock-names = "mscl"; 2323 power-domains = < 0x58 >; 2324 iommus = < 0x59 0x5a >; 2325 }; 2326 2327 scaler@12810000 { 2328 compatible = "samsung,exynos5420-scaler"; 2329 reg = < 0x12810000 0x1294 >; 2330 interrupts = < 0x00 0xdd 0x04 >; 2331 clocks = < 0x02 0x17e >; 2332 clock-names = "mscl"; 2333 power-domains = < 0x58 >; 2334 iommus = < 0x5b 0x5c >; 2335 }; 2336 2337 scaler@12820000 { 2338 compatible = "samsung,exynos5420-scaler"; 2339 reg = < 0x12820000 0x1294 >; 2340 interrupts = < 0x00 0xde 0x04 >; 2341 clocks = < 0x02 0x17f >; 2342 clock-names = "mscl"; 2343 power-domains = < 0x58 >; 2344 iommus = < 0x5d 0x5e >; 2345 }; 2346 2347 jpeg@11f50000 { 2348 compatible = "samsung,exynos5420-jpeg"; 2349 reg = < 0x11f50000 0x1000 >; 2350 interrupts = < 0x00 0x59 0x04 >; 2351 clock-names = "jpeg"; 2352 clocks = < 0x02 0x1c3 >; 2353 iommus = < 0x5f >; 2354 }; 2355 2356 jpeg@11f60000 { 2357 compatible = "samsung,exynos5420-jpeg"; 2358 reg = < 0x11f60000 0x1000 >; 2359 interrupts = < 0x00 0xa8 0x04 >; 2360 clock-names = "jpeg"; 2361 clocks = < 0x02 0x1c4 >; 2362 iommus = < 0x60 >; 2363 }; 2364 2365 system-controller@10040000 { 2366 compatible = "samsung,exynos5420-pmu\0syscon"; 2367 reg = < 0x10040000 0x5000 >; 2368 clock-names = "clkout16"; 2369 clocks = < 0x02 0x01 >; 2370 #clock-cells = < 0x01 >; 2371 interrupt-controller; 2372 #interrupt-cells = < 0x03 >; 2373 interrupt-parent = < 0x01 >; 2374 phandle = < 0x0d >; 2375 2376 syscon-poweroff { 2377 compatible = "syscon-poweroff"; 2378 regmap = < 0x0d >; 2379 offset = < 0x330c >; 2380 mask = < 0x5200 >; 2381 }; 2382 2383 syscon-reboot { 2384 compatible = "syscon-reboot"; 2385 regmap = < 0x0d >; 2386 offset = < 0x400 >; 2387 mask = < 0x01 >; 2388 }; 2389 }; 2390 2391 tmu@10060000 { 2392 compatible = "samsung,exynos5420-tmu"; 2393 reg = < 0x10060000 0x100 >; 2394 interrupts = < 0x00 0x41 0x04 >; 2395 clocks = < 0x02 0x13e >; 2396 clock-names = "tmu_apbif"; 2397 #thermal-sensor-cells = < 0x00 >; 2398 vtmu-supply = < 0x4f >; 2399 phandle = < 0x76 >; 2400 }; 2401 2402 tmu@10064000 { 2403 compatible = "samsung,exynos5420-tmu"; 2404 reg = < 0x10064000 0x100 >; 2405 interrupts = < 0x00 0xb7 0x04 >; 2406 clocks = < 0x02 0x13e >; 2407 clock-names = "tmu_apbif"; 2408 #thermal-sensor-cells = < 0x00 >; 2409 vtmu-supply = < 0x4f >; 2410 phandle = < 0x7d >; 2411 }; 2412 2413 tmu@10068000 { 2414 compatible = "samsung,exynos5420-tmu-ext-triminfo"; 2415 reg = < 0x10068000 0x100 0x1006c000 0x04 >; 2416 interrupts = < 0x00 0xb8 0x04 >; 2417 clocks = < 0x02 0x13e 0x02 0x13e >; 2418 clock-names = "tmu_apbif\0tmu_triminfo_apbif"; 2419 #thermal-sensor-cells = < 0x00 >; 2420 vtmu-supply = < 0x4f >; 2421 phandle = < 0x83 >; 2422 }; 2423 2424 tmu@1006c000 { 2425 compatible = "samsung,exynos5420-tmu-ext-triminfo"; 2426 reg = < 0x1006c000 0x100 0x100a0000 0x04 >; 2427 interrupts = < 0x00 0xb9 0x04 >; 2428 clocks = < 0x02 0x13e 0x02 0x13f >; 2429 clock-names = "tmu_apbif\0tmu_triminfo_apbif"; 2430 #thermal-sensor-cells = < 0x00 >; 2431 vtmu-supply = < 0x4f >; 2432 phandle = < 0x89 >; 2433 }; 2434 2435 tmu@100a0000 { 2436 compatible = "samsung,exynos5420-tmu-ext-triminfo"; 2437 reg = < 0x100a0000 0x100 0x10068000 0x04 >; 2438 interrupts = < 0x00 0xd7 0x04 >; 2439 clocks = < 0x02 0x13f 0x02 0x13e >; 2440 clock-names = "tmu_apbif\0tmu_triminfo_apbif"; 2441 #thermal-sensor-cells = < 0x00 >; 2442 vtmu-supply = < 0x4f >; 2443 phandle = < 0x8f >; 2444 }; 2445 2446 sysmmu@10a60000 { 2447 compatible = "samsung,exynos-sysmmu"; 2448 reg = < 0x10a60000 0x1000 >; 2449 interrupt-parent = < 0x0e >; 2450 interrupts = < 0x18 0x05 >; 2451 clock-names = "sysmmu\0master"; 2452 clocks = < 0x02 0x1f7 0x02 0x1e1 >; 2453 #iommu-cells = < 0x00 >; 2454 phandle = < 0x13 >; 2455 }; 2456 2457 sysmmu@10a70000 { 2458 compatible = "samsung,exynos-sysmmu"; 2459 reg = < 0x10a70000 0x1000 >; 2460 interrupt-parent = < 0x0e >; 2461 interrupts = < 0x16 0x02 >; 2462 clock-names = "sysmmu\0master"; 2463 clocks = < 0x02 0x1f7 0x02 0x1e1 >; 2464 #iommu-cells = < 0x00 >; 2465 phandle = < 0x14 >; 2466 }; 2467 2468 sysmmu@14650000 { 2469 compatible = "samsung,exynos-sysmmu"; 2470 reg = < 0x14650000 0x1000 >; 2471 interrupt-parent = < 0x0e >; 2472 interrupts = < 0x07 0x04 >; 2473 clock-names = "sysmmu\0master"; 2474 clocks = < 0x02 0x1f6 0x02 0x1af >; 2475 power-domains = < 0x0f >; 2476 #iommu-cells = < 0x00 >; 2477 phandle = < 0x53 >; 2478 }; 2479 2480 sysmmu@13e80000 { 2481 compatible = "samsung,exynos-sysmmu"; 2482 reg = < 0x13e80000 0x1000 >; 2483 interrupt-parent = < 0x0e >; 2484 interrupts = < 0x02 0x00 >; 2485 clock-names = "sysmmu\0master"; 2486 clocks = < 0x02 0x1cd 0x02 0x1d1 >; 2487 power-domains = < 0x55 >; 2488 #iommu-cells = < 0x00 >; 2489 phandle = < 0x56 >; 2490 }; 2491 2492 sysmmu@13e90000 { 2493 compatible = "samsung,exynos-sysmmu"; 2494 reg = < 0x13e90000 0x1000 >; 2495 interrupt-parent = < 0x0e >; 2496 interrupts = < 0x02 0x02 >; 2497 clock-names = "sysmmu\0master"; 2498 clocks = < 0x02 0x1ce 0x02 0x1d2 >; 2499 power-domains = < 0x55 >; 2500 #iommu-cells = < 0x00 >; 2501 phandle = < 0x57 >; 2502 }; 2503 2504 sysmmu@12880000 { 2505 compatible = "samsung,exynos-sysmmu"; 2506 reg = < 0x12880000 0x1000 >; 2507 interrupt-parent = < 0x0e >; 2508 interrupts = < 0x16 0x04 >; 2509 clock-names = "sysmmu\0master"; 2510 clocks = < 0x02 0x180 0x02 0x17d >; 2511 power-domains = < 0x58 >; 2512 #iommu-cells = < 0x00 >; 2513 phandle = < 0x59 >; 2514 }; 2515 2516 sysmmu@12890000 { 2517 compatible = "samsung,exynos-sysmmu"; 2518 reg = < 0x12890000 0x1000 >; 2519 interrupts = < 0x00 0xba 0x04 >; 2520 clock-names = "sysmmu\0master"; 2521 clocks = < 0x02 0x181 0x02 0x17e >; 2522 power-domains = < 0x58 >; 2523 #iommu-cells = < 0x00 >; 2524 phandle = < 0x5b >; 2525 }; 2526 2527 sysmmu@128a0000 { 2528 compatible = "samsung,exynos-sysmmu"; 2529 reg = < 0x128a0000 0x1000 >; 2530 interrupts = < 0x00 0xbc 0x04 >; 2531 clock-names = "sysmmu\0master"; 2532 clocks = < 0x02 0x182 0x02 0x17f >; 2533 power-domains = < 0x58 >; 2534 #iommu-cells = < 0x00 >; 2535 phandle = < 0x5d >; 2536 }; 2537 2538 sysmmu@128c0000 { 2539 compatible = "samsung,exynos-sysmmu"; 2540 reg = < 0x128c0000 0x1000 >; 2541 interrupt-parent = < 0x0e >; 2542 interrupts = < 0x1b 0x02 >; 2543 clock-names = "sysmmu\0master"; 2544 clocks = < 0x02 0x180 0x02 0x17d >; 2545 power-domains = < 0x58 >; 2546 #iommu-cells = < 0x00 >; 2547 phandle = < 0x5a >; 2548 }; 2549 2550 sysmmu@128d0000 { 2551 compatible = "samsung,exynos-sysmmu"; 2552 reg = < 0x128d0000 0x1000 >; 2553 interrupt-parent = < 0x0e >; 2554 interrupts = < 0x16 0x06 >; 2555 clock-names = "sysmmu\0master"; 2556 clocks = < 0x02 0x181 0x02 0x17e >; 2557 power-domains = < 0x58 >; 2558 #iommu-cells = < 0x00 >; 2559 phandle = < 0x5c >; 2560 }; 2561 2562 sysmmu@128e0000 { 2563 compatible = "samsung,exynos-sysmmu"; 2564 reg = < 0x128e0000 0x1000 >; 2565 interrupt-parent = < 0x0e >; 2566 interrupts = < 0x13 0x06 >; 2567 clock-names = "sysmmu\0master"; 2568 clocks = < 0x02 0x182 0x02 0x17f >; 2569 power-domains = < 0x58 >; 2570 #iommu-cells = < 0x00 >; 2571 phandle = < 0x5e >; 2572 }; 2573 2574 sysmmu@11d40000 { 2575 compatible = "samsung,exynos-sysmmu"; 2576 reg = < 0x11d40000 0x1000 >; 2577 interrupt-parent = < 0x0e >; 2578 interrupts = < 0x04 0x00 >; 2579 clock-names = "sysmmu\0master"; 2580 clocks = < 0x02 0x1bb 0x02 0x1b9 >; 2581 #iommu-cells = < 0x00 >; 2582 phandle = < 0x54 >; 2583 }; 2584 2585 sysmmu@11f10000 { 2586 compatible = "samsung,exynos-sysmmu"; 2587 reg = < 0x11f10000 0x1000 >; 2588 interrupt-parent = < 0x0e >; 2589 interrupts = < 0x04 0x02 >; 2590 clock-names = "sysmmu\0master"; 2591 clocks = < 0x02 0x1c5 0x02 0x1c3 >; 2592 #iommu-cells = < 0x00 >; 2593 phandle = < 0x5f >; 2594 }; 2595 2596 sysmmu@11f20000 { 2597 compatible = "samsung,exynos-sysmmu"; 2598 reg = < 0x11f20000 0x1000 >; 2599 interrupts = < 0x00 0xa9 0x04 >; 2600 clock-names = "sysmmu\0master"; 2601 clocks = < 0x02 0x1c6 0x02 0x1c4 >; 2602 #iommu-cells = < 0x00 >; 2603 phandle = < 0x60 >; 2604 }; 2605 2606 sysmmu@11200000 { 2607 compatible = "samsung,exynos-sysmmu"; 2608 reg = < 0x11200000 0x1000 >; 2609 interrupt-parent = < 0x0e >; 2610 interrupts = < 0x06 0x02 >; 2611 clock-names = "sysmmu\0master"; 2612 clocks = < 0x02 0x192 0x02 0x191 >; 2613 power-domains = < 0x2b >; 2614 #iommu-cells = < 0x00 >; 2615 phandle = < 0x2c >; 2616 }; 2617 2618 sysmmu@11210000 { 2619 compatible = "samsung,exynos-sysmmu"; 2620 reg = < 0x11210000 0x1000 >; 2621 interrupt-parent = < 0x0e >; 2622 interrupts = < 0x08 0x05 >; 2623 clock-names = "sysmmu\0master"; 2624 clocks = < 0x02 0x193 0x02 0x191 >; 2625 power-domains = < 0x2b >; 2626 #iommu-cells = < 0x00 >; 2627 phandle = < 0x2d >; 2628 }; 2629 2630 sysmmu@14640000 { 2631 compatible = "samsung,exynos-sysmmu"; 2632 reg = < 0x14640000 0x1000 >; 2633 interrupt-parent = < 0x0e >; 2634 interrupts = < 0x03 0x02 >; 2635 clock-names = "sysmmu\0master"; 2636 clocks = < 0x02 0x1a6 0x02 0x1a5 >; 2637 power-domains = < 0x0f >; 2638 #iommu-cells = < 0x00 >; 2639 phandle = < 0x10 >; 2640 }; 2641 2642 sysmmu@14680000 { 2643 compatible = "samsung,exynos-sysmmu"; 2644 reg = < 0x14680000 0x1000 >; 2645 interrupt-parent = < 0x0e >; 2646 interrupts = < 0x03 0x00 >; 2647 clock-names = "sysmmu\0master"; 2648 clocks = < 0x02 0x1a7 0x02 0x1a5 >; 2649 power-domains = < 0x0f >; 2650 #iommu-cells = < 0x00 >; 2651 phandle = < 0x11 >; 2652 }; 2653 2654 bus_wcore { 2655 compatible = "samsung,exynos-bus"; 2656 clocks = < 0x02 0x301 >; 2657 clock-names = "bus"; 2658 operating-points-v2 = < 0x61 >; 2659 status = "okay"; 2660 devfreq-events = < 0x62 0x63 0x64 0x65 >; 2661 vdd-supply = < 0x66 >; 2662 exynos,saturation-ratio = < 0x64 >; 2663 phandle = < 0x68 >; 2664 }; 2665 2666 bus_noc { 2667 compatible = "samsung,exynos-bus"; 2668 clocks = < 0x02 0x306 >; 2669 clock-names = "bus"; 2670 operating-points-v2 = < 0x67 >; 2671 status = "okay"; 2672 devfreq = < 0x68 >; 2673 }; 2674 2675 bus_fsys_apb { 2676 compatible = "samsung,exynos-bus"; 2677 clocks = < 0x02 0x307 >; 2678 clock-names = "bus"; 2679 operating-points-v2 = < 0x69 >; 2680 status = "okay"; 2681 devfreq = < 0x68 >; 2682 }; 2683 2684 bus_fsys { 2685 compatible = "samsung,exynos-bus"; 2686 clocks = < 0x02 0x308 >; 2687 clock-names = "bus"; 2688 operating-points-v2 = < 0x69 >; 2689 status = "okay"; 2690 devfreq = < 0x68 >; 2691 }; 2692 2693 bus_fsys2 { 2694 compatible = "samsung,exynos-bus"; 2695 clocks = < 0x02 0x305 >; 2696 clock-names = "bus"; 2697 operating-points-v2 = < 0x6a >; 2698 status = "okay"; 2699 devfreq = < 0x68 >; 2700 }; 2701 2702 bus_mfc { 2703 compatible = "samsung,exynos-bus"; 2704 clocks = < 0x02 0x30f >; 2705 clock-names = "bus"; 2706 operating-points-v2 = < 0x6b >; 2707 status = "okay"; 2708 devfreq = < 0x68 >; 2709 }; 2710 2711 bus_gen { 2712 compatible = "samsung,exynos-bus"; 2713 clocks = < 0x02 0x30d >; 2714 clock-names = "bus"; 2715 operating-points-v2 = < 0x6c >; 2716 status = "okay"; 2717 devfreq = < 0x68 >; 2718 }; 2719 2720 bus_peri { 2721 compatible = "samsung,exynos-bus"; 2722 clocks = < 0x02 0x30b >; 2723 clock-names = "bus"; 2724 operating-points-v2 = < 0x6d >; 2725 status = "okay"; 2726 devfreq = < 0x68 >; 2727 }; 2728 2729 bus_g2d { 2730 compatible = "samsung,exynos-bus"; 2731 clocks = < 0x02 0x310 >; 2732 clock-names = "bus"; 2733 operating-points-v2 = < 0x6e >; 2734 status = "okay"; 2735 devfreq = < 0x68 >; 2736 }; 2737 2738 bus_g2d_acp { 2739 compatible = "samsung,exynos-bus"; 2740 clocks = < 0x02 0x311 >; 2741 clock-names = "bus"; 2742 operating-points-v2 = < 0x6f >; 2743 status = "okay"; 2744 devfreq = < 0x68 >; 2745 }; 2746 2747 bus_jpeg { 2748 compatible = "samsung,exynos-bus"; 2749 clocks = < 0x02 0x313 >; 2750 clock-names = "bus"; 2751 operating-points-v2 = < 0x70 >; 2752 status = "okay"; 2753 devfreq = < 0x68 >; 2754 }; 2755 2756 bus_jpeg_apb { 2757 compatible = "samsung,exynos-bus"; 2758 clocks = < 0x02 0x30e >; 2759 clock-names = "bus"; 2760 operating-points-v2 = < 0x71 >; 2761 status = "okay"; 2762 devfreq = < 0x68 >; 2763 }; 2764 2765 bus_disp1_fimd { 2766 compatible = "samsung,exynos-bus"; 2767 clocks = < 0x02 0x314 >; 2768 clock-names = "bus"; 2769 operating-points-v2 = < 0x72 >; 2770 status = "okay"; 2771 devfreq = < 0x68 >; 2772 }; 2773 2774 bus_disp1 { 2775 compatible = "samsung,exynos-bus"; 2776 clocks = < 0x02 0x316 >; 2777 clock-names = "bus"; 2778 operating-points-v2 = < 0x73 >; 2779 status = "okay"; 2780 devfreq = < 0x68 >; 2781 }; 2782 2783 bus_gscl_scaler { 2784 compatible = "samsung,exynos-bus"; 2785 clocks = < 0x02 0x315 >; 2786 clock-names = "bus"; 2787 operating-points-v2 = < 0x74 >; 2788 status = "okay"; 2789 devfreq = < 0x68 >; 2790 }; 2791 2792 bus_mscl { 2793 compatible = "samsung,exynos-bus"; 2794 clocks = < 0x02 0x303 >; 2795 clock-names = "bus"; 2796 operating-points-v2 = < 0x75 >; 2797 status = "okay"; 2798 devfreq = < 0x68 >; 2799 }; 2800 2801 opp_table2 { 2802 compatible = "operating-points-v2"; 2803 phandle = < 0x61 >; 2804 2805 opp00 { 2806 opp-hz = < 0x00 0x501bd00 >; 2807 opp-microvolt = < 0xe1d48 >; 2808 }; 2809 2810 opp01 { 2811 opp-hz = < 0x00 0x69db9c0 >; 2812 opp-microvolt = < 0xe7ef0 >; 2813 }; 2814 2815 opp02 { 2816 opp-hz = < 0x00 0xd3b7380 >; 2817 opp-microvolt = < 0xe7ef0 >; 2818 }; 2819 2820 opp03 { 2821 opp-hz = < 0x00 0x13d92d40 >; 2822 opp-microvolt = < 0xe7ef0 >; 2823 }; 2824 2825 opp04 { 2826 opp-hz = < 0x00 0x17d78400 >; 2827 opp-microvolt = < 0xf116c >; 2828 }; 2829 }; 2830 2831 opp_table3 { 2832 compatible = "operating-points-v2"; 2833 phandle = < 0x67 >; 2834 2835 opp00 { 2836 opp-hz = < 0x00 0x3fe56c0 >; 2837 }; 2838 2839 opp01 { 2840 opp-hz = < 0x00 0x47868c0 >; 2841 }; 2842 2843 opp02 { 2844 opp-hz = < 0x00 0x5204180 >; 2845 }; 2846 2847 opp03 { 2848 opp-hz = < 0x00 0x5f5e100 >; 2849 }; 2850 }; 2851 2852 opp_table4 { 2853 compatible = "operating-points-v2"; 2854 opp-shared; 2855 phandle = < 0x69 >; 2856 2857 opp00 { 2858 opp-hz = < 0x00 0x5f5e100 >; 2859 }; 2860 2861 opp01 { 2862 opp-hz = < 0x00 0xbebc200 >; 2863 }; 2864 }; 2865 2866 opp_table5 { 2867 compatible = "operating-points-v2"; 2868 phandle = < 0x6a >; 2869 2870 opp00 { 2871 opp-hz = < 0x00 0x47868c0 >; 2872 }; 2873 2874 opp01 { 2875 opp-hz = < 0x00 0x5f5e100 >; 2876 }; 2877 2878 opp02 { 2879 opp-hz = < 0x00 0x8f0d180 >; 2880 }; 2881 }; 2882 2883 opp_table6 { 2884 compatible = "operating-points-v2"; 2885 phandle = < 0x6b >; 2886 2887 opp00 { 2888 opp-hz = < 0x00 0x5b8d800 >; 2889 }; 2890 2891 opp01 { 2892 opp-hz = < 0x00 0x69db9c0 >; 2893 }; 2894 2895 opp02 { 2896 opp-hz = < 0x00 0x9f437c0 >; 2897 }; 2898 2899 opp03 { 2900 opp-hz = < 0x00 0xd3b7380 >; 2901 }; 2902 2903 opp04 { 2904 opp-hz = < 0x00 0x13d92d40 >; 2905 }; 2906 }; 2907 2908 opp_table7 { 2909 compatible = "operating-points-v2"; 2910 phandle = < 0x6c >; 2911 2912 opp00 { 2913 opp-hz = < 0x00 0x54e0840 >; 2914 }; 2915 2916 opp01 { 2917 opp-hz = < 0x00 0x7ed6b40 >; 2918 }; 2919 2920 opp02 { 2921 opp-hz = < 0x00 0xa9c1080 >; 2922 }; 2923 2924 opp03 { 2925 opp-hz = < 0x00 0xfea18c0 >; 2926 }; 2927 }; 2928 2929 opp_table8 { 2930 compatible = "operating-points-v2"; 2931 phandle = < 0x6d >; 2932 2933 opp00 { 2934 opp-hz = < 0x00 0x3fe56c0 >; 2935 }; 2936 }; 2937 2938 opp_table9 { 2939 compatible = "operating-points-v2"; 2940 phandle = < 0x6e >; 2941 2942 opp00 { 2943 opp-hz = < 0x00 0x501bd00 >; 2944 }; 2945 2946 opp01 { 2947 opp-hz = < 0x00 0x9f437c0 >; 2948 }; 2949 2950 opp02 { 2951 opp-hz = < 0x00 0xd3b7380 >; 2952 }; 2953 2954 opp03 { 2955 opp-hz = < 0x00 0x11e1a300 >; 2956 }; 2957 2958 opp04 { 2959 opp-hz = < 0x00 0x13d92d40 >; 2960 }; 2961 }; 2962 2963 opp_table10 { 2964 compatible = "operating-points-v2"; 2965 phandle = < 0x6f >; 2966 2967 opp00 { 2968 opp-hz = < 0x00 0x3fe56c0 >; 2969 }; 2970 2971 opp01 { 2972 opp-hz = < 0x00 0x7ed6b40 >; 2973 }; 2974 2975 opp02 { 2976 opp-hz = < 0x00 0xa9c1080 >; 2977 }; 2978 2979 opp03 { 2980 opp-hz = < 0x00 0xfea18c0 >; 2981 }; 2982 }; 2983 2984 opp_table11 { 2985 compatible = "operating-points-v2"; 2986 phandle = < 0x70 >; 2987 2988 opp00 { 2989 opp-hz = < 0x00 0x47868c0 >; 2990 }; 2991 2992 opp01 { 2993 opp-hz = < 0x00 0x8f0d180 >; 2994 }; 2995 2996 opp02 { 2997 opp-hz = < 0x00 0xbebc200 >; 2998 }; 2999 3000 opp03 { 3001 opp-hz = < 0x00 0x11e1a300 >; 3002 }; 3003 }; 3004 3005 opp_table12 { 3006 compatible = "operating-points-v2"; 3007 phandle = < 0x71 >; 3008 3009 opp00 { 3010 opp-hz = < 0x00 0x501bd00 >; 3011 }; 3012 3013 opp01 { 3014 opp-hz = < 0x00 0x69db9c0 >; 3015 }; 3016 3017 opp02 { 3018 opp-hz = < 0x00 0x7fcad80 >; 3019 }; 3020 3021 opp03 { 3022 opp-hz = < 0x00 0x9f437c0 >; 3023 }; 3024 }; 3025 3026 opp_table13 { 3027 compatible = "operating-points-v2"; 3028 phandle = < 0x72 >; 3029 3030 opp00 { 3031 opp-hz = < 0x00 0x7270e00 >; 3032 }; 3033 3034 opp01 { 3035 opp-hz = < 0x00 0xbebc200 >; 3036 }; 3037 }; 3038 3039 opp_table14 { 3040 compatible = "operating-points-v2"; 3041 phandle = < 0x73 >; 3042 3043 opp00 { 3044 opp-hz = < 0x00 0x7270e00 >; 3045 }; 3046 3047 opp01 { 3048 opp-hz = < 0x00 0xbebc200 >; 3049 }; 3050 3051 opp02 { 3052 opp-hz = < 0x00 0x11e1a300 >; 3053 }; 3054 }; 3055 3056 opp_table15 { 3057 compatible = "operating-points-v2"; 3058 phandle = < 0x74 >; 3059 3060 opp00 { 3061 opp-hz = < 0x00 0x8f0d180 >; 3062 }; 3063 3064 opp01 { 3065 opp-hz = < 0x00 0xbebc200 >; 3066 }; 3067 3068 opp02 { 3069 opp-hz = < 0x00 0x11e1a300 >; 3070 }; 3071 }; 3072 3073 opp_table16 { 3074 compatible = "operating-points-v2"; 3075 phandle = < 0x75 >; 3076 3077 opp00 { 3078 opp-hz = < 0x00 0x501bd00 >; 3079 }; 3080 3081 opp01 { 3082 opp-hz = < 0x00 0x9f437c0 >; 3083 }; 3084 3085 opp02 { 3086 opp-hz = < 0x00 0xd3b7380 >; 3087 }; 3088 3089 opp03 { 3090 opp-hz = < 0x00 0x13d92d40 >; 3091 }; 3092 3093 opp04 { 3094 opp-hz = < 0x00 0x17d78400 >; 3095 }; 3096 }; 3097 }; 3098 3099 thermal-zones { 3100 3101 cpu0-thermal { 3102 thermal-sensors = < 0x76 0x00 >; 3103 polling-delay-passive = < 0xfa >; 3104 polling-delay = < 0x00 >; 3105 3106 trips { 3107 3108 cpu-alert-0 { 3109 temperature = < 0xc350 >; 3110 hysteresis = < 0x1388 >; 3111 type = "active"; 3112 phandle = < 0x77 >; 3113 }; 3114 3115 cpu-alert-1 { 3116 temperature = < 0xea60 >; 3117 hysteresis = < 0x1388 >; 3118 type = "active"; 3119 phandle = < 0x79 >; 3120 }; 3121 3122 cpu-alert-2 { 3123 temperature = < 0x11170 >; 3124 hysteresis = < 0x1388 >; 3125 type = "active"; 3126 phandle = < 0x7a >; 3127 }; 3128 3129 cpu-crit-0 { 3130 temperature = < 0x1d4c0 >; 3131 hysteresis = < 0x00 >; 3132 type = "critical"; 3133 }; 3134 3135 cpu-alert-3 { 3136 temperature = < 0x11170 >; 3137 hysteresis = < 0x2710 >; 3138 type = "passive"; 3139 phandle = < 0x7b >; 3140 }; 3141 3142 cpu-alert-4 { 3143 temperature = < 0x14c08 >; 3144 hysteresis = < 0x2710 >; 3145 type = "passive"; 3146 phandle = < 0x7c >; 3147 }; 3148 }; 3149 3150 cooling-maps { 3151 3152 map0 { 3153 trip = < 0x77 >; 3154 cooling-device = < 0x78 0x00 0x01 >; 3155 }; 3156 3157 map1 { 3158 trip = < 0x79 >; 3159 cooling-device = < 0x78 0x01 0x02 >; 3160 }; 3161 3162 map2 { 3163 trip = < 0x7a >; 3164 cooling-device = < 0x78 0x02 0x03 >; 3165 }; 3166 3167 map3 { 3168 trip = < 0x7b >; 3169 cooling-device = < 0x15 0x00 0x02 >; 3170 }; 3171 3172 map4 { 3173 trip = < 0x7b >; 3174 cooling-device = < 0x19 0x00 0x02 >; 3175 }; 3176 3177 map5 { 3178 trip = < 0x7c >; 3179 cooling-device = < 0x15 0x03 0x07 >; 3180 }; 3181 3182 map6 { 3183 trip = < 0x7c >; 3184 cooling-device = < 0x19 0x03 0x0c >; 3185 }; 3186 }; 3187 }; 3188 3189 cpu1-thermal { 3190 thermal-sensors = < 0x7d 0x00 >; 3191 polling-delay-passive = < 0xfa >; 3192 polling-delay = < 0x00 >; 3193 3194 trips { 3195 3196 cpu-alert-0 { 3197 temperature = < 0xc350 >; 3198 hysteresis = < 0x1388 >; 3199 type = "active"; 3200 phandle = < 0x7e >; 3201 }; 3202 3203 cpu-alert-1 { 3204 temperature = < 0xea60 >; 3205 hysteresis = < 0x1388 >; 3206 type = "active"; 3207 phandle = < 0x7f >; 3208 }; 3209 3210 cpu-alert-2 { 3211 temperature = < 0x11170 >; 3212 hysteresis = < 0x1388 >; 3213 type = "active"; 3214 phandle = < 0x80 >; 3215 }; 3216 3217 cpu-crit-0 { 3218 temperature = < 0x1d4c0 >; 3219 hysteresis = < 0x00 >; 3220 type = "critical"; 3221 }; 3222 3223 cpu-alert-3 { 3224 temperature = < 0x11170 >; 3225 hysteresis = < 0x2710 >; 3226 type = "passive"; 3227 phandle = < 0x81 >; 3228 }; 3229 3230 cpu-alert-4 { 3231 temperature = < 0x14c08 >; 3232 hysteresis = < 0x2710 >; 3233 type = "passive"; 3234 phandle = < 0x82 >; 3235 }; 3236 }; 3237 3238 cooling-maps { 3239 3240 map0 { 3241 trip = < 0x7e >; 3242 cooling-device = < 0x78 0x00 0x01 >; 3243 }; 3244 3245 map1 { 3246 trip = < 0x7f >; 3247 cooling-device = < 0x78 0x01 0x02 >; 3248 }; 3249 3250 map2 { 3251 trip = < 0x80 >; 3252 cooling-device = < 0x78 0x02 0x03 >; 3253 }; 3254 3255 map3 { 3256 trip = < 0x81 >; 3257 cooling-device = < 0x15 0x00 0x02 >; 3258 }; 3259 3260 map4 { 3261 trip = < 0x81 >; 3262 cooling-device = < 0x19 0x00 0x02 >; 3263 }; 3264 3265 map5 { 3266 trip = < 0x82 >; 3267 cooling-device = < 0x15 0x03 0x07 >; 3268 }; 3269 3270 map6 { 3271 trip = < 0x82 >; 3272 cooling-device = < 0x19 0x03 0x0c >; 3273 }; 3274 }; 3275 }; 3276 3277 cpu2-thermal { 3278 thermal-sensors = < 0x83 0x00 >; 3279 polling-delay-passive = < 0xfa >; 3280 polling-delay = < 0x00 >; 3281 3282 trips { 3283 3284 cpu-alert-0 { 3285 temperature = < 0xc350 >; 3286 hysteresis = < 0x1388 >; 3287 type = "active"; 3288 phandle = < 0x84 >; 3289 }; 3290 3291 cpu-alert-1 { 3292 temperature = < 0xea60 >; 3293 hysteresis = < 0x1388 >; 3294 type = "active"; 3295 phandle = < 0x85 >; 3296 }; 3297 3298 cpu-alert-2 { 3299 temperature = < 0x11170 >; 3300 hysteresis = < 0x1388 >; 3301 type = "active"; 3302 phandle = < 0x86 >; 3303 }; 3304 3305 cpu-crit-0 { 3306 temperature = < 0x1d4c0 >; 3307 hysteresis = < 0x00 >; 3308 type = "critical"; 3309 }; 3310 3311 cpu-alert-3 { 3312 temperature = < 0x11170 >; 3313 hysteresis = < 0x2710 >; 3314 type = "passive"; 3315 phandle = < 0x87 >; 3316 }; 3317 3318 cpu-alert-4 { 3319 temperature = < 0x14c08 >; 3320 hysteresis = < 0x2710 >; 3321 type = "passive"; 3322 phandle = < 0x88 >; 3323 }; 3324 }; 3325 3326 cooling-maps { 3327 3328 map0 { 3329 trip = < 0x84 >; 3330 cooling-device = < 0x78 0x00 0x01 >; 3331 }; 3332 3333 map1 { 3334 trip = < 0x85 >; 3335 cooling-device = < 0x78 0x01 0x02 >; 3336 }; 3337 3338 map2 { 3339 trip = < 0x86 >; 3340 cooling-device = < 0x78 0x02 0x03 >; 3341 }; 3342 3343 map3 { 3344 trip = < 0x87 >; 3345 cooling-device = < 0x15 0x00 0x02 >; 3346 }; 3347 3348 map4 { 3349 trip = < 0x87 >; 3350 cooling-device = < 0x19 0x00 0x02 >; 3351 }; 3352 3353 map5 { 3354 trip = < 0x88 >; 3355 cooling-device = < 0x15 0x03 0x07 >; 3356 }; 3357 3358 map6 { 3359 trip = < 0x88 >; 3360 cooling-device = < 0x19 0x03 0x0c >; 3361 }; 3362 }; 3363 }; 3364 3365 cpu3-thermal { 3366 thermal-sensors = < 0x89 0x00 >; 3367 polling-delay-passive = < 0xfa >; 3368 polling-delay = < 0x00 >; 3369 3370 trips { 3371 3372 cpu-alert-0 { 3373 temperature = < 0xc350 >; 3374 hysteresis = < 0x1388 >; 3375 type = "active"; 3376 phandle = < 0x8a >; 3377 }; 3378 3379 cpu-alert-1 { 3380 temperature = < 0xea60 >; 3381 hysteresis = < 0x1388 >; 3382 type = "active"; 3383 phandle = < 0x8b >; 3384 }; 3385 3386 cpu-alert-2 { 3387 temperature = < 0x11170 >; 3388 hysteresis = < 0x1388 >; 3389 type = "active"; 3390 phandle = < 0x8c >; 3391 }; 3392 3393 cpu-crit-0 { 3394 temperature = < 0x1d4c0 >; 3395 hysteresis = < 0x00 >; 3396 type = "critical"; 3397 }; 3398 3399 cpu-alert-3 { 3400 temperature = < 0x11170 >; 3401 hysteresis = < 0x2710 >; 3402 type = "passive"; 3403 phandle = < 0x8d >; 3404 }; 3405 3406 cpu-alert-4 { 3407 temperature = < 0x14c08 >; 3408 hysteresis = < 0x2710 >; 3409 type = "passive"; 3410 phandle = < 0x8e >; 3411 }; 3412 }; 3413 3414 cooling-maps { 3415 3416 map0 { 3417 trip = < 0x8a >; 3418 cooling-device = < 0x78 0x00 0x01 >; 3419 }; 3420 3421 map1 { 3422 trip = < 0x8b >; 3423 cooling-device = < 0x78 0x01 0x02 >; 3424 }; 3425 3426 map2 { 3427 trip = < 0x8c >; 3428 cooling-device = < 0x78 0x02 0x03 >; 3429 }; 3430 3431 map3 { 3432 trip = < 0x8d >; 3433 cooling-device = < 0x15 0x00 0x02 >; 3434 }; 3435 3436 map4 { 3437 trip = < 0x8d >; 3438 cooling-device = < 0x19 0x00 0x02 >; 3439 }; 3440 3441 map5 { 3442 trip = < 0x8e >; 3443 cooling-device = < 0x15 0x03 0x07 >; 3444 }; 3445 3446 map6 { 3447 trip = < 0x8e >; 3448 cooling-device = < 0x19 0x03 0x0c >; 3449 }; 3450 }; 3451 }; 3452 3453 gpu-thermal { 3454 thermal-sensors = < 0x8f >; 3455 polling-delay-passive = < 0x00 >; 3456 polling-delay = < 0x00 >; 3457 3458 trips { 3459 3460 cpu-alert-0 { 3461 temperature = < 0x14c08 >; 3462 hysteresis = < 0x2710 >; 3463 type = "active"; 3464 }; 3465 3466 cpu-alert-1 { 3467 temperature = < 0x19258 >; 3468 hysteresis = < 0x2710 >; 3469 type = "active"; 3470 }; 3471 3472 cpu-alert-2 { 3473 temperature = < 0x1adb0 >; 3474 hysteresis = < 0x2710 >; 3475 type = "active"; 3476 }; 3477 3478 cpu-crit-0 { 3479 temperature = < 0x1d4c0 >; 3480 hysteresis = < 0x00 >; 3481 type = "critical"; 3482 }; 3483 }; 3484 }; 3485 }; 3486 3487 cpus { 3488 #address-cells = < 0x01 >; 3489 #size-cells = < 0x00 >; 3490 3491 cpu@100 { 3492 device_type = "cpu"; 3493 compatible = "arm,cortex-a7"; 3494 reg = < 0x100 >; 3495 clocks = < 0x02 0x0e >; 3496 clock-frequency = < 0x3b9aca00 >; 3497 cci-control-port = < 0x90 >; 3498 operating-points-v2 = < 0x91 >; 3499 #cooling-cells = < 0x02 >; 3500 capacity-dmips-mhz = < 0x21b >; 3501 cpu-supply = < 0x92 >; 3502 phandle = < 0x15 >; 3503 }; 3504 3505 cpu@101 { 3506 device_type = "cpu"; 3507 compatible = "arm,cortex-a7"; 3508 reg = < 0x101 >; 3509 clocks = < 0x02 0x0e >; 3510 clock-frequency = < 0x3b9aca00 >; 3511 cci-control-port = < 0x90 >; 3512 operating-points-v2 = < 0x91 >; 3513 #cooling-cells = < 0x02 >; 3514 capacity-dmips-mhz = < 0x21b >; 3515 phandle = < 0x16 >; 3516 }; 3517 3518 cpu@102 { 3519 device_type = "cpu"; 3520 compatible = "arm,cortex-a7"; 3521 reg = < 0x102 >; 3522 clocks = < 0x02 0x0e >; 3523 clock-frequency = < 0x3b9aca00 >; 3524 cci-control-port = < 0x90 >; 3525 operating-points-v2 = < 0x91 >; 3526 #cooling-cells = < 0x02 >; 3527 capacity-dmips-mhz = < 0x21b >; 3528 phandle = < 0x17 >; 3529 }; 3530 3531 cpu@103 { 3532 device_type = "cpu"; 3533 compatible = "arm,cortex-a7"; 3534 reg = < 0x103 >; 3535 clocks = < 0x02 0x0e >; 3536 clock-frequency = < 0x3b9aca00 >; 3537 cci-control-port = < 0x90 >; 3538 operating-points-v2 = < 0x91 >; 3539 #cooling-cells = < 0x02 >; 3540 capacity-dmips-mhz = < 0x21b >; 3541 phandle = < 0x18 >; 3542 }; 3543 3544 cpu@0 { 3545 device_type = "cpu"; 3546 compatible = "arm,cortex-a15"; 3547 reg = < 0x00 >; 3548 clocks = < 0x02 0x0d >; 3549 clock-frequency = < 0x6b49d200 >; 3550 cci-control-port = < 0x93 >; 3551 operating-points-v2 = < 0x94 >; 3552 #cooling-cells = < 0x02 >; 3553 capacity-dmips-mhz = < 0x400 >; 3554 cpu-supply = < 0x95 >; 3555 phandle = < 0x19 >; 3556 }; 3557 3558 cpu@1 { 3559 device_type = "cpu"; 3560 compatible = "arm,cortex-a15"; 3561 reg = < 0x01 >; 3562 clocks = < 0x02 0x0d >; 3563 clock-frequency = < 0x6b49d200 >; 3564 cci-control-port = < 0x93 >; 3565 operating-points-v2 = < 0x94 >; 3566 #cooling-cells = < 0x02 >; 3567 capacity-dmips-mhz = < 0x400 >; 3568 phandle = < 0x1a >; 3569 }; 3570 3571 cpu@2 { 3572 device_type = "cpu"; 3573 compatible = "arm,cortex-a15"; 3574 reg = < 0x02 >; 3575 clocks = < 0x02 0x0d >; 3576 clock-frequency = < 0x6b49d200 >; 3577 cci-control-port = < 0x93 >; 3578 operating-points-v2 = < 0x94 >; 3579 #cooling-cells = < 0x02 >; 3580 capacity-dmips-mhz = < 0x400 >; 3581 phandle = < 0x1b >; 3582 }; 3583 3584 cpu@3 { 3585 device_type = "cpu"; 3586 compatible = "arm,cortex-a15"; 3587 reg = < 0x03 >; 3588 clocks = < 0x02 0x0d >; 3589 clock-frequency = < 0x6b49d200 >; 3590 cci-control-port = < 0x93 >; 3591 operating-points-v2 = < 0x94 >; 3592 #cooling-cells = < 0x02 >; 3593 capacity-dmips-mhz = < 0x400 >; 3594 phandle = < 0x1c >; 3595 }; 3596 }; 3597 3598 memory@40000000 { 3599 device_type = "memory"; 3600 reg = < 0x40000000 0x7ea00000 >; 3601 }; 3602 3603 chosen { 3604 stdout-path = "serial2:115200n8"; 3605 }; 3606 3607 firmware@2073000 { 3608 compatible = "samsung,secure-firmware"; 3609 reg = < 0x2073000 0x1000 >; 3610 }; 3611 3612 fixed-rate-clocks { 3613 3614 oscclk { 3615 compatible = "samsung,exynos5420-oscclk"; 3616 clock-frequency = < 0x16e3600 >; 3617 }; 3618 }; 3619 3620 gpio_keys { 3621 compatible = "gpio-keys"; 3622 pinctrl-names = "default"; 3623 pinctrl-0 = < 0x96 >; 3624 3625 power_key { 3626 gpios = < 0x1f 0x03 0x01 >; 3627 linux,code = < 0x74 >; 3628 label = "power key"; 3629 debounce-interval = < 0x00 >; 3630 wakeup-source; 3631 }; 3632 }; 3633 3634 pwrseq { 3635 pinctrl-0 = < 0x97 >; 3636 pinctrl-names = "default"; 3637 compatible = "mmc-pwrseq-emmc"; 3638 reset-gpios = < 0x98 0x00 0x01 >; 3639 phandle = < 0x2e >; 3640 }; 3641 3642 pwm-fan { 3643 compatible = "pwm-fan"; 3644 pwms = < 0x99 0x00 0x51ec 0x00 >; 3645 cooling-min-state = < 0x00 >; 3646 cooling-max-state = < 0x03 >; 3647 #cooling-cells = < 0x02 >; 3648 cooling-levels = < 0x00 0x82 0xaa 0xe6 >; 3649 phandle = < 0x78 >; 3650 }; 3651 3652 pwmleds { 3653 compatible = "pwm-leds"; 3654 3655 blueled { 3656 label = "blue:heartbeat"; 3657 pwms = < 0x99 0x02 0x1e8480 0x00 >; 3658 pwm-names = "pwm2"; 3659 max_brightness = < 0xff >; 3660 linux,default-trigger = "heartbeat"; 3661 }; 3662 }; 3663 3664 sound { 3665 compatible = "samsung,odroid-xu3-audio"; 3666 model = "Odroid-XU4"; 3667 assigned-clocks = < 0x9a 0x01 0x02 0x291 0x02 0x292 0x02 0x293 0x2a 0x00 0x2a 0x01 0x2a 0x02 0x2a 0x03 0x2a 0x04 >; 3668 assigned-clock-parents = < 0x2a 0x07 0x02 0x05 0x02 0x291 0x02 0x292 0x02 0x9f 0x2a 0x00 >; 3669 assigned-clock-rates = < 0x00 0x00 0x00 0x00 0x00 0x00 0xbb80001 0x5dc0001 0xbb80000 >; 3670 3671 cpu { 3672 sound-dai = < 0x9a 0x00 >; 3673 }; 3674 3675 codec { 3676 sound-dai = < 0x51 >; 3677 }; 3678 }; 3679}; 3680