1/*
2 * Copyright Linux Kernel Team
3 *
4 * SPDX-License-Identifier: GPL-2.0-only
5 *
6 * This file is derived from an intermediate build stage of the
7 * Linux kernel. The licenses of all input files to this process
8 * are compatible with GPL-2.0-only.
9 */
10
11/dts-v1/;
12
13/ {
14	#address-cells = < 0x01 >;
15	#size-cells = < 0x01 >;
16	interrupt-parent = < 0x01 >;
17	model = "Cubietech Cubietruck";
18	compatible = "cubietech,cubietruck\0allwinner,sun7i-a20";
19
20	chosen {
21		#address-cells = < 0x01 >;
22		#size-cells = < 0x01 >;
23		ranges;
24		stdout-path = "serial0:115200n8";
25
26		framebuffer@0 {
27			compatible = "allwinner,simple-framebuffer\0simple-framebuffer";
28			allwinner,pipeline = "de_be0-lcd0-hdmi";
29			clocks = < 0x02 0x38 0x02 0x3c 0x02 0x3e 0x02 0x90 0x02 0x9b 0x02 0x8c 0x02 0xa4 >;
30			status = "disabled";
31		};
32
33		framebuffer@1 {
34			compatible = "allwinner,simple-framebuffer\0simple-framebuffer";
35			allwinner,pipeline = "de_be0-lcd0";
36			clocks = < 0x02 0x38 0x02 0x3e 0x02 0x90 0x02 0x95 0x02 0x8c >;
37			status = "disabled";
38		};
39
40		framebuffer@2 {
41			compatible = "allwinner,simple-framebuffer\0simple-framebuffer";
42			allwinner,pipeline = "de_be0-lcd0-tve0";
43			clocks = < 0x02 0x36 0x02 0x38 0x02 0x3e 0x02 0x90 0x02 0x9b 0x02 0x87 0x02 0x8c >;
44			status = "disabled";
45		};
46	};
47
48	aliases {
49		ethernet0 = "/soc@1c00000/ethernet@1c50000";
50		serial0 = "/soc@1c00000/serial@1c28000";
51	};
52
53	memory {
54		device_type = "memory";
55		reg = < 0x40000000 0x80000000 >;
56	};
57
58	cpus {
59		#address-cells = < 0x01 >;
60		#size-cells = < 0x00 >;
61
62		cpu@0 {
63			compatible = "arm,cortex-a7";
64			device_type = "cpu";
65			reg = < 0x00 >;
66			clocks = < 0x02 0x14 >;
67			clock-latency = < 0x3b9b0 >;
68			operating-points = < 0xea600 0x155cc0 0xdea80 0x155cc0 0xd2f00 0x13d620 0xafc80 0x124f80 0x80e80 0x10c8e0 0x4c2c0 0xf4240 0x23280 0xf4240 >;
69			#cooling-cells = < 0x02 >;
70			cpu-supply = < 0x03 >;
71			phandle = < 0x06 >;
72		};
73
74		cpu@1 {
75			compatible = "arm,cortex-a7";
76			device_type = "cpu";
77			reg = < 0x01 >;
78			clocks = < 0x02 0x14 >;
79			clock-latency = < 0x3b9b0 >;
80			operating-points = < 0xea600 0x155cc0 0xdea80 0x155cc0 0xd2f00 0x13d620 0xafc80 0x124f80 0x80e80 0x10c8e0 0x4c2c0 0xf4240 0x23280 0xf4240 >;
81			#cooling-cells = < 0x02 >;
82		};
83	};
84
85	thermal-zones {
86
87		cpu_thermal {
88			polling-delay-passive = < 0xfa >;
89			polling-delay = < 0x3e8 >;
90			thermal-sensors = < 0x04 >;
91
92			cooling-maps {
93
94				map0 {
95					trip = < 0x05 >;
96					cooling-device = < 0x06 0xffffffff 0xffffffff >;
97				};
98			};
99
100			trips {
101
102				cpu_alert0 {
103					temperature = < 0x124f8 >;
104					hysteresis = < 0x7d0 >;
105					type = "passive";
106					phandle = < 0x05 >;
107				};
108
109				cpu_crit {
110					temperature = < 0x186a0 >;
111					hysteresis = < 0x7d0 >;
112					type = "critical";
113				};
114			};
115		};
116	};
117
118	reserved-memory {
119		#address-cells = < 0x01 >;
120		#size-cells = < 0x01 >;
121		ranges;
122
123		cma@4a000000 {
124			compatible = "shared-dma-pool";
125			size = < 0x6000000 >;
126			alloc-ranges = < 0x4a000000 0x6000000 >;
127			reusable;
128			linux,cma-default;
129		};
130	};
131
132	timer {
133		compatible = "arm,armv7-timer";
134		interrupts = < 0x01 0x0d 0xf08 0x01 0x0e 0xf08 0x01 0x0b 0xf08 0x01 0x0a 0xf08 >;
135	};
136
137	pmu {
138		compatible = "arm,cortex-a7-pmu\0arm,cortex-a15-pmu";
139		interrupts = < 0x00 0x78 0x04 0x00 0x79 0x04 >;
140	};
141
142	clocks {
143		#address-cells = < 0x01 >;
144		#size-cells = < 0x01 >;
145		ranges;
146
147		clk@1c20050 {
148			#clock-cells = < 0x00 >;
149			compatible = "fixed-clock";
150			clock-frequency = < 0x16e3600 >;
151			clock-output-names = "osc24M";
152			phandle = < 0x25 >;
153		};
154
155		clk@0 {
156			#clock-cells = < 0x00 >;
157			compatible = "fixed-clock";
158			clock-frequency = < 0x8000 >;
159			clock-output-names = "osc32k";
160			phandle = < 0x26 >;
161		};
162
163		clk@1 {
164			#clock-cells = < 0x00 >;
165			compatible = "fixed-clock";
166			clock-frequency = < 0x17d7840 >;
167			clock-output-names = "mii_phy_tx";
168			phandle = < 0x07 >;
169		};
170
171		clk@2 {
172			#clock-cells = < 0x00 >;
173			compatible = "fixed-clock";
174			clock-frequency = < 0x7735940 >;
175			clock-output-names = "gmac_int_tx";
176			phandle = < 0x08 >;
177		};
178
179		clk@1c20164 {
180			#clock-cells = < 0x00 >;
181			compatible = "allwinner,sun7i-a20-gmac-clk";
182			reg = < 0x1c20164 0x04 >;
183			clocks = < 0x07 0x08 >;
184			clock-output-names = "gmac_tx";
185			phandle = < 0x30 >;
186		};
187	};
188
189	display-engine {
190		compatible = "allwinner,sun7i-a20-display-engine";
191		allwinner,pipelines = < 0x09 0x0a >;
192		status = "okay";
193	};
194
195	soc@1c00000 {
196		compatible = "simple-bus";
197		#address-cells = < 0x01 >;
198		#size-cells = < 0x01 >;
199		ranges;
200
201		system-control@1c00000 {
202			compatible = "allwinner,sun7i-a20-system-control\0allwinner,sun4i-a10-system-control";
203			reg = < 0x1c00000 0x30 >;
204			#address-cells = < 0x01 >;
205			#size-cells = < 0x01 >;
206			ranges;
207
208			sram@0 {
209				compatible = "mmio-sram";
210				reg = < 0x00 0xc000 >;
211				#address-cells = < 0x01 >;
212				#size-cells = < 0x01 >;
213				ranges = < 0x00 0x00 0xc000 >;
214
215				sram-section@8000 {
216					compatible = "allwinner,sun7i-a20-sram-a3-a4\0allwinner,sun4i-a10-sram-a3-a4";
217					reg = < 0x8000 0x4000 >;
218					status = "disabled";
219					phandle = < 0x0c >;
220				};
221			};
222
223			sram@10000 {
224				compatible = "mmio-sram";
225				reg = < 0x10000 0x1000 >;
226				#address-cells = < 0x01 >;
227				#size-cells = < 0x01 >;
228				ranges = < 0x00 0x10000 0x1000 >;
229
230				sram-section@0 {
231					compatible = "allwinner,sun7i-a20-sram-d\0allwinner,sun4i-a10-sram-d";
232					reg = < 0x00 0x1000 >;
233					status = "okay";
234					phandle = < 0x1a >;
235				};
236			};
237
238			sram@1d00000 {
239				compatible = "mmio-sram";
240				reg = < 0x1d00000 0xd0000 >;
241				#address-cells = < 0x01 >;
242				#size-cells = < 0x01 >;
243				ranges = < 0x00 0x1d00000 0xd0000 >;
244
245				sram-section@0 {
246					compatible = "allwinner,sun7i-a20-sram-c1\0allwinner,sun4i-a10-sram-c1";
247					reg = < 0x00 0x80000 >;
248					phandle = < 0x13 >;
249				};
250			};
251		};
252
253		interrupt-controller@1c00030 {
254			compatible = "allwinner,sun7i-a20-sc-nmi";
255			interrupt-controller;
256			#interrupt-cells = < 0x02 >;
257			reg = < 0x1c00030 0x0c >;
258			interrupts = < 0x00 0x00 0x04 >;
259			phandle = < 0x2d >;
260		};
261
262		dma-controller@1c02000 {
263			compatible = "allwinner,sun4i-a10-dma";
264			reg = < 0x1c02000 0x1000 >;
265			interrupts = < 0x00 0x1b 0x04 >;
266			clocks = < 0x02 0x20 >;
267			#dma-cells = < 0x02 >;
268			phandle = < 0x0b >;
269		};
270
271		nand@1c03000 {
272			compatible = "allwinner,sun4i-a10-nand";
273			reg = < 0x1c03000 0x1000 >;
274			interrupts = < 0x00 0x25 0x04 >;
275			clocks = < 0x02 0x27 0x02 0x60 >;
276			clock-names = "ahb\0mod";
277			dmas = < 0x0b 0x01 0x03 >;
278			dma-names = "rxtx";
279			status = "disabled";
280			#address-cells = < 0x01 >;
281			#size-cells = < 0x00 >;
282		};
283
284		spi@1c05000 {
285			compatible = "allwinner,sun4i-a10-spi";
286			reg = < 0x1c05000 0x1000 >;
287			interrupts = < 0x00 0x0a 0x04 >;
288			clocks = < 0x02 0x2c 0x02 0x70 >;
289			clock-names = "ahb\0mod";
290			dmas = < 0x0b 0x01 0x1b 0x0b 0x01 0x1a >;
291			dma-names = "rx\0tx";
292			status = "disabled";
293			#address-cells = < 0x01 >;
294			#size-cells = < 0x00 >;
295			num-cs = < 0x04 >;
296		};
297
298		spi@1c06000 {
299			compatible = "allwinner,sun4i-a10-spi";
300			reg = < 0x1c06000 0x1000 >;
301			interrupts = < 0x00 0x0b 0x04 >;
302			clocks = < 0x02 0x2d 0x02 0x71 >;
303			clock-names = "ahb\0mod";
304			dmas = < 0x0b 0x01 0x09 0x0b 0x01 0x08 >;
305			dma-names = "rx\0tx";
306			status = "disabled";
307			#address-cells = < 0x01 >;
308			#size-cells = < 0x00 >;
309			num-cs = < 0x01 >;
310		};
311
312		ethernet@1c0b000 {
313			compatible = "allwinner,sun4i-a10-emac";
314			reg = < 0x1c0b000 0x1000 >;
315			interrupts = < 0x00 0x37 0x04 >;
316			clocks = < 0x02 0x2a >;
317			allwinner,sram = < 0x0c 0x01 >;
318			status = "disabled";
319		};
320
321		mdio@1c0b080 {
322			compatible = "allwinner,sun4i-a10-mdio";
323			reg = < 0x1c0b080 0x14 >;
324			status = "disabled";
325			#address-cells = < 0x01 >;
326			#size-cells = < 0x00 >;
327		};
328
329		lcd-controller@1c0c000 {
330			compatible = "allwinner,sun7i-a20-tcon";
331			reg = < 0x1c0c000 0x1000 >;
332			interrupts = < 0x00 0x2c 0x04 >;
333			resets = < 0x02 0x0b >;
334			reset-names = "lcd";
335			clocks = < 0x02 0x38 0x02 0x95 0x02 0x9b >;
336			clock-names = "ahb\0tcon-ch0\0tcon-ch1";
337			clock-output-names = "tcon0-pixel-clock";
338			dmas = < 0x0b 0x01 0x0e >;
339
340			ports {
341				#address-cells = < 0x01 >;
342				#size-cells = < 0x00 >;
343
344				port@0 {
345					#address-cells = < 0x01 >;
346					#size-cells = < 0x00 >;
347					reg = < 0x00 >;
348
349					endpoint@0 {
350						reg = < 0x00 >;
351						remote-endpoint = < 0x0d >;
352						phandle = < 0x3d >;
353					};
354
355					endpoint@1 {
356						reg = < 0x01 >;
357						remote-endpoint = < 0x0e >;
358						phandle = < 0x39 >;
359					};
360				};
361
362				port@1 {
363					#address-cells = < 0x01 >;
364					#size-cells = < 0x00 >;
365					reg = < 0x01 >;
366
367					endpoint@1 {
368						reg = < 0x01 >;
369						remote-endpoint = < 0x0f >;
370						allwinner,tcon-channel = < 0x01 >;
371						phandle = < 0x21 >;
372					};
373				};
374			};
375		};
376
377		lcd-controller@1c0d000 {
378			compatible = "allwinner,sun7i-a20-tcon";
379			reg = < 0x1c0d000 0x1000 >;
380			interrupts = < 0x00 0x2d 0x04 >;
381			resets = < 0x02 0x0d >;
382			reset-names = "lcd";
383			clocks = < 0x02 0x39 0x02 0x96 0x02 0x9d >;
384			clock-names = "ahb\0tcon-ch0\0tcon-ch1";
385			clock-output-names = "tcon1-pixel-clock";
386			dmas = < 0x0b 0x01 0x0f >;
387
388			ports {
389				#address-cells = < 0x01 >;
390				#size-cells = < 0x00 >;
391
392				port@0 {
393					#address-cells = < 0x01 >;
394					#size-cells = < 0x00 >;
395					reg = < 0x00 >;
396
397					endpoint@0 {
398						reg = < 0x00 >;
399						remote-endpoint = < 0x10 >;
400						phandle = < 0x3e >;
401					};
402
403					endpoint@1 {
404						reg = < 0x01 >;
405						remote-endpoint = < 0x11 >;
406						phandle = < 0x3a >;
407					};
408				};
409
410				port@1 {
411					#address-cells = < 0x01 >;
412					#size-cells = < 0x00 >;
413					reg = < 0x01 >;
414
415					endpoint@1 {
416						reg = < 0x01 >;
417						remote-endpoint = < 0x12 >;
418						allwinner,tcon-channel = < 0x01 >;
419						phandle = < 0x22 >;
420					};
421				};
422			};
423		};
424
425		video-codec@1c0e000 {
426			compatible = "allwinner,sun7i-a20-video-engine";
427			reg = < 0x1c0e000 0x1000 >;
428			clocks = < 0x02 0x34 0x02 0xa1 0x02 0x82 >;
429			clock-names = "ahb\0mod\0ram";
430			resets = < 0x02 0x10 >;
431			interrupts = < 0x00 0x35 0x04 >;
432			allwinner,sram = < 0x13 0x01 >;
433		};
434
435		mmc@1c0f000 {
436			compatible = "allwinner,sun7i-a20-mmc";
437			reg = < 0x1c0f000 0x1000 >;
438			clocks = < 0x02 0x22 0x02 0x62 0x02 0x63 0x02 0x64 >;
439			clock-names = "ahb\0mmc\0output\0sample";
440			interrupts = < 0x00 0x20 0x04 >;
441			status = "okay";
442			#address-cells = < 0x01 >;
443			#size-cells = < 0x00 >;
444			pinctrl-names = "default";
445			pinctrl-0 = < 0x14 >;
446			vmmc-supply = < 0x15 >;
447			bus-width = < 0x04 >;
448			cd-gpios = < 0x16 0x07 0x01 0x01 >;
449		};
450
451		mmc@1c10000 {
452			compatible = "allwinner,sun7i-a20-mmc";
453			reg = < 0x1c10000 0x1000 >;
454			clocks = < 0x02 0x23 0x02 0x65 0x02 0x66 0x02 0x67 >;
455			clock-names = "ahb\0mmc\0output\0sample";
456			interrupts = < 0x00 0x21 0x04 >;
457			status = "disabled";
458			#address-cells = < 0x01 >;
459			#size-cells = < 0x00 >;
460		};
461
462		mmc@1c11000 {
463			compatible = "allwinner,sun7i-a20-mmc";
464			reg = < 0x1c11000 0x1000 >;
465			clocks = < 0x02 0x24 0x02 0x68 0x02 0x69 0x02 0x6a >;
466			clock-names = "ahb\0mmc\0output\0sample";
467			interrupts = < 0x00 0x22 0x04 >;
468			status = "disabled";
469			#address-cells = < 0x01 >;
470			#size-cells = < 0x00 >;
471		};
472
473		mmc@1c12000 {
474			compatible = "allwinner,sun7i-a20-mmc";
475			reg = < 0x1c12000 0x1000 >;
476			clocks = < 0x02 0x25 0x02 0x6b 0x02 0x6c 0x02 0x6d >;
477			clock-names = "ahb\0mmc\0output\0sample";
478			interrupts = < 0x00 0x23 0x04 >;
479			status = "okay";
480			#address-cells = < 0x01 >;
481			#size-cells = < 0x00 >;
482			pinctrl-names = "default";
483			pinctrl-0 = < 0x17 >;
484			vmmc-supply = < 0x15 >;
485			mmc-pwrseq = < 0x18 >;
486			bus-width = < 0x04 >;
487			non-removable;
488
489			wifi@1 {
490				reg = < 0x01 >;
491				compatible = "brcm,bcm4329-fmac";
492				interrupt-parent = < 0x16 >;
493				interrupts = < 0x07 0x0a 0x08 >;
494				interrupt-names = "host-wake";
495			};
496		};
497
498		usb@1c13000 {
499			compatible = "allwinner,sun4i-a10-musb";
500			reg = < 0x1c13000 0x400 >;
501			clocks = < 0x02 0x1a >;
502			interrupts = < 0x00 0x26 0x04 >;
503			interrupt-names = "mc";
504			phys = < 0x19 0x00 >;
505			phy-names = "usb";
506			extcon = < 0x19 0x00 >;
507			allwinner,sram = < 0x1a 0x01 >;
508			status = "okay";
509			dr_mode = "otg";
510		};
511
512		phy@1c13400 {
513			#phy-cells = < 0x01 >;
514			compatible = "allwinner,sun7i-a20-usb-phy";
515			reg = < 0x1c13400 0x10 0x1c14800 0x04 0x1c1c800 0x04 >;
516			reg-names = "phy_ctrl\0pmu1\0pmu2";
517			clocks = < 0x02 0x7d >;
518			clock-names = "usb_phy";
519			resets = < 0x02 0x01 0x02 0x02 0x02 0x03 >;
520			reset-names = "usb0_reset\0usb1_reset\0usb2_reset";
521			status = "okay";
522			pinctrl-names = "default";
523			pinctrl-0 = < 0x1b 0x1c >;
524			usb0_id_det-gpios = < 0x16 0x07 0x13 0x00 >;
525			usb0_vbus_det-gpios = < 0x16 0x07 0x16 0x00 >;
526			usb0_vbus_power-supply = < 0x1d >;
527			usb0_vbus-supply = < 0x1e >;
528			usb1_vbus-supply = < 0x1f >;
529			usb2_vbus-supply = < 0x20 >;
530			phandle = < 0x19 >;
531		};
532
533		usb@1c14000 {
534			compatible = "allwinner,sun7i-a20-ehci\0generic-ehci";
535			reg = < 0x1c14000 0x100 >;
536			interrupts = < 0x00 0x27 0x04 >;
537			clocks = < 0x02 0x1b >;
538			phys = < 0x19 0x01 >;
539			phy-names = "usb";
540			status = "okay";
541		};
542
543		usb@1c14400 {
544			compatible = "allwinner,sun7i-a20-ohci\0generic-ohci";
545			reg = < 0x1c14400 0x100 >;
546			interrupts = < 0x00 0x40 0x04 >;
547			clocks = < 0x02 0x7b 0x02 0x1c >;
548			phys = < 0x19 0x01 >;
549			phy-names = "usb";
550			status = "okay";
551		};
552
553		crypto-engine@1c15000 {
554			compatible = "allwinner,sun7i-a20-crypto\0allwinner,sun4i-a10-crypto";
555			reg = < 0x1c15000 0x1000 >;
556			interrupts = < 0x00 0x56 0x04 >;
557			clocks = < 0x02 0x1f 0x02 0x6f >;
558			clock-names = "ahb\0mod";
559		};
560
561		hdmi@1c16000 {
562			compatible = "allwinner,sun7i-a20-hdmi\0allwinner,sun5i-a10s-hdmi";
563			reg = < 0x1c16000 0x1000 >;
564			interrupts = < 0x00 0x3a 0x04 >;
565			clocks = < 0x02 0x3c 0x02 0xa4 0x02 0x09 0x02 0x12 >;
566			clock-names = "ahb\0mod\0pll-0\0pll-1";
567			dmas = < 0x0b 0x00 0x10 0x0b 0x00 0x10 0x0b 0x01 0x18 >;
568			dma-names = "ddc-tx\0ddc-rx\0audio-tx";
569			status = "okay";
570
571			ports {
572				#address-cells = < 0x01 >;
573				#size-cells = < 0x00 >;
574
575				port@0 {
576					#address-cells = < 0x01 >;
577					#size-cells = < 0x00 >;
578					reg = < 0x00 >;
579
580					endpoint@0 {
581						reg = < 0x00 >;
582						remote-endpoint = < 0x21 >;
583						phandle = < 0x0f >;
584					};
585
586					endpoint@1 {
587						reg = < 0x01 >;
588						remote-endpoint = < 0x22 >;
589						phandle = < 0x12 >;
590					};
591				};
592
593				port@1 {
594					#address-cells = < 0x01 >;
595					#size-cells = < 0x00 >;
596					reg = < 0x01 >;
597
598					endpoint {
599						remote-endpoint = < 0x23 >;
600						phandle = < 0x41 >;
601					};
602				};
603			};
604		};
605
606		spi@1c17000 {
607			compatible = "allwinner,sun4i-a10-spi";
608			reg = < 0x1c17000 0x1000 >;
609			interrupts = < 0x00 0x0c 0x04 >;
610			clocks = < 0x02 0x2e 0x02 0x72 >;
611			clock-names = "ahb\0mod";
612			dmas = < 0x0b 0x01 0x1d 0x0b 0x01 0x1c >;
613			dma-names = "rx\0tx";
614			status = "disabled";
615			#address-cells = < 0x01 >;
616			#size-cells = < 0x00 >;
617			num-cs = < 0x01 >;
618		};
619
620		sata@1c18000 {
621			compatible = "allwinner,sun4i-a10-ahci";
622			reg = < 0x1c18000 0x1000 >;
623			interrupts = < 0x00 0x38 0x04 >;
624			clocks = < 0x02 0x31 0x02 0x7a >;
625			status = "okay";
626			target-supply = < 0x24 >;
627		};
628
629		usb@1c1c000 {
630			compatible = "allwinner,sun7i-a20-ehci\0generic-ehci";
631			reg = < 0x1c1c000 0x100 >;
632			interrupts = < 0x00 0x28 0x04 >;
633			clocks = < 0x02 0x1d >;
634			phys = < 0x19 0x02 >;
635			phy-names = "usb";
636			status = "okay";
637		};
638
639		usb@1c1c400 {
640			compatible = "allwinner,sun7i-a20-ohci\0generic-ohci";
641			reg = < 0x1c1c400 0x100 >;
642			interrupts = < 0x00 0x41 0x04 >;
643			clocks = < 0x02 0x7c 0x02 0x1e >;
644			phys = < 0x19 0x02 >;
645			phy-names = "usb";
646			status = "okay";
647		};
648
649		spi@1c1f000 {
650			compatible = "allwinner,sun4i-a10-spi";
651			reg = < 0x1c1f000 0x1000 >;
652			interrupts = < 0x00 0x32 0x04 >;
653			clocks = < 0x02 0x2f 0x02 0x7f >;
654			clock-names = "ahb\0mod";
655			dmas = < 0x0b 0x01 0x1f 0x0b 0x01 0x1e >;
656			dma-names = "rx\0tx";
657			status = "disabled";
658			#address-cells = < 0x01 >;
659			#size-cells = < 0x00 >;
660			num-cs = < 0x01 >;
661		};
662
663		clock@1c20000 {
664			compatible = "allwinner,sun7i-a20-ccu";
665			reg = < 0x1c20000 0x400 >;
666			clocks = < 0x25 0x26 >;
667			clock-names = "hosc\0losc";
668			#clock-cells = < 0x01 >;
669			#reset-cells = < 0x01 >;
670			phandle = < 0x02 >;
671		};
672
673		pinctrl@1c20800 {
674			compatible = "allwinner,sun7i-a20-pinctrl";
675			reg = < 0x1c20800 0x400 >;
676			interrupts = < 0x00 0x1c 0x04 >;
677			clocks = < 0x02 0x4a 0x25 0x26 >;
678			clock-names = "apb\0hosc\0losc";
679			gpio-controller;
680			interrupt-controller;
681			#interrupt-cells = < 0x03 >;
682			#gpio-cells = < 0x03 >;
683			phandle = < 0x16 >;
684
685			can0@0 {
686				pins = "PH20\0PH21";
687				function = "can";
688			};
689
690			clk_out_a@0 {
691				pins = "PI12";
692				function = "clk_out_a";
693			};
694
695			clk_out_b@0 {
696				pins = "PI13";
697				function = "clk_out_b";
698			};
699
700			emac0@0 {
701				pins = "PA0\0PA1\0PA2\0PA3\0PA4\0PA5\0PA6\0PA7\0PA8\0PA9\0PA10\0PA11\0PA12\0PA13\0PA14\0PA15\0PA16";
702				function = "emac";
703			};
704
705			gmac_mii@0 {
706				pins = "PA0\0PA1\0PA2\0PA3\0PA4\0PA5\0PA6\0PA7\0PA8\0PA9\0PA10\0PA11\0PA12\0PA13\0PA14\0PA15\0PA16";
707				function = "gmac";
708			};
709
710			gmac_rgmii@0 {
711				pins = "PA0\0PA1\0PA2\0PA3\0PA4\0PA5\0PA6\0PA7\0PA8\0PA10\0PA11\0PA12\0PA13\0PA15\0PA16";
712				function = "gmac";
713				drive-strength = < 0x28 >;
714				phandle = < 0x31 >;
715			};
716
717			i2c0@0 {
718				pins = "PB0\0PB1";
719				function = "i2c0";
720				phandle = < 0x2c >;
721			};
722
723			i2c1@0 {
724				pins = "PB18\0PB19";
725				function = "i2c1";
726				phandle = < 0x2e >;
727			};
728
729			i2c2@0 {
730				pins = "PB20\0PB21";
731				function = "i2c2";
732				phandle = < 0x2f >;
733			};
734
735			i2c3@0 {
736				pins = "PI0\0PI1";
737				function = "i2c3";
738			};
739
740			ir0@0 {
741				pins = "PB4";
742				function = "ir0";
743				phandle = < 0x2a >;
744			};
745
746			ir0@1 {
747				pins = "PB3";
748				function = "ir0";
749			};
750
751			ir1@0 {
752				pins = "PB23";
753				function = "ir1";
754			};
755
756			ir1@1 {
757				pins = "PB22";
758				function = "ir1";
759			};
760
761			mmc0@0 {
762				pins = "PF0\0PF1\0PF2\0PF3\0PF4\0PF5";
763				function = "mmc0";
764				drive-strength = < 0x1e >;
765				bias-pull-up;
766				phandle = < 0x14 >;
767			};
768
769			mmc2@0 {
770				pins = "PC6\0PC7\0PC8\0PC9\0PC10\0PC11";
771				function = "mmc2";
772				drive-strength = < 0x1e >;
773				bias-pull-up;
774			};
775
776			mmc3@0 {
777				pins = "PI4\0PI5\0PI6\0PI7\0PI8\0PI9";
778				function = "mmc3";
779				drive-strength = < 0x1e >;
780				bias-pull-up;
781				phandle = < 0x17 >;
782			};
783
784			ps20@0 {
785				pins = "PI20\0PI21";
786				function = "ps2";
787			};
788
789			ps21@0 {
790				pins = "PH12\0PH13";
791				function = "ps2";
792			};
793
794			pwm0@0 {
795				pins = "PB2";
796				function = "pwm";
797				phandle = < 0x27 >;
798			};
799
800			pwm1@0 {
801				pins = "PI3";
802				function = "pwm";
803				phandle = < 0x28 >;
804			};
805
806			spdif@0 {
807				pins = "PB13";
808				function = "spdif";
809				bias-pull-up;
810				phandle = < 0x29 >;
811			};
812
813			spi0@0 {
814				pins = "PI11\0PI12\0PI13";
815				function = "spi0";
816			};
817
818			spi0_cs0@0 {
819				pins = "PI10";
820				function = "spi0";
821			};
822
823			spi0_cs1@0 {
824				pins = "PI14";
825				function = "spi0";
826			};
827
828			spi1@0 {
829				pins = "PI17\0PI18\0PI19";
830				function = "spi1";
831			};
832
833			spi1_cs0@0 {
834				pins = "PI16";
835				function = "spi1";
836			};
837
838			spi2@0 {
839				pins = "PC20\0PC21\0PC22";
840				function = "spi2";
841			};
842
843			spi2@1 {
844				pins = "PB15\0PB16\0PB17";
845				function = "spi2";
846			};
847
848			spi2_cs0@0 {
849				pins = "PC19";
850				function = "spi2";
851			};
852
853			spi2_cs0@1 {
854				pins = "PB14";
855				function = "spi2";
856			};
857
858			uart0@0 {
859				pins = "PB22\0PB23";
860				function = "uart0";
861				phandle = < 0x2b >;
862			};
863
864			uart2@0 {
865				pins = "PI16\0PI17\0PI18\0PI19";
866				function = "uart2";
867			};
868
869			uart3@0 {
870				pins = "PG6\0PG7\0PG8\0PG9";
871				function = "uart3";
872			};
873
874			uart3@1 {
875				pins = "PH0\0PH1";
876				function = "uart3";
877			};
878
879			uart4@0 {
880				pins = "PG10\0PG11";
881				function = "uart4";
882			};
883
884			uart4@1 {
885				pins = "PH4\0PH5";
886				function = "uart4";
887			};
888
889			uart5@0 {
890				pins = "PI10\0PI11";
891				function = "uart5";
892			};
893
894			uart6@0 {
895				pins = "PI12\0PI13";
896				function = "uart6";
897			};
898
899			uart7@0 {
900				pins = "PI20\0PI21";
901				function = "uart7";
902			};
903
904			ahci_pwr_pin@1 {
905				pins = "PH12";
906				function = "gpio_out";
907				phandle = < 0x3f >;
908			};
909
910			led_pins@0 {
911				pins = "PH7\0PH11\0PH20\0PH21";
912				function = "gpio_out";
913				phandle = < 0x42 >;
914			};
915
916			mmc3_pwrseq_pin@0 {
917				pins = "PH9";
918				function = "gpio_out";
919				phandle = < 0x43 >;
920			};
921
922			usb0_vbus_pin@0 {
923				pins = "PH17";
924				function = "gpio_out";
925				phandle = < 0x40 >;
926			};
927
928			usb0_id_detect_pin@0 {
929				pins = "PH19";
930				function = "gpio_in";
931				phandle = < 0x1b >;
932			};
933
934			usb0_vbus_detect_pin@0 {
935				pins = "PH22";
936				function = "gpio_in";
937				phandle = < 0x1c >;
938			};
939		};
940
941		timer@1c20c00 {
942			compatible = "allwinner,sun4i-a10-timer";
943			reg = < 0x1c20c00 0x90 >;
944			interrupts = < 0x00 0x16 0x04 0x00 0x17 0x04 0x00 0x18 0x04 0x00 0x19 0x04 0x00 0x43 0x04 0x00 0x44 0x04 >;
945			clocks = < 0x25 >;
946		};
947
948		watchdog@1c20c90 {
949			compatible = "allwinner,sun4i-a10-wdt";
950			reg = < 0x1c20c90 0x10 >;
951		};
952
953		rtc@1c20d00 {
954			compatible = "allwinner,sun7i-a20-rtc";
955			reg = < 0x1c20d00 0x20 >;
956			interrupts = < 0x00 0x18 0x04 >;
957		};
958
959		pwm@1c20e00 {
960			compatible = "allwinner,sun7i-a20-pwm";
961			reg = < 0x1c20e00 0x0c >;
962			clocks = < 0x25 >;
963			#pwm-cells = < 0x03 >;
964			status = "okay";
965			pinctrl-names = "default";
966			pinctrl-0 = < 0x27 0x28 >;
967		};
968
969		spdif@1c21000 {
970			#sound-dai-cells = < 0x00 >;
971			compatible = "allwinner,sun4i-a10-spdif";
972			reg = < 0x1c21000 0x400 >;
973			interrupts = < 0x00 0x0d 0x04 >;
974			clocks = < 0x02 0x46 0x02 0x78 >;
975			clock-names = "apb\0spdif";
976			dmas = < 0x0b 0x00 0x02 0x0b 0x00 0x02 >;
977			dma-names = "rx\0tx";
978			status = "okay";
979			pinctrl-names = "default";
980			pinctrl-0 = < 0x29 >;
981			phandle = < 0x44 >;
982		};
983
984		ir@1c21800 {
985			compatible = "allwinner,sun4i-a10-ir";
986			clocks = < 0x02 0x4b 0x02 0x74 >;
987			clock-names = "apb\0ir";
988			interrupts = < 0x00 0x05 0x04 >;
989			reg = < 0x1c21800 0x40 >;
990			status = "okay";
991			pinctrl-names = "default";
992			pinctrl-0 = < 0x2a >;
993		};
994
995		ir@1c21c00 {
996			compatible = "allwinner,sun4i-a10-ir";
997			clocks = < 0x02 0x4c 0x02 0x75 >;
998			clock-names = "apb\0ir";
999			interrupts = < 0x00 0x06 0x04 >;
1000			reg = < 0x1c21c00 0x40 >;
1001			status = "disabled";
1002		};
1003
1004		i2s@1c22000 {
1005			#sound-dai-cells = < 0x00 >;
1006			compatible = "allwinner,sun4i-a10-i2s";
1007			reg = < 0x1c22000 0x400 >;
1008			interrupts = < 0x00 0x57 0x04 >;
1009			clocks = < 0x02 0x49 0x02 0x80 >;
1010			clock-names = "apb\0mod";
1011			dmas = < 0x0b 0x00 0x04 0x0b 0x00 0x04 >;
1012			dma-names = "rx\0tx";
1013			status = "disabled";
1014		};
1015
1016		i2s@1c22400 {
1017			#sound-dai-cells = < 0x00 >;
1018			compatible = "allwinner,sun4i-a10-i2s";
1019			reg = < 0x1c22400 0x400 >;
1020			interrupts = < 0x00 0x10 0x04 >;
1021			clocks = < 0x02 0x47 0x02 0x76 >;
1022			clock-names = "apb\0mod";
1023			dmas = < 0x0b 0x00 0x03 0x0b 0x00 0x03 >;
1024			dma-names = "rx\0tx";
1025			status = "disabled";
1026		};
1027
1028		lradc@1c22800 {
1029			compatible = "allwinner,sun4i-a10-lradc-keys";
1030			reg = < 0x1c22800 0x100 >;
1031			interrupts = < 0x00 0x1f 0x04 >;
1032			status = "disabled";
1033		};
1034
1035		codec@1c22c00 {
1036			#sound-dai-cells = < 0x00 >;
1037			compatible = "allwinner,sun7i-a20-codec";
1038			reg = < 0x1c22c00 0x40 >;
1039			interrupts = < 0x00 0x1e 0x04 >;
1040			clocks = < 0x02 0x45 0x02 0xa0 >;
1041			clock-names = "apb\0codec";
1042			dmas = < 0x0b 0x00 0x13 0x0b 0x00 0x13 >;
1043			dma-names = "rx\0tx";
1044			status = "okay";
1045		};
1046
1047		eeprom@1c23800 {
1048			compatible = "allwinner,sun7i-a20-sid";
1049			reg = < 0x1c23800 0x200 >;
1050		};
1051
1052		i2s@1c24400 {
1053			#sound-dai-cells = < 0x00 >;
1054			compatible = "allwinner,sun4i-a10-i2s";
1055			reg = < 0x1c24400 0x400 >;
1056			interrupts = < 0x00 0x5a 0x04 >;
1057			clocks = < 0x02 0x4d 0x02 0x81 >;
1058			clock-names = "apb\0mod";
1059			dmas = < 0x0b 0x00 0x06 0x0b 0x00 0x06 >;
1060			dma-names = "rx\0tx";
1061			status = "disabled";
1062		};
1063
1064		rtp@1c25000 {
1065			compatible = "allwinner,sun5i-a13-ts";
1066			reg = < 0x1c25000 0x100 >;
1067			interrupts = < 0x00 0x1d 0x04 >;
1068			#thermal-sensor-cells = < 0x00 >;
1069			phandle = < 0x04 >;
1070		};
1071
1072		serial@1c28000 {
1073			compatible = "snps,dw-apb-uart";
1074			reg = < 0x1c28000 0x400 >;
1075			interrupts = < 0x00 0x01 0x04 >;
1076			reg-shift = < 0x02 >;
1077			reg-io-width = < 0x04 >;
1078			clocks = < 0x02 0x58 >;
1079			status = "okay";
1080			pinctrl-names = "default";
1081			pinctrl-0 = < 0x2b >;
1082		};
1083
1084		serial@1c28400 {
1085			compatible = "snps,dw-apb-uart";
1086			reg = < 0x1c28400 0x400 >;
1087			interrupts = < 0x00 0x02 0x04 >;
1088			reg-shift = < 0x02 >;
1089			reg-io-width = < 0x04 >;
1090			clocks = < 0x02 0x59 >;
1091			status = "disabled";
1092		};
1093
1094		serial@1c28800 {
1095			compatible = "snps,dw-apb-uart";
1096			reg = < 0x1c28800 0x400 >;
1097			interrupts = < 0x00 0x03 0x04 >;
1098			reg-shift = < 0x02 >;
1099			reg-io-width = < 0x04 >;
1100			clocks = < 0x02 0x5a >;
1101			status = "disabled";
1102		};
1103
1104		serial@1c28c00 {
1105			compatible = "snps,dw-apb-uart";
1106			reg = < 0x1c28c00 0x400 >;
1107			interrupts = < 0x00 0x04 0x04 >;
1108			reg-shift = < 0x02 >;
1109			reg-io-width = < 0x04 >;
1110			clocks = < 0x02 0x5b >;
1111			status = "disabled";
1112		};
1113
1114		serial@1c29000 {
1115			compatible = "snps,dw-apb-uart";
1116			reg = < 0x1c29000 0x400 >;
1117			interrupts = < 0x00 0x11 0x04 >;
1118			reg-shift = < 0x02 >;
1119			reg-io-width = < 0x04 >;
1120			clocks = < 0x02 0x5c >;
1121			status = "disabled";
1122		};
1123
1124		serial@1c29400 {
1125			compatible = "snps,dw-apb-uart";
1126			reg = < 0x1c29400 0x400 >;
1127			interrupts = < 0x00 0x12 0x04 >;
1128			reg-shift = < 0x02 >;
1129			reg-io-width = < 0x04 >;
1130			clocks = < 0x02 0x5d >;
1131			status = "disabled";
1132		};
1133
1134		serial@1c29800 {
1135			compatible = "snps,dw-apb-uart";
1136			reg = < 0x1c29800 0x400 >;
1137			interrupts = < 0x00 0x13 0x04 >;
1138			reg-shift = < 0x02 >;
1139			reg-io-width = < 0x04 >;
1140			clocks = < 0x02 0x5e >;
1141			status = "disabled";
1142		};
1143
1144		serial@1c29c00 {
1145			compatible = "snps,dw-apb-uart";
1146			reg = < 0x1c29c00 0x400 >;
1147			interrupts = < 0x00 0x14 0x04 >;
1148			reg-shift = < 0x02 >;
1149			reg-io-width = < 0x04 >;
1150			clocks = < 0x02 0x5f >;
1151			status = "disabled";
1152		};
1153
1154		ps2@1c2a000 {
1155			compatible = "allwinner,sun4i-a10-ps2";
1156			reg = < 0x1c2a000 0x400 >;
1157			interrupts = < 0x00 0x3e 0x04 >;
1158			clocks = < 0x02 0x55 >;
1159			status = "disabled";
1160		};
1161
1162		ps2@1c2a400 {
1163			compatible = "allwinner,sun4i-a10-ps2";
1164			reg = < 0x1c2a400 0x400 >;
1165			interrupts = < 0x00 0x3f 0x04 >;
1166			clocks = < 0x02 0x56 >;
1167			status = "disabled";
1168		};
1169
1170		i2c@1c2ac00 {
1171			compatible = "allwinner,sun7i-a20-i2c\0allwinner,sun4i-a10-i2c";
1172			reg = < 0x1c2ac00 0x400 >;
1173			interrupts = < 0x00 0x07 0x04 >;
1174			clocks = < 0x02 0x4f >;
1175			status = "okay";
1176			#address-cells = < 0x01 >;
1177			#size-cells = < 0x00 >;
1178			pinctrl-names = "default";
1179			pinctrl-0 = < 0x2c >;
1180
1181			pmic@34 {
1182				reg = < 0x34 >;
1183				interrupt-parent = < 0x2d >;
1184				interrupts = < 0x00 0x08 >;
1185				compatible = "x-powers,axp209";
1186				interrupt-controller;
1187				#interrupt-cells = < 0x01 >;
1188
1189				ac-power-supply {
1190					compatible = "x-powers,axp202-ac-power-supply";
1191					status = "okay";
1192				};
1193
1194				adc {
1195					compatible = "x-powers,axp209-adc";
1196					#io-channel-cells = < 0x01 >;
1197				};
1198
1199				gpio {
1200					compatible = "x-powers,axp209-gpio";
1201					gpio-controller;
1202					#gpio-cells = < 0x02 >;
1203				};
1204
1205				battery-power-supply {
1206					compatible = "x-powers,axp209-battery-power-supply";
1207					status = "okay";
1208				};
1209
1210				regulators {
1211					x-powers,dcdc-freq = < 0x5dc >;
1212
1213					dcdc2 {
1214						regulator-name = "vdd-cpu";
1215						regulator-always-on;
1216						regulator-min-microvolt = < 0xf4240 >;
1217						regulator-max-microvolt = < 0x162010 >;
1218						phandle = < 0x03 >;
1219					};
1220
1221					dcdc3 {
1222						regulator-name = "vdd-int-dll";
1223						regulator-always-on;
1224						regulator-min-microvolt = < 0xf4240 >;
1225						regulator-max-microvolt = < 0x155cc0 >;
1226					};
1227
1228					ldo1 {
1229						regulator-always-on;
1230						regulator-min-microvolt = < 0x13d620 >;
1231						regulator-max-microvolt = < 0x13d620 >;
1232						regulator-name = "vdd-rtc";
1233					};
1234
1235					ldo2 {
1236						regulator-name = "avcc";
1237						regulator-always-on;
1238						regulator-min-microvolt = < 0x2dc6c0 >;
1239						regulator-max-microvolt = < 0x2dc6c0 >;
1240					};
1241
1242					ldo3 {
1243						regulator-name = "ldo3";
1244					};
1245
1246					ldo4 {
1247						regulator-name = "ldo4";
1248					};
1249
1250					ldo5 {
1251						regulator-name = "ldo5";
1252						status = "disabled";
1253					};
1254				};
1255
1256				usb-power-supply {
1257					compatible = "x-powers,axp202-usb-power-supply";
1258					status = "okay";
1259					phandle = < 0x1d >;
1260				};
1261			};
1262		};
1263
1264		i2c@1c2b000 {
1265			compatible = "allwinner,sun7i-a20-i2c\0allwinner,sun4i-a10-i2c";
1266			reg = < 0x1c2b000 0x400 >;
1267			interrupts = < 0x00 0x08 0x04 >;
1268			clocks = < 0x02 0x50 >;
1269			status = "okay";
1270			#address-cells = < 0x01 >;
1271			#size-cells = < 0x00 >;
1272			pinctrl-names = "default";
1273			pinctrl-0 = < 0x2e >;
1274		};
1275
1276		i2c@1c2b400 {
1277			compatible = "allwinner,sun7i-a20-i2c\0allwinner,sun4i-a10-i2c";
1278			reg = < 0x1c2b400 0x400 >;
1279			interrupts = < 0x00 0x09 0x04 >;
1280			clocks = < 0x02 0x51 >;
1281			status = "okay";
1282			#address-cells = < 0x01 >;
1283			#size-cells = < 0x00 >;
1284			pinctrl-names = "default";
1285			pinctrl-0 = < 0x2f >;
1286		};
1287
1288		i2c@1c2b800 {
1289			compatible = "allwinner,sun7i-a20-i2c\0allwinner,sun4i-a10-i2c";
1290			reg = < 0x1c2b800 0x400 >;
1291			interrupts = < 0x00 0x58 0x04 >;
1292			clocks = < 0x02 0x52 >;
1293			status = "disabled";
1294			#address-cells = < 0x01 >;
1295			#size-cells = < 0x00 >;
1296		};
1297
1298		can@1c2bc00 {
1299			compatible = "allwinner,sun7i-a20-can\0allwinner,sun4i-a10-can";
1300			reg = < 0x1c2bc00 0x400 >;
1301			interrupts = < 0x00 0x1a 0x04 >;
1302			clocks = < 0x02 0x53 >;
1303			status = "disabled";
1304		};
1305
1306		i2c@1c2c000 {
1307			compatible = "allwinner,sun7i-a20-i2c\0allwinner,sun4i-a10-i2c";
1308			reg = < 0x1c2c000 0x400 >;
1309			interrupts = < 0x00 0x59 0x04 >;
1310			clocks = < 0x02 0x57 >;
1311			status = "disabled";
1312			#address-cells = < 0x01 >;
1313			#size-cells = < 0x00 >;
1314		};
1315
1316		gpu@1c40000 {
1317			compatible = "allwinner,sun7i-a20-mali\0arm,mali-400";
1318			reg = < 0x1c40000 0x10000 >;
1319			interrupts = < 0x00 0x45 0x04 0x00 0x46 0x04 0x00 0x47 0x04 0x00 0x48 0x04 0x00 0x4a 0x04 0x00 0x4b 0x04 0x00 0x49 0x04 >;
1320			interrupt-names = "gp\0gpmmu\0pp0\0ppmmu0\0pp1\0ppmmu1\0pmu";
1321			clocks = < 0x02 0x44 0x02 0xa5 >;
1322			clock-names = "bus\0core";
1323			resets = < 0x02 0x13 >;
1324			assigned-clocks = < 0x02 0xa5 >;
1325			assigned-clock-rates = < 0x16e36000 >;
1326		};
1327
1328		ethernet@1c50000 {
1329			compatible = "allwinner,sun7i-a20-gmac";
1330			reg = < 0x1c50000 0x10000 >;
1331			interrupts = < 0x00 0x55 0x04 >;
1332			interrupt-names = "macirq";
1333			clocks = < 0x02 0x42 0x30 >;
1334			clock-names = "stmmaceth\0allwinner_gmac_tx";
1335			snps,pbl = < 0x02 >;
1336			snps,fixed-burst;
1337			snps,force_sf_dma_mode;
1338			status = "okay";
1339			#address-cells = < 0x01 >;
1340			#size-cells = < 0x00 >;
1341			pinctrl-names = "default";
1342			pinctrl-0 = < 0x31 >;
1343			phy = < 0x32 >;
1344			phy-mode = "rgmii";
1345
1346			ethernet-phy@1 {
1347				reg = < 0x01 >;
1348				phandle = < 0x32 >;
1349			};
1350		};
1351
1352		hstimer@1c60000 {
1353			compatible = "allwinner,sun7i-a20-hstimer";
1354			reg = < 0x1c60000 0x1000 >;
1355			interrupts = < 0x00 0x51 0x04 0x00 0x52 0x04 0x00 0x53 0x04 0x00 0x54 0x04 >;
1356			clocks = < 0x02 0x33 >;
1357		};
1358
1359		interrupt-controller@1c81000 {
1360			compatible = "arm,gic-400\0arm,cortex-a7-gic\0arm,cortex-a15-gic";
1361			reg = < 0x1c81000 0x1000 0x1c82000 0x2000 0x1c84000 0x2000 0x1c86000 0x2000 >;
1362			interrupt-controller;
1363			#interrupt-cells = < 0x03 >;
1364			interrupts = < 0x01 0x09 0xf04 >;
1365			phandle = < 0x01 >;
1366		};
1367
1368		display-frontend@1e00000 {
1369			compatible = "allwinner,sun7i-a20-display-frontend";
1370			reg = < 0x1e00000 0x20000 >;
1371			interrupts = < 0x00 0x2f 0x04 >;
1372			clocks = < 0x02 0x40 0x02 0x92 0x02 0x8b >;
1373			clock-names = "ahb\0mod\0ram";
1374			resets = < 0x02 0x07 >;
1375			phandle = < 0x09 >;
1376
1377			ports {
1378				#address-cells = < 0x01 >;
1379				#size-cells = < 0x00 >;
1380
1381				port@1 {
1382					#address-cells = < 0x01 >;
1383					#size-cells = < 0x00 >;
1384					reg = < 0x01 >;
1385
1386					endpoint@0 {
1387						reg = < 0x00 >;
1388						remote-endpoint = < 0x33 >;
1389						phandle = < 0x3b >;
1390					};
1391
1392					endpoint@1 {
1393						reg = < 0x01 >;
1394						remote-endpoint = < 0x34 >;
1395						phandle = < 0x37 >;
1396					};
1397				};
1398			};
1399		};
1400
1401		display-frontend@1e20000 {
1402			compatible = "allwinner,sun7i-a20-display-frontend";
1403			reg = < 0x1e20000 0x20000 >;
1404			interrupts = < 0x00 0x30 0x04 >;
1405			clocks = < 0x02 0x41 0x02 0x93 0x02 0x8a >;
1406			clock-names = "ahb\0mod\0ram";
1407			resets = < 0x02 0x08 >;
1408			phandle = < 0x0a >;
1409
1410			ports {
1411				#address-cells = < 0x01 >;
1412				#size-cells = < 0x00 >;
1413
1414				port@1 {
1415					#address-cells = < 0x01 >;
1416					#size-cells = < 0x00 >;
1417					reg = < 0x01 >;
1418
1419					endpoint@0 {
1420						reg = < 0x00 >;
1421						remote-endpoint = < 0x35 >;
1422						phandle = < 0x3c >;
1423					};
1424
1425					endpoint@1 {
1426						reg = < 0x01 >;
1427						remote-endpoint = < 0x36 >;
1428						phandle = < 0x38 >;
1429					};
1430				};
1431			};
1432		};
1433
1434		display-backend@1e40000 {
1435			compatible = "allwinner,sun7i-a20-display-backend";
1436			reg = < 0x1e40000 0x10000 >;
1437			interrupts = < 0x00 0x30 0x04 >;
1438			clocks = < 0x02 0x3f 0x02 0x91 0x02 0x8d >;
1439			clock-names = "ahb\0mod\0ram";
1440			resets = < 0x02 0x06 >;
1441
1442			ports {
1443				#address-cells = < 0x01 >;
1444				#size-cells = < 0x00 >;
1445
1446				port@0 {
1447					#address-cells = < 0x01 >;
1448					#size-cells = < 0x00 >;
1449					reg = < 0x00 >;
1450
1451					endpoint@0 {
1452						reg = < 0x00 >;
1453						remote-endpoint = < 0x37 >;
1454						phandle = < 0x34 >;
1455					};
1456
1457					endpoint@1 {
1458						reg = < 0x01 >;
1459						remote-endpoint = < 0x38 >;
1460						phandle = < 0x36 >;
1461					};
1462				};
1463
1464				port@1 {
1465					#address-cells = < 0x01 >;
1466					#size-cells = < 0x00 >;
1467					reg = < 0x01 >;
1468
1469					endpoint@0 {
1470						reg = < 0x00 >;
1471						remote-endpoint = < 0x39 >;
1472						phandle = < 0x0e >;
1473					};
1474
1475					endpoint@1 {
1476						reg = < 0x01 >;
1477						remote-endpoint = < 0x3a >;
1478						phandle = < 0x11 >;
1479					};
1480				};
1481			};
1482		};
1483
1484		display-backend@1e60000 {
1485			compatible = "allwinner,sun7i-a20-display-backend";
1486			reg = < 0x1e60000 0x10000 >;
1487			interrupts = < 0x00 0x2f 0x04 >;
1488			clocks = < 0x02 0x3e 0x02 0x90 0x02 0x8c >;
1489			clock-names = "ahb\0mod\0ram";
1490			resets = < 0x02 0x05 >;
1491
1492			ports {
1493				#address-cells = < 0x01 >;
1494				#size-cells = < 0x00 >;
1495
1496				port@0 {
1497					#address-cells = < 0x01 >;
1498					#size-cells = < 0x00 >;
1499					reg = < 0x00 >;
1500
1501					endpoint@0 {
1502						reg = < 0x00 >;
1503						remote-endpoint = < 0x3b >;
1504						phandle = < 0x33 >;
1505					};
1506
1507					endpoint@1 {
1508						reg = < 0x01 >;
1509						remote-endpoint = < 0x3c >;
1510						phandle = < 0x35 >;
1511					};
1512				};
1513
1514				port@1 {
1515					#address-cells = < 0x01 >;
1516					#size-cells = < 0x00 >;
1517					reg = < 0x01 >;
1518
1519					endpoint@0 {
1520						reg = < 0x00 >;
1521						remote-endpoint = < 0x3d >;
1522						phandle = < 0x0d >;
1523					};
1524
1525					endpoint@1 {
1526						reg = < 0x01 >;
1527						remote-endpoint = < 0x3e >;
1528						phandle = < 0x10 >;
1529					};
1530				};
1531			};
1532		};
1533	};
1534
1535	ahci-5v {
1536		compatible = "regulator-fixed";
1537		regulator-name = "ahci-5v";
1538		regulator-min-microvolt = < 0x4c4b40 >;
1539		regulator-max-microvolt = < 0x4c4b40 >;
1540		regulator-boot-on;
1541		enable-active-high;
1542		gpio = < 0x16 0x07 0x0c 0x00 >;
1543		status = "okay";
1544		pinctrl-0 = < 0x3f >;
1545		phandle = < 0x24 >;
1546	};
1547
1548	usb0-vbus {
1549		compatible = "regulator-fixed";
1550		regulator-name = "usb0-vbus";
1551		regulator-min-microvolt = < 0x4c4b40 >;
1552		regulator-max-microvolt = < 0x4c4b40 >;
1553		enable-active-high;
1554		gpio = < 0x16 0x07 0x11 0x00 >;
1555		status = "okay";
1556		pinctrl-0 = < 0x40 >;
1557		phandle = < 0x1e >;
1558	};
1559
1560	usb1-vbus {
1561		compatible = "regulator-fixed";
1562		regulator-name = "usb1-vbus";
1563		regulator-min-microvolt = < 0x4c4b40 >;
1564		regulator-max-microvolt = < 0x4c4b40 >;
1565		regulator-boot-on;
1566		enable-active-high;
1567		gpio = < 0x16 0x07 0x06 0x00 >;
1568		status = "okay";
1569		phandle = < 0x1f >;
1570	};
1571
1572	usb2-vbus {
1573		compatible = "regulator-fixed";
1574		regulator-name = "usb2-vbus";
1575		regulator-min-microvolt = < 0x4c4b40 >;
1576		regulator-max-microvolt = < 0x4c4b40 >;
1577		regulator-boot-on;
1578		enable-active-high;
1579		gpio = < 0x16 0x07 0x03 0x00 >;
1580		status = "okay";
1581		phandle = < 0x20 >;
1582	};
1583
1584	vcc3v0 {
1585		compatible = "regulator-fixed";
1586		regulator-name = "vcc3v0";
1587		regulator-min-microvolt = < 0x2dc6c0 >;
1588		regulator-max-microvolt = < 0x2dc6c0 >;
1589	};
1590
1591	vcc3v3 {
1592		compatible = "regulator-fixed";
1593		regulator-name = "vcc3v3";
1594		regulator-min-microvolt = < 0x325aa0 >;
1595		regulator-max-microvolt = < 0x325aa0 >;
1596		phandle = < 0x15 >;
1597	};
1598
1599	vcc5v0 {
1600		compatible = "regulator-fixed";
1601		regulator-name = "vcc5v0";
1602		regulator-min-microvolt = < 0x4c4b40 >;
1603		regulator-max-microvolt = < 0x4c4b40 >;
1604	};
1605
1606	hdmi-connector {
1607		compatible = "hdmi-connector";
1608		type = [ 61 00 ];
1609
1610		port {
1611
1612			endpoint {
1613				remote-endpoint = < 0x41 >;
1614				phandle = < 0x23 >;
1615			};
1616		};
1617	};
1618
1619	leds {
1620		compatible = "gpio-leds";
1621		pinctrl-names = "default";
1622		pinctrl-0 = < 0x42 >;
1623
1624		blue {
1625			label = "cubietruck:blue:usr";
1626			gpios = < 0x16 0x07 0x15 0x00 >;
1627		};
1628
1629		orange {
1630			label = "cubietruck:orange:usr";
1631			gpios = < 0x16 0x07 0x14 0x00 >;
1632		};
1633
1634		white {
1635			label = "cubietruck:white:usr";
1636			gpios = < 0x16 0x07 0x0b 0x00 >;
1637		};
1638
1639		green {
1640			label = "cubietruck:green:usr";
1641			gpios = < 0x16 0x07 0x07 0x00 >;
1642		};
1643	};
1644
1645	mmc3_pwrseq {
1646		compatible = "mmc-pwrseq-simple";
1647		pinctrl-names = "default";
1648		pinctrl-0 = < 0x43 >;
1649		reset-gpios = < 0x16 0x07 0x09 0x01 >;
1650		phandle = < 0x18 >;
1651	};
1652
1653	sound {
1654		compatible = "simple-audio-card";
1655		simple-audio-card,name = "On-board SPDIF";
1656
1657		simple-audio-card,cpu {
1658			sound-dai = < 0x44 >;
1659		};
1660
1661		simple-audio-card,codec {
1662			sound-dai = < 0x45 >;
1663		};
1664	};
1665
1666	spdif-out {
1667		#sound-dai-cells = < 0x00 >;
1668		compatible = "linux,spdif-dit";
1669		phandle = < 0x45 >;
1670	};
1671};
1672