1/* 2 * Copyright 2017, Data61 3 * Commonwealth Scientific and Industrial Research Organisation (CSIRO) 4 * ABN 41 687 119 230. 5 * 6 * This software may be distributed and modified according to the terms of 7 * the BSD 2-Clause license. Note that NO WARRANTY is provided. 8 * See "LICENSE_BSD2.txt" for details. 9 * 10 * @TAG(DATA61_BSD) 11 */ 12#include <platsupport/plat/sysreg.h> 13#include "../../services.h" 14 15/** PWRREG **/ 16#define PWRREG_PHY_CONTROL_OFFSET 0x708 17#define PWRREG_PHY_CONTROL_PHY_EN BIT(0) 18 19/** SYSREG **/ 20#define SYSREG_PHY_CONFIG_OFFSET 0x230 21#define SYSREG_PHY_CONFIG_PHY_EN BIT(0) 22 23static inline volatile uint32_t* 24sreg(sysreg_t* sysreg, int offset) 25{ 26 void* reg = sysreg->sysreg_vaddr[offset >> 12] + (offset & MASK(12)); 27 return (volatile uint32_t*)reg; 28} 29 30static inline volatile uint32_t* 31preg(sysreg_t* sysreg, int offset) 32{ 33 void* reg_base; 34 reg_base = sysreg->pwrreg_vaddr[offset >> 12]; 35 if (reg_base) { 36 return (volatile uint32_t*)(reg_base + (offset & MASK(12))); 37 } else { 38 return NULL; 39 } 40} 41 42int 43exynos5_sysreg_init(ps_io_ops_t* ops, sysreg_t* sysreg) 44{ 45 int i; 46 for (i = 0; i < EXYNOS5_SYSREG_SIZE >> 12; i++) { 47 if (sysreg->sysreg_vaddr[i] == NULL) { 48 void *vaddr; 49 vaddr = ps_io_map(&ops->io_mapper, 50 EXYNOS5_SYSREG_PADDR + i * BIT(12), 51 0x1000, 0, PS_MEM_NORMAL); 52 sysreg->sysreg_vaddr[i] = vaddr; 53 } 54 } 55 for (i = 0; i < EXYNOS5_POWER_SIZE >> 12; i++) { 56 if (sysreg->pwrreg_vaddr[i] == NULL) { 57 void *vaddr; 58 vaddr = ps_io_map(&ops->io_mapper, 59 EXYNOS5_POWER_PADDR + i * BIT(12), 60 0x1000 , 0, PS_MEM_NORMAL); 61 62 sysreg->pwrreg_vaddr[i] = vaddr; 63 } 64 } 65 return 0; 66} 67 68int 69exynos5_sysreg_usbphy_enable(enum usb_phy_id phy_id, sysreg_t* sysreg) 70{ 71 volatile uint32_t* a; 72 a = sreg(sysreg, SYSREG_PHY_CONFIG_OFFSET); 73 if (a) { 74 *a |= SYSREG_PHY_CONFIG_PHY_EN; 75 } 76 a = preg(sysreg, PWRREG_PHY_CONTROL_OFFSET); 77 if (a) { 78 *a |= PWRREG_PHY_CONTROL_PHY_EN; 79 } 80 return 0; 81} 82