1/*
2 * Copyright 2018, Data61
3 * Commonwealth Scientific and Industrial Research Organisation (CSIRO)
4 * ABN 41 687 119 230.
5 *
6 * This software may be distributed and modified according to the terms of
7 * the GNU General Public License version 2. Note that NO WARRANTY is provided.
8 * See "LICENSE_GPLv2.txt" for details.
9 *
10 * @TAG(DATA61_GPL)
11 */
12
13/*
14 *
15 * Copyright 2016, 2017 Hesham Almatary, Data61/CSIRO <hesham.almatary@data61.csiro.au>
16 * Copyright 2015, 2016 Hesham Almatary <heshamelmatary@gmail.com>
17 */
18
19#include <config.h>
20#include <machine/assembler.h>
21#include <arch/machine/hardware.h>
22#include <arch/api/syscall.h>
23#include <arch/machine/registerset.h>
24#include <util.h>
25
26#define REGBYTES (CONFIG_WORD_SIZE / 8)
27
28.section .text
29
30.global trap_entry
31.extern c_handle_syscall
32.extern c_handle_interrupt
33.extern c_handle_exception
34.extern restore_user_context
35
36trap_entry:
37
38  csrrw t0, sscratch, t0
39
40  STORE ra, (0*REGBYTES)(t0)
41  STORE sp, (1*REGBYTES)(t0)
42  STORE gp, (2*REGBYTES)(t0)
43  STORE tp, (3*REGBYTES)(t0)
44  STORE t1, (5*REGBYTES)(t0)
45  STORE t2, (6*REGBYTES)(t0)
46  STORE s0, (7*REGBYTES)(t0)
47  STORE s1, (8*REGBYTES)(t0)
48  STORE a0, (9*REGBYTES)(t0)
49  STORE a1, (10*REGBYTES)(t0)
50  STORE a2, (11*REGBYTES)(t0)
51  STORE a3, (12*REGBYTES)(t0)
52  STORE a4, (13*REGBYTES)(t0)
53  STORE a5, (14*REGBYTES)(t0)
54  STORE a6, (15*REGBYTES)(t0)
55  STORE a7, (16*REGBYTES)(t0)
56  STORE s2, (17*REGBYTES)(t0)
57  STORE s3, (18*REGBYTES)(t0)
58  STORE s4, (19*REGBYTES)(t0)
59  STORE s5, (20*REGBYTES)(t0)
60  STORE s6, (21*REGBYTES)(t0)
61  STORE s7, (22*REGBYTES)(t0)
62  STORE s8, (23*REGBYTES)(t0)
63  STORE s9, (24*REGBYTES)(t0)
64  STORE s10, (25*REGBYTES)(t0)
65  STORE s11, (26*REGBYTES)(t0)
66  STORE t3, (27*REGBYTES)(t0)
67  STORE t4, (28*REGBYTES)(t0)
68  STORE t5, (29*REGBYTES)(t0)
69  STORE t6, (30*REGBYTES)(t0)
70
71  /* save t0 value */
72  csrr  x1, sscratch
73  STORE    x1, (4*REGBYTES)(t0)
74
75  csrr x1, sstatus
76  STORE x1, (32*REGBYTES)(t0)
77
78  csrr s0, scause
79  STORE s0, (31*REGBYTES)(t0)
80
81  /* Save exception PC */
82  csrr x1,  sepc
83  STORE   x1, (33*REGBYTES)(t0)
84
85  la gp, __global_pointer$
86
87  /* Load kernel's stack address */
88  la sp, (kernel_stack_alloc + BIT(CONFIG_KERNEL_STACK_BITS))
89
90  /* Check if it's an interrupt */
91  srli s2, s0, (CONFIG_WORD_SIZE - 1)
92  li   s1, 0x1
93  beq  s2, s1, interrupt
94
95  andi s0, s0, 0xf /* priv 1.10 defines up to 15 exceptions/interrupts */
96  li   s4, 8       /* priv 1.10 has value 8 for ecall exception */
97  bne  s0, s4, exception
98
99syscall:
100  /* Set the return address to sepc + 4 in the case of a system/environment call */
101  addi x1, x1, 4
102  /* Save NEXTPC */
103  STORE   x1, (34*REGBYTES)(t0)
104
105  j c_handle_syscall
106
107/* Not an interrupt or a syscall */
108exception:
109  /* Save NEXTPC */
110  STORE   x1, (34*REGBYTES)(t0)
111  j c_handle_exception
112
113interrupt:
114  /* Save NEXTPC */
115  STORE   x1, (34*REGBYTES)(t0)
116  j c_handle_interrupt
117