1/* 2 * Copyright 2017, General Dynamics C4 Systems 3 * 4 * SPDX-License-Identifier: GPL-2.0-only 5 */ 6#pragma once 7 8static inline word_t sanitiseRegister(register_t reg, word_t v, bool_t archInfo) 9{ 10 if (reg == CPSR) { 11#ifdef CONFIG_ARM_HYPERVISOR_SUPPORT 12 /* on aarch32 archInfo means 'has VCPU', see Arch_getSanitiseRegisterInfo below */ 13 if (archInfo) { 14 switch (v & 0x1f) { 15 case PMODE_USER: 16 case PMODE_FIQ: 17 case PMODE_IRQ: 18 case PMODE_SUPERVISOR: 19 case PMODE_ABORT: 20 case PMODE_UNDEFINED: 21 case PMODE_SYSTEM: 22 return v; 23 case PMODE_HYPERVISOR: 24 default: 25 /* For backwards compatibility, Invalid modes revert to USER mode */ 26 break; 27 } 28 } 29#endif /* CONFIG_ARM_HYPERVISOR_SUPPORT */ 30 31 return (v & 0xf8000000) | CPSR_USER; 32 } else { 33 return v; 34 } 35} 36 37static inline bool_t PURE Arch_getSanitiseRegisterInfo(tcb_t *thread) 38{ 39#ifdef CONFIG_ARM_HYPERVISOR_SUPPORT 40 return (thread->tcbArch.tcbVCPU != NULL); 41#else 42 return 0; 43#endif /* CONFIG_ARM_HYPERVISOR_SUPPORT */ 44} 45 46 47