1/*
2 * Copyright 2015, DornerWorks, Ltd.
3 *
4 * This software may be distributed and modified according to the terms of
5 * the GNU General Public License version 2. Note that NO WARRANTY is provided.
6 * See "LICENSE_GPLv2.txt" for details.
7 *
8 * @TAG(GD_GPL)
9 */
10
11#include <arch/machine.h>
12
13static inline word_t
14readACR(void)
15{
16    word_t ACR;
17    asm volatile ("mrc p15,0,%0,c1,c0,1" : "=r"(ACR));
18    return ACR;
19}
20
21static inline void
22writeACR(word_t ACR)
23{
24    asm volatile ("mcr p15,0,%0,c1,c0,1" : : "r"(ACR));
25}
26
27void
28initL2Cache(void)
29{
30    cleanInvalidateL1Caches();
31
32    /*
33     * Set the L2EN bit in the Auxially Control Register.
34     *
35     * We assume the C bit is already set in the system control register (from
36     * head.S), and that the L2 Cache Auxilliary Control Register is correct
37     * (as per reset).
38     */
39    writeACR(readACR() | 0x2);
40
41    cleanInvalidateL1Caches();
42}
43