1/* 2 * Copyright 2020, Data61, CSIRO (ABN 41 687 119 230) 3 * 4 * SPDX-License-Identifier: GPL-2.0-only 5 */ 6 7 #include <assembler.h> 8 #include <mode/assembler.h> 9 10 #define ABORTSTACK_SIZE 4096 11.text 12 13.align 12 14BEGIN_FUNC(arm_vector_table) 15 ldr pc, =invalid_vector_entry 16 ldr pc, =invalid_vector_entry 17 ldr pc, =invalid_vector_entry 18 ldr pc, =invalid_vector_entry 19 ldr pc, =arm_data_abort_exception 20 ldr pc, =invalid_vector_entry 21 ldr pc, =arm_irq_exception 22 ldr pc, =invalid_vector_entry 23arm_vector_literals: 24.globl arm_vector_literals 25.ltorg 26END_FUNC(arm_vector_table) 27 28.align 12 29/* 30 * If any of the following exception happens, then there is something wrong 31 * with our code, so abort explicitly: 32 * - Undefined Instruction 33 * - Supervisor Call 34 * - Prefetch Abort 35 */ 36BEGIN_FUNC(invalid_vector_entry) 37 adr sp, _abortstack_bottom 38 add sp, sp, #ABORTSTACK_SIZE 39 bl invalid_exception 40END_FUNC(invalid_vector_entry) 41 42/* 43 * Otherwise, we may receive some exceptions due to bootloader inappropriate 44 * initialization, simply ignore them: 45 * - Aborting instruction only if imprecise 46 * - IRQ next instruction 47 */ 48BEGIN_FUNC(arm_data_abort_exception) 49 adr sp, _abortstack_bottom 50 add sp, sp, #ABORTSTACK_SIZE 51 52 /* Store CPSR and LR on stack */ 53 sub lr, lr, #8 54 srsdb sp!, #PMODE_ABORT 55 56 mrc p15, 0, r0, c5, c0, 0 /* Get data fault status register. */ 57 mrc p15, 0, r1, c6, c0, 0 /* Get fault address register. */ 58 59 bl check_data_abort_exception 60 61 /* Jump to NextPC and restore user CPSR */ 62 rfeia sp! 63END_FUNC(arm_data_abort_exception) 64 65BEGIN_FUNC(arm_irq_exception) 66 adr sp, _abortstack_bottom 67 add sp, sp, #ABORTSTACK_SIZE 68 69 /* Store CPSR and LR on stack */ 70 sub lr, lr, #4 71 srsdb sp!, #PMODE_IRQ 72 73 bl valid_exception 74 75 /* Jump to NextPC and restore CPSR */ 76 rfeia sp! 77END_FUNC(arm_irq_exception) 78 79.align 3 80_abortstack_bottom: 81.space ABORTSTACK_SIZE 82_abortstack_top: 83