1/*
2 * Copyright 2018, Data61
3 * Commonwealth Scientific and Industrial Research Organisation (CSIRO)
4 * ABN 41 687 119 230.
5 *
6 * This software may be distributed and modified according to the terms of
7 * the BSD 2-Clause license. Note that NO WARRANTY is provided.
8 * See "LICENSE_BSD2.txt" for details.
9 *
10 * @TAG(DATA61_BSD)
11 */
12
13#pragma once
14
15/* the NVIDIA Timers (TMR) in the manual, there are 10 of them for TK1
16 * each timer has a 29-bit programmable timer counter and a 32-bit
17 * timestamp counter
18 * */
19
20#include <stdint.h>
21
22#define TMR0_OFFSET         0x10000
23#define TMR1_OFFSET         0x20000
24#define TMR2_OFFSET         0x30000
25#define TMR3_OFFSET         0x40000
26#define TMR4_OFFSET         0x50000
27#define TMR5_OFFSET         0x60000
28#define TMR6_OFFSET         0x70000
29#define TMR7_OFFSET         0x80000
30#define TMR8_OFFSET         0x90000
31#define TMR9_OFFSET         0xA0000
32#define TMRUS_OFFSET        0x8
33#define TMR_SHARED_OFFSET   0
34
35#define NV_TMR_PATH "/timer@3020000"
36#define NV_TMR_ID TMR0
37#define NV_TMR_ID_OFFSET TMR0_OFFSET
38
39struct tmr_shared_map {
40    uint32_t TKETSC0; // Value of local TSC counter TSC[31:0], synchronized across SOC
41    uint32_t TKETSC1; // Value of local TSC counter {8���h0, TSC[55:32]}, synchronized across SOC
42    uint32_t TKEUSEC; // This is the same as the tmrus_map.cntr_1us below
43    uint32_t TKEOSC;  // Value of local OSC counter, not synchronized across SOC
44    uint32_t TKECR;   // Control register
45    uint32_t pad[(0x100 / 4) - 5]; // Have to pad to 0x100
46    uint32_t TKEIE[10]; // Routing of shared interrupt {i}, a bit mask indicating which
47    // of the internal interrupts is propagated to external interrupt {i},
48    uint32_t pad1[(0x100 / 4) - 10]; // Have to pad to 0x200
49    uint32_t TKEIV;   // Which shared interrupts are currently asserted
50    uint32_t TKEIR;   // Which internal interrupts are currently asserted, before applying the
51    // TKEIE masks
52} PACKED;
53static_assert(sizeof(struct tmr_shared_map) == 0x208, "struct tmr_shared_map has incorrect layout");
54
55/* A free-running read-only counter changes once very microsecond.
56   On TX2 this is just a register in the shared Timer region. */
57struct tmrus_map {
58    uint32_t cntr_1us; /* offset 0 */
59};
60
61#include <platsupport/mach/timer.h>
62