1/* 2 * Copyright 2017, Data61 3 * Commonwealth Scientific and Industrial Research Organisation (CSIRO) 4 * ABN 41 687 119 230. 5 * 6 * This software may be distributed and modified according to the terms of 7 * the BSD 2-Clause license. Note that NO WARRANTY is provided. 8 * See "LICENSE_BSD2.txt" for details. 9 * 10 * @TAG(DATA61_BSD) 11 */ 12 13#pragma once 14 15/* IRQS */ 16#define EXYNOS_SPI0_IRQ 88 17#define EXYNOS_SPI1_IRQ 89 18#define EXYNOS_SPI2_IRQ 90 19#define EXYNOS_SPI0_ISP_IRQ 91 20#define EXYNOS_SPI1_ISP_IRQ 92 21 22/* Physical addresses */ 23#define EXYNOS_SPI0_PADDR 0x12D20000 24#define EXYNOS_SPI1_PADDR 0x12D30000 25#define EXYNOS_SPI2_PADDR 0x12D40000 26#define EXYNOS_SPI0_ISP_PADDR 0x131A0000 27#define EXYNOS_SPI1_ISP_PADDR 0x131B0000 28 29/* Sizes */ 30#define EXYNOS_SPIX_SIZE 0x1000 31#define EXYNOS_SPI0_SIZE EXYNOS_SPIX_SIZE 32#define EXYNOS_SPI1_SIZE EXYNOS_SPIX_SIZE 33#define EXYNOS_SPI2_SIZE EXYNOS_SPIX_SIZE 34#define EXYNOS_SPI0_ISP_SIZE EXYNOS_SPIX_SIZE 35#define EXYNOS_SPI1_ISP_SIZE EXYNOS_SPIX_SIZE 36 37enum spi_id { 38 SPI0, 39 SPI1, 40 SPI2, 41 SPI0_ISP, 42 SPI1_ISP, 43 NSPI, 44 45 SPI3 = SPI0_ISP, 46 SPI4 = SPI1_ISP 47}; 48 49int exynos_spi_init(enum spi_id id, void* base, 50 mux_sys_t* mux_sys, clock_sys_t* clock_sys, 51 spi_bus_t** spi_bus); 52 53