1/* 2 * Generic PHY Management code 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 * 6 * Copyright 2011 Freescale Semiconductor, Inc. 7 * author Andy Fleming 8 * 9 * Based loosely off of Linux's PHY Lib 10 */ 11 12#include <stdlib.h> 13#include "config.h" 14#include "common.h" 15#include "net.h" 16// #include "dm.h" 17#include "miiphy.h" 18#include "phy.h" 19#include "err.h" 20#include <errno.h> 21#include "bitops.h" 22#include "../unimplemented.h" 23#include "string.h" 24 25/* Generic PHY support and helper functions */ 26 27/** 28 * genphy_config_advert - sanitize and advertise auto-negotation parameters 29 * @phydev: target phy_device struct 30 * 31 * Description: Writes MII_ADVERTISE with the appropriate values, 32 * after sanitizing the values to make sure we only advertise 33 * what is supported. Returns < 0 on error, 0 if the PHY's advertisement 34 * hasn't changed, and > 0 if it has changed. 35 */ 36static int genphy_config_advert(struct phy_device *phydev) 37{ 38 u32 advertise; 39 int oldadv, adv, bmsr; 40 int err, changed = 0; 41 42 /* Only allow advertising what this PHY supports */ 43 phydev->advertising &= phydev->supported; 44 advertise = phydev->advertising; 45 46 /* Setup standard advertisement */ 47 adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE); 48 oldadv = adv; 49 50 if (adv < 0) 51 return adv; 52 53 adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP | 54 ADVERTISE_PAUSE_ASYM); 55 if (advertise & ADVERTISED_10baseT_Half) 56 adv |= ADVERTISE_10HALF; 57 if (advertise & ADVERTISED_10baseT_Full) 58 adv |= ADVERTISE_10FULL; 59 if (advertise & ADVERTISED_100baseT_Half) 60 adv |= ADVERTISE_100HALF; 61 if (advertise & ADVERTISED_100baseT_Full) 62 adv |= ADVERTISE_100FULL; 63 if (advertise & ADVERTISED_Pause) 64 adv |= ADVERTISE_PAUSE_CAP; 65 if (advertise & ADVERTISED_Asym_Pause) 66 adv |= ADVERTISE_PAUSE_ASYM; 67 if (advertise & ADVERTISED_1000baseX_Half) 68 adv |= ADVERTISE_1000XHALF; 69 if (advertise & ADVERTISED_1000baseX_Full) 70 adv |= ADVERTISE_1000XFULL; 71 72 if (adv != oldadv) { 73 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv); 74 75 if (err < 0) 76 return err; 77 changed = 1; 78 } 79 80 bmsr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); 81 if (bmsr < 0) 82 return bmsr; 83 84 /* Per 802.3-2008, Section 22.2.4.2.16 Extended status all 85 * 1000Mbits/sec capable PHYs shall have the BMSR_ESTATEN bit set to a 86 * logical 1. 87 */ 88 if (!(bmsr & BMSR_ESTATEN)) 89 return changed; 90 91 /* Configure gigabit if it's supported */ 92 adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000); 93 oldadv = adv; 94 95 if (adv < 0) 96 return adv; 97 98 adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF); 99 100 if (phydev->supported & (SUPPORTED_1000baseT_Half | 101 SUPPORTED_1000baseT_Full)) { 102 if (advertise & SUPPORTED_1000baseT_Half) 103 adv |= ADVERTISE_1000HALF; 104 if (advertise & SUPPORTED_1000baseT_Full) 105 adv |= ADVERTISE_1000FULL; 106 } 107 108 if (adv != oldadv) 109 changed = 1; 110 111 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, adv); 112 if (err < 0) 113 return err; 114 115 return changed; 116} 117 118 119/** 120 * genphy_setup_forced - configures/forces speed/duplex from @phydev 121 * @phydev: target phy_device struct 122 * 123 * Description: Configures MII_BMCR to force speed/duplex 124 * to the values in phydev. Assumes that the values are valid. 125 */ 126static int genphy_setup_forced(struct phy_device *phydev) 127{ 128 int err; 129 int ctl = BMCR_ANRESTART; 130 131 phydev->pause = phydev->asym_pause = 0; 132 133 if (SPEED_1000 == phydev->speed) 134 ctl |= BMCR_SPEED1000; 135 else if (SPEED_100 == phydev->speed) 136 ctl |= BMCR_SPEED100; 137 138 if (DUPLEX_FULL == phydev->duplex) 139 ctl |= BMCR_FULLDPLX; 140 141 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl); 142 143 return err; 144} 145 146 147/** 148 * genphy_restart_aneg - Enable and Restart Autonegotiation 149 * @phydev: target phy_device struct 150 */ 151int genphy_restart_aneg(struct phy_device *phydev) 152{ 153 int ctl; 154 155 ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); 156 157 if (ctl < 0) 158 return ctl; 159 160 ctl |= (BMCR_ANENABLE | BMCR_ANRESTART); 161 162 /* Don't isolate the PHY if we're negotiating */ 163 ctl &= ~(BMCR_ISOLATE); 164 165 ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl); 166 167 return ctl; 168} 169 170 171/** 172 * genphy_config_aneg - restart auto-negotiation or write BMCR 173 * @phydev: target phy_device struct 174 * 175 * Description: If auto-negotiation is enabled, we configure the 176 * advertising, and then restart auto-negotiation. If it is not 177 * enabled, then we write the BMCR. 178 */ 179int genphy_config_aneg(struct phy_device *phydev) 180{ 181 int result; 182 183 if (AUTONEG_ENABLE != phydev->autoneg) 184 return genphy_setup_forced(phydev); 185 186 result = genphy_config_advert(phydev); 187 188 if (result < 0) /* error */ 189 return result; 190 191 if (result == 0) { 192 /* Advertisment hasn't changed, but maybe aneg was never on to 193 * begin with? Or maybe phy was isolated? */ 194 int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); 195 196 if (ctl < 0) 197 return ctl; 198 199 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE)) 200 result = 1; /* do restart aneg */ 201 } 202 203 /* Only restart aneg if we are advertising something different 204 * than we were before. */ 205 if (result > 0) 206 result = genphy_restart_aneg(phydev); 207 208 return result; 209} 210 211/** 212 * genphy_update_link - update link status in @phydev 213 * @phydev: target phy_device struct 214 * 215 * Description: Update the value in phydev->link to reflect the 216 * current link value. In order to do this, we need to read 217 * the status register twice, keeping the second value. 218 */ 219int genphy_update_link(struct phy_device *phydev) 220{ 221 unsigned int mii_reg; 222 223 /* 224 * Wait if the link is up, and autonegotiation is in progress 225 * (ie - we're capable and it's not done) 226 */ 227 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); 228 229 /* 230 * If we already saw the link up, and it hasn't gone down, then 231 * we don't need to wait for autoneg again 232 */ 233 if (phydev->link && mii_reg & BMSR_LSTATUS) 234 return 0; 235 236 if ((phydev->autoneg == AUTONEG_ENABLE) && 237 !(mii_reg & BMSR_ANEGCOMPLETE)) { 238 int i = 0; 239 240 printf("%s Waiting for PHY auto negotiation to complete", phydev->dev->name); 241 fflush(stdout); 242 while (!(mii_reg & BMSR_ANEGCOMPLETE)) { 243 /* 244 * Timeout reached ? 245 */ 246 if (i > PHY_ANEG_TIMEOUT) { 247 printf(" TIMEOUT !\n"); 248 phydev->link = 0; 249 return -ETIMEDOUT; 250 } 251 252 if ((i++ % 500) == 0) 253 printf("."); 254 255 udelay(1000); /* 1 ms */ 256 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); 257 } 258 printf(" done\n"); 259 phydev->link = 1; 260 } else { 261 /* Read the link a second time to clear the latched state */ 262 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); 263 264 if (mii_reg & BMSR_LSTATUS) 265 phydev->link = 1; 266 else 267 phydev->link = 0; 268 } 269 270 return 0; 271} 272 273/* 274 * Generic function which updates the speed and duplex. If 275 * autonegotiation is enabled, it uses the AND of the link 276 * partner's advertised capabilities and our advertised 277 * capabilities. If autonegotiation is disabled, we use the 278 * appropriate bits in the control register. 279 * 280 * Stolen from Linux's mii.c and phy_device.c 281 */ 282int genphy_parse_link(struct phy_device *phydev) 283{ 284 int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); 285 286 /* We're using autonegotiation */ 287 if (phydev->autoneg == AUTONEG_ENABLE) { 288 u32 lpa = 0; 289 int gblpa = 0; 290 u32 estatus = 0; 291 292 /* Check for gigabit capability */ 293 if (phydev->supported & (SUPPORTED_1000baseT_Full | 294 SUPPORTED_1000baseT_Half)) { 295 /* We want a list of states supported by 296 * both PHYs in the link 297 */ 298 gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000); 299 if (gblpa < 0) { 300 debug("Could not read MII_STAT1000. Ignoring gigabit capability\n"); 301 gblpa = 0; 302 } 303 gblpa &= phy_read(phydev, 304 MDIO_DEVAD_NONE, MII_CTRL1000) << 2; 305 } 306 307 /* Set the baseline so we only have to set them 308 * if they're different 309 */ 310 phydev->speed = SPEED_10; 311 phydev->duplex = DUPLEX_HALF; 312 313 /* Check the gigabit fields */ 314 if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) { 315 phydev->speed = SPEED_1000; 316 317 if (gblpa & PHY_1000BTSR_1000FD) 318 phydev->duplex = DUPLEX_FULL; 319 320 /* We're done! */ 321 return 0; 322 } 323 324 lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE); 325 lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA); 326 327 if (lpa & (LPA_100FULL | LPA_100HALF)) { 328 phydev->speed = SPEED_100; 329 330 if (lpa & LPA_100FULL) 331 phydev->duplex = DUPLEX_FULL; 332 333 } else if (lpa & LPA_10FULL) 334 phydev->duplex = DUPLEX_FULL; 335 336 /* 337 * Extended status may indicate that the PHY supports 338 * 1000BASE-T/X even though the 1000BASE-T registers 339 * are missing. In this case we can't tell whether the 340 * peer also supports it, so we only check extended 341 * status if the 1000BASE-T registers are actually 342 * missing. 343 */ 344 if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP)) 345 estatus = phy_read(phydev, MDIO_DEVAD_NONE, 346 MII_ESTATUS); 347 348 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_XHALF | 349 ESTATUS_1000_TFULL | ESTATUS_1000_THALF)) { 350 phydev->speed = SPEED_1000; 351 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_TFULL)) 352 phydev->duplex = DUPLEX_FULL; 353 } 354 355 } else { 356 u32 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); 357 358 phydev->speed = SPEED_10; 359 phydev->duplex = DUPLEX_HALF; 360 361 if (bmcr & BMCR_FULLDPLX) 362 phydev->duplex = DUPLEX_FULL; 363 364 if (bmcr & BMCR_SPEED1000) 365 phydev->speed = SPEED_1000; 366 else if (bmcr & BMCR_SPEED100) 367 phydev->speed = SPEED_100; 368 } 369 370 return 0; 371} 372 373int genphy_config(struct phy_device *phydev) 374{ 375 int val; 376 u32 features; 377 378 features = (SUPPORTED_TP | SUPPORTED_MII 379 | SUPPORTED_AUI | SUPPORTED_FIBRE | 380 SUPPORTED_BNC); 381 382 /* Do we support autonegotiation? */ 383 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); 384 385 if (val < 0) 386 return val; 387 388 if (val & BMSR_ANEGCAPABLE) 389 features |= SUPPORTED_Autoneg; 390 391 if (val & BMSR_100FULL) 392 features |= SUPPORTED_100baseT_Full; 393 if (val & BMSR_100HALF) 394 features |= SUPPORTED_100baseT_Half; 395 if (val & BMSR_10FULL) 396 features |= SUPPORTED_10baseT_Full; 397 if (val & BMSR_10HALF) 398 features |= SUPPORTED_10baseT_Half; 399 400 if (val & BMSR_ESTATEN) { 401 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS); 402 403 if (val < 0) 404 return val; 405 406 if (val & ESTATUS_1000_TFULL) 407 features |= SUPPORTED_1000baseT_Full; 408 if (val & ESTATUS_1000_THALF) 409 features |= SUPPORTED_1000baseT_Half; 410 if (val & ESTATUS_1000_XFULL) 411 features |= SUPPORTED_1000baseX_Full; 412 if (val & ESTATUS_1000_XHALF) 413 features |= SUPPORTED_1000baseX_Half; 414 } 415 416 phydev->supported &= features; 417 phydev->advertising &= features; 418 419 genphy_config_aneg(phydev); 420 421 return 0; 422} 423 424int genphy_startup(struct phy_device *phydev) 425{ 426 int ret; 427 428 ret = genphy_update_link(phydev); 429 if (ret) 430 return ret; 431 432 return genphy_parse_link(phydev); 433} 434 435int genphy_shutdown(struct phy_device *phydev) 436{ 437 return 0; 438} 439 440static struct phy_driver genphy_driver = { 441 .uid = 0xffffffff, 442 .mask = 0xffffffff, 443 .name = "Generic PHY", 444 .features = PHY_GBIT_FEATURES | SUPPORTED_MII | 445 SUPPORTED_AUI | SUPPORTED_FIBRE | 446 SUPPORTED_BNC, 447 .config = genphy_config, 448 .startup = genphy_startup, 449 .shutdown = genphy_shutdown, 450}; 451 452static LIST_HEAD(phy_drivers); 453 454int phy_init(void) 455{ 456#ifdef CONFIG_MV88E61XX_SWITCH 457 phy_mv88e61xx_init(); 458#endif 459#ifdef CONFIG_PHY_AQUANTIA 460 phy_aquantia_init(); 461#endif 462#ifdef CONFIG_PHY_ATHEROS 463 phy_atheros_init(); 464#endif 465#ifdef CONFIG_PHY_BROADCOM 466 phy_broadcom_init(); 467#endif 468#ifdef CONFIG_PHY_CORTINA 469 phy_cortina_init(); 470#endif 471#ifdef CONFIG_PHY_DAVICOM 472 phy_davicom_init(); 473#endif 474#ifdef CONFIG_PHY_ET1011C 475 phy_et1011c_init(); 476#endif 477#ifdef CONFIG_PHY_LXT 478 phy_lxt_init(); 479#endif 480#ifdef CONFIG_PHY_MARVELL 481 phy_marvell_init(); 482#endif 483#ifdef CONFIG_PHY_MICREL 484 phy_micrel_init(); 485#endif 486#ifdef CONFIG_PHY_NATSEMI 487 phy_natsemi_init(); 488#endif 489#ifdef CONFIG_PHY_REALTEK 490 phy_realtek_init(); 491#endif 492#ifdef CONFIG_PHY_SMSC 493 phy_smsc_init(); 494#endif 495#ifdef CONFIG_PHY_TERANETICS 496 phy_teranetics_init(); 497#endif 498#ifdef CONFIG_PHY_TI 499 phy_ti_init(); 500#endif 501#ifdef CONFIG_PHY_VITESSE 502 phy_vitesse_init(); 503#endif 504#ifdef CONFIG_PHY_XILINX 505 phy_xilinx_init(); 506#endif 507 508 return 0; 509} 510 511int phy_register(struct phy_driver *drv) 512{ 513 INIT_LIST_HEAD(&drv->list); 514 list_add_tail(&drv->list, &phy_drivers); 515 516#ifdef CONFIG_NEEDS_MANUAL_RELOC 517 if (drv->probe) 518 drv->probe += gd->reloc_off; 519 if (drv->config) 520 drv->config += gd->reloc_off; 521 if (drv->startup) 522 drv->startup += gd->reloc_off; 523 if (drv->shutdown) 524 drv->shutdown += gd->reloc_off; 525 if (drv->readext) 526 drv->readext += gd->reloc_off; 527 if (drv->writeext) 528 drv->writeext += gd->reloc_off; 529#endif 530 return 0; 531} 532 533int phy_set_supported(struct phy_device *phydev, u32 max_speed) 534{ 535 /* The default values for phydev->supported are provided by the PHY 536 * driver "features" member, we want to reset to sane defaults first 537 * before supporting higher speeds. 538 */ 539 phydev->supported &= PHY_DEFAULT_FEATURES; 540 541 switch (max_speed) { 542 default: 543 return -ENOTSUPP; 544 case SPEED_1000: 545 phydev->supported |= PHY_1000BT_FEATURES; 546 /* fall through */ 547 case SPEED_100: 548 phydev->supported |= PHY_100BT_FEATURES; 549 /* fall through */ 550 case SPEED_10: 551 phydev->supported |= PHY_10BT_FEATURES; 552 } 553 554 return 0; 555} 556 557static int phy_probe(struct phy_device *phydev) 558{ 559 int err = 0; 560 561 phydev->advertising = phydev->supported = phydev->drv->features; 562 phydev->mmds = phydev->drv->mmds; 563 564 if (phydev->drv->probe) 565 err = phydev->drv->probe(phydev); 566 567 return err; 568} 569 570static struct phy_driver *generic_for_interface(phy_interface_t interface) 571{ 572#ifdef CONFIG_PHYLIB_10G 573 if (is_10g_interface(interface)) 574 return &gen10g_driver; 575#endif 576 577 return &genphy_driver; 578} 579 580static struct phy_driver *get_phy_driver(struct phy_device *phydev, 581 phy_interface_t interface) 582{ 583 struct list_head *entry; 584 int phy_id = phydev->phy_id; 585 struct phy_driver *drv = NULL; 586 587 list_for_each(entry, &phy_drivers) { 588 drv = list_entry(entry, struct phy_driver, list); 589 if ((drv->uid & drv->mask) == (phy_id & drv->mask)) 590 return drv; 591 } 592 593 /* If we made it here, there's no driver for this PHY */ 594 return generic_for_interface(interface); 595} 596 597static struct phy_device *phy_device_create(struct mii_dev *bus, int addr, 598 u32 phy_id, 599 phy_interface_t interface) 600{ 601 struct phy_device *dev; 602 603 /* We allocate the device, and initialize the 604 * default values */ 605 dev = malloc(sizeof(*dev)); 606 if (!dev) { 607 printf("Failed to allocate PHY device for %s:%d\n", 608 bus->name, addr); 609 return NULL; 610 } 611 612 memset(dev, 0, sizeof(*dev)); 613 614 dev->duplex = -1; 615 dev->link = 0; 616 dev->interface = interface; 617 618 dev->autoneg = AUTONEG_ENABLE; 619 620 dev->addr = addr; 621 dev->phy_id = phy_id; 622 dev->bus = bus; 623 624 dev->drv = get_phy_driver(dev, interface); 625 626 phy_probe(dev); 627 628 bus->phymap[addr] = dev; 629 630 return dev; 631} 632 633/** 634 * get_phy_id - reads the specified addr for its ID. 635 * @bus: the target MII bus 636 * @addr: PHY address on the MII bus 637 * @phy_id: where to store the ID retrieved. 638 * 639 * Description: Reads the ID registers of the PHY at @addr on the 640 * @bus, stores it in @phy_id and returns zero on success. 641 */ 642int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id) 643{ 644 int phy_reg; 645 646 /* Grab the bits from PHYIR1, and put them 647 * in the upper half */ 648 phy_reg = bus->read(bus, addr, devad, MII_PHYSID1); 649 650 if (phy_reg < 0) 651 return -EIO; 652 653 *phy_id = (phy_reg & 0xffff) << 16; 654 655 /* Grab the bits from PHYIR2, and put them in the lower half */ 656 phy_reg = bus->read(bus, addr, devad, MII_PHYSID2); 657 658 if (phy_reg < 0) 659 return -EIO; 660 661 *phy_id |= (phy_reg & 0xffff); 662 663 return 0; 664} 665 666static struct phy_device *create_phy_by_mask(struct mii_dev *bus, 667 unsigned phy_mask, int devad, phy_interface_t interface) 668{ 669 u32 phy_id = 0xffffffff; 670 while (phy_mask) { 671 int addr = ffs(phy_mask) - 1; 672 int r = get_phy_id(bus, addr, devad, &phy_id); 673 /* If the PHY ID is mostly f's, we didn't find anything */ 674 if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff) 675 return phy_device_create(bus, addr, phy_id, interface); 676 phy_mask &= ~(1 << addr); 677 } 678 return NULL; 679} 680 681static struct phy_device *search_for_existing_phy(struct mii_dev *bus, 682 unsigned phy_mask, phy_interface_t interface) 683{ 684 /* If we have one, return the existing device, with new interface */ 685 while (phy_mask) { 686 int addr = ffs(phy_mask) - 1; 687 if (bus->phymap[addr]) { 688 bus->phymap[addr]->interface = interface; 689 return bus->phymap[addr]; 690 } 691 phy_mask &= ~(1 << addr); 692 } 693 return NULL; 694} 695 696static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus, 697 unsigned phy_mask, phy_interface_t interface) 698{ 699 int i; 700 struct phy_device *phydev; 701 702 phydev = search_for_existing_phy(bus, phy_mask, interface); 703 if (phydev) 704 return phydev; 705 /* Try Standard (ie Clause 22) access */ 706 /* Otherwise we have to try Clause 45 */ 707 for (i = 0; i < 5; i++) { 708 phydev = create_phy_by_mask(bus, phy_mask, 709 i ? i : MDIO_DEVAD_NONE, interface); 710 if (IS_ERR(phydev)) 711 return NULL; 712 if (phydev) 713 return phydev; 714 } 715 716 debug("\n%s PHY: ", bus->name); 717 while (phy_mask) { 718 int addr = ffs(phy_mask) - 1; 719 debug("%d ", addr); 720 phy_mask &= ~(1 << addr); 721 } 722 debug("not found\n"); 723 724 return NULL; 725} 726 727/** 728 * get_phy_device - reads the specified PHY device and returns its @phy_device struct 729 * @bus: the target MII bus 730 * @addr: PHY address on the MII bus 731 * 732 * Description: Reads the ID registers of the PHY at @addr on the 733 * @bus, then allocates and returns the phy_device to represent it. 734 */ 735static struct phy_device *get_phy_device(struct mii_dev *bus, int addr, 736 phy_interface_t interface) 737{ 738 return get_phy_device_by_mask(bus, 1 << addr, interface); 739} 740 741int phy_reset(struct phy_device *phydev) 742{ 743 int reg; 744 int timeout = 500; 745 int devad = MDIO_DEVAD_NONE; 746 747 if (phydev->flags & PHY_FLAG_BROKEN_RESET) 748 return 0; 749 750#ifdef CONFIG_PHYLIB_10G 751 /* If it's 10G, we need to issue reset through one of the MMDs */ 752 if (is_10g_interface(phydev->interface)) { 753 if (!phydev->mmds) 754 gen10g_discover_mmds(phydev); 755 756 devad = ffs(phydev->mmds) - 1; 757 } 758#endif 759 760 if (phy_write(phydev, devad, MII_BMCR, BMCR_RESET) < 0) { 761 debug("PHY reset failed\n"); 762 return -1; 763 } 764 765#ifdef CONFIG_PHY_RESET_DELAY 766 udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */ 767#endif 768 /* 769 * Poll the control register for the reset bit to go to 0 (it is 770 * auto-clearing). This should happen within 0.5 seconds per the 771 * IEEE spec. 772 */ 773 reg = phy_read(phydev, devad, MII_BMCR); 774 while ((reg & BMCR_RESET) && timeout--) { 775 reg = phy_read(phydev, devad, MII_BMCR); 776 777 if (reg < 0) { 778 debug("PHY status read failed\n"); 779 return -1; 780 } 781 udelay(1000); 782 } 783 784 if (reg & BMCR_RESET) { 785 puts("PHY reset timed out\n"); 786 return -1; 787 } 788 789 return 0; 790} 791 792int miiphy_reset(const char *devname, unsigned char addr) 793{ 794 struct mii_dev *bus = miiphy_get_dev_by_name(devname); 795 struct phy_device *phydev; 796 797 /* 798 * miiphy_reset was only used on standard PHYs, so we'll fake it here. 799 * If later code tries to connect with the right interface, this will 800 * be corrected by get_phy_device in phy_connect() 801 */ 802 phydev = get_phy_device(bus, addr, PHY_INTERFACE_MODE_MII); 803 804 return phy_reset(phydev); 805} 806 807struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask, 808 phy_interface_t interface) 809{ 810 /* Reset the bus */ 811 if (bus->reset) { 812 bus->reset(bus); 813 814 /* Wait 15ms to make sure the PHY has come out of hard reset */ 815 udelay(15000); 816 } 817 818 return get_phy_device_by_mask(bus, phy_mask, interface); 819} 820 821#ifdef CONFIG_DM_ETH 822void phy_connect_dev(struct phy_device *phydev, struct udevice *dev) 823#else 824void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev) 825#endif 826{ 827 /* Soft Reset the PHY */ 828 phy_reset(phydev); 829 if (phydev->dev && phydev->dev != dev) { 830 printf("%s:%d is connected to %s. Reconnecting to %s\n", 831 phydev->bus->name, phydev->addr, 832 phydev->dev->name, dev->name); 833 } 834 phydev->dev = dev; 835 debug("%s connected to %s\n", dev->name, phydev->drv->name); 836} 837 838#ifdef CONFIG_DM_ETH 839struct phy_device *phy_connect(struct mii_dev *bus, int addr, 840 struct udevice *dev, phy_interface_t interface) 841#else 842struct phy_device *phy_connect(struct mii_dev *bus, int addr, 843 struct eth_device *dev, phy_interface_t interface) 844#endif 845{ 846 struct phy_device *phydev; 847 848 phydev = phy_find_by_mask(bus, 1 << addr, interface); 849 if (phydev) 850 phy_connect_dev(phydev, dev); 851 else 852 printf("Could not get PHY for %s: addr %d\n", bus->name, addr); 853 return phydev; 854} 855 856/* 857 * Start the PHY. Returns 0 on success, or a negative error code. 858 */ 859int phy_startup(struct phy_device *phydev) 860{ 861 if (phydev->drv->startup) 862 return phydev->drv->startup(phydev); 863 864 return 0; 865} 866 867__weak int board_phy_config(struct phy_device *phydev) 868{ 869 if (phydev->drv->config) 870 return phydev->drv->config(phydev); 871 return 0; 872} 873 874int phy_config(struct phy_device *phydev) 875{ 876 /* Invoke an optional board-specific helper */ 877 return board_phy_config(phydev); 878} 879 880int phy_shutdown(struct phy_device *phydev) 881{ 882 if (phydev->drv->shutdown) 883 phydev->drv->shutdown(phydev); 884 885 return 0; 886} 887 888int phy_get_interface_by_name(const char *str) 889{ 890 int i; 891 892 for (i = 0; i < PHY_INTERFACE_MODE_COUNT; i++) { 893 if (!strcmp(str, phy_interface_strings[i])) 894 return i; 895 } 896 897 return -1; 898} 899