1/*
2 * Copyright 2019, Data61, CSIRO (ABN 41 687 119 230)
3 *
4 * SPDX-License-Identifier: BSD-2-Clause
5 */
6
7#pragma once
8
9#include <sel4vm/guest_vm.h>
10#include <sel4vm/arch/processor.h>
11#include <sel4vm/sel4_arch/processor.h>
12#include <sel4vmmplatsupport/arch/guest_vcpu_fault.h>
13
14#define SYSREG_OP0_SHIFT    20
15#define SYSREG_OP0_MASK     (0b11 << SYSREG_OP0_SHIFT)
16#define SYSREG_OP2_SHIFT    17
17#define SYSREG_OP2_MASK     (0b111 << SYSREG_OP2_SHIFT)
18#define SYSREG_OP1_SHIFT    14
19#define SYSREG_OP1_MASK     (0b111 << SYSREG_OP1_SHIFT)
20#define SYSREG_CRn_SHIFT    10
21#define SYSREG_CRn_MASK     (0b1111 << SYSREG_CRn_SHIFT)
22#define SYSREG_Rt_SHIFT     5
23#define SYSREG_Rt_MASK      (0b11111 << SYSREG_Rt_SHIFT)
24#define SYSREG_CRm_SHIFT    1
25#define SYSREG_CRm_MASK     (0b1111 << SYSREG_CRm_SHIFT)
26#define SYSREG_DIR_SHIFT    0
27#define SYSREG_DIR_MASK     (0b1 << SYSREG_Rt_SHIFT)
28
29#define SYSREG_MATCH_ALL_MASK HSR_ISS_MASK
30
31typedef union sysreg {
32    uint32_t hsr_val;
33    struct sysreg_params {
34        uint32_t direction: 1;
35        uint32_t crm: 4;
36        uint32_t rt: 5;
37        uint32_t crn: 4;
38        uint32_t op1: 3;
39        uint32_t op2: 3;
40        uint32_t op0: 2;
41        uint32_t res0: 3;
42        uint32_t instr_len: 1;
43        uint32_t ec: 6;
44    } params;
45} sysreg_t;
46
47typedef int (*sysreg_exception_handler_fn)(vm_vcpu_t *vcpu, sysreg_t *sysreg_reg, bool is_read);
48
49typedef struct sysreg_entry {
50    sysreg_t sysreg;
51    sysreg_t sysreg_match_mask;
52    sysreg_exception_handler_fn handler;
53} sysreg_entry_t;
54
55int sysreg_exception_handler(vm_vcpu_t *vcpu, uint32_t hsr);
56