1#if __ARM_PCS_VFP 2 3.syntax unified 4.fpu vfp 5 6.global fegetround 7.type fegetround,%function 8fegetround: 9 fmrx r0, fpscr 10 and r0, r0, #0xc00000 11 bx lr 12 13.global __fesetround 14.type __fesetround,%function 15__fesetround: 16 fmrx r3, fpscr 17 bic r3, r3, #0xc00000 18 orr r3, r3, r0 19 fmxr fpscr, r3 20 mov r0, #0 21 bx lr 22 23.global fetestexcept 24.type fetestexcept,%function 25fetestexcept: 26 and r0, r0, #0x1f 27 fmrx r3, fpscr 28 and r0, r0, r3 29 bx lr 30 31.global feclearexcept 32.type feclearexcept,%function 33feclearexcept: 34 and r0, r0, #0x1f 35 fmrx r3, fpscr 36 bic r3, r3, r0 37 fmxr fpscr, r3 38 mov r0, #0 39 bx lr 40 41.global feraiseexcept 42.type feraiseexcept,%function 43feraiseexcept: 44 and r0, r0, #0x1f 45 fmrx r3, fpscr 46 orr r3, r3, r0 47 fmxr fpscr, r3 48 mov r0, #0 49 bx lr 50 51.global fegetenv 52.type fegetenv,%function 53fegetenv: 54 fmrx r3, fpscr 55 str r3, [r0] 56 mov r0, #0 57 bx lr 58 59.global fesetenv 60.type fesetenv,%function 61fesetenv: 62 cmn r0, #1 63 moveq r3, #0 64 ldrne r3, [r0] 65 fmxr fpscr, r3 66 mov r0, #0 67 bx lr 68 69#endif 70