1/* 2 * Belkin AC1750DB (F9K1115V2) board support 3 * 4 * Copyright (C) 2014 Gabor Juhos <juhosg@openwrt.org> 5 * Copyright (C) 2014 Imre Kaloz <kaloz@openwrt.org> 6 * 7 * This program is free software; you can redistribute it and/or modify it 8 * under the terms of the GNU General Public License version 2 as published 9 * by the Free Software Foundation. 10 */ 11 12#include <linux/gpio.h> 13#include <linux/platform_device.h> 14#include <linux/ar8216_platform.h> 15 16#include <asm/mach-ath79/ar71xx_regs.h> 17 18#include "common.h" 19#include "pci.h" 20#include "dev-gpio-buttons.h" 21#include "dev-eth.h" 22#include "dev-leds-gpio.h" 23#include "dev-m25p80.h" 24#include "dev-usb.h" 25#include "dev-wmac.h" 26#include "machtypes.h" 27 28#define F9K1115V2_GPIO_LED_USB2 4 29#define F9K1115V2_GPIO_LED_WPS_AMBER 14 30#define F9K1115V2_GPIO_LED_STATUS_AMBER 15 31#define F9K1115V2_GPIO_LED_WPS_BLUE 19 32#define F9K1115V2_GPIO_LED_STATUS_BLUE 20 33 34#define F9K1115V2_GPIO_BTN_WPS 16 35#define F9K1115V2_GPIO_BTN_RESET 17 36 37#define F9K1115V2_GPIO_USB2_POWER 21 38 39#define F9K1115V2_KEYS_POLL_INTERVAL 20 /* msecs */ 40#define F9K1115V2_KEYS_DEBOUNCE_INTERVAL (3 * F9K1115V2_KEYS_POLL_INTERVAL) 41 42#define F9K1115V2_WAN_MAC_OFFSET 0 43#define F9K1115V2_LAN_MAC_OFFSET 6 44#define F9K1115V2_WMAC_CALDATA_OFFSET 0x1000 45#define F9K1115V2_PCIE_CALDATA_OFFSET 0x5000 46 47static struct gpio_led f9k1115v2_leds_gpio[] __initdata = { 48 { 49 .name = "belkin:amber:status", 50 .gpio = F9K1115V2_GPIO_LED_STATUS_AMBER, 51 .active_low = 1, 52 }, 53 { 54 .name = "belkin:blue:status", 55 .gpio = F9K1115V2_GPIO_LED_STATUS_BLUE, 56 .active_low = 1, 57 }, 58 { 59 .name = "belkin:blue:wps", 60 .gpio = F9K1115V2_GPIO_LED_WPS_BLUE, 61 .active_low = 1, 62 }, 63 { 64 .name = "belkin:amber:wps", 65 .gpio = F9K1115V2_GPIO_LED_WPS_AMBER, 66 .active_low = 1, 67 }, 68 { 69 .name = "belkin:green:usb2", 70 .gpio = F9K1115V2_GPIO_LED_USB2, 71 .active_low = 1, 72 }, 73}; 74 75static struct gpio_keys_button f9k1115v2_gpio_keys[] __initdata = { 76 { 77 .desc = "Reset button", 78 .type = EV_KEY, 79 .code = KEY_RESTART, 80 .debounce_interval = F9K1115V2_KEYS_DEBOUNCE_INTERVAL, 81 .gpio = F9K1115V2_GPIO_BTN_RESET, 82 .active_low = 1, 83 }, 84 { 85 .desc = "WPS button", 86 .type = EV_KEY, 87 .code = KEY_WPS_BUTTON, 88 .debounce_interval = F9K1115V2_KEYS_DEBOUNCE_INTERVAL, 89 .gpio = F9K1115V2_GPIO_BTN_WPS, 90 .active_low = 1, 91 }, 92}; 93 94static struct ar8327_pad_cfg f9k1115v2_ar8327_pad0_cfg = { 95 /* Use the RGMII interface for the GMAC0 of the AR8337 switch */ 96 .mode = AR8327_PAD_MAC_RGMII, 97 .txclk_delay_en = true, 98 .rxclk_delay_en = true, 99 .txclk_delay_sel = AR8327_CLK_DELAY_SEL1, 100 .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2, 101}; 102 103static struct ar8327_pad_cfg f9k1115v2_ar8327_pad6_cfg = { 104 /* Use the SGMII interface for the GMAC6 of the AR8337 switch */ 105 .mode = AR8327_PAD_MAC_SGMII, 106 .rxclk_delay_en = true, 107 .rxclk_delay_sel = AR8327_CLK_DELAY_SEL0, 108}; 109 110static struct ar8327_platform_data f9k1115v2_ar8327_data = { 111 .pad0_cfg = &f9k1115v2_ar8327_pad0_cfg, 112 .pad6_cfg = &f9k1115v2_ar8327_pad6_cfg, 113 .port0_cfg = { 114 .force_link = 1, 115 .speed = AR8327_PORT_SPEED_1000, 116 .duplex = 1, 117 .txpause = 1, 118 .rxpause = 1, 119 }, 120 .port6_cfg = { 121 .force_link = 1, 122 .speed = AR8327_PORT_SPEED_1000, 123 .duplex = 1, 124 .txpause = 1, 125 .rxpause = 1, 126 }, 127}; 128 129static struct mdio_board_info f9k1115v2_mdio0_info[] = { 130 { 131 .bus_id = "ag71xx-mdio.0", 132 .phy_addr = 0, 133 .platform_data = &f9k1115v2_ar8327_data, 134 }, 135}; 136 137static void __init f9k1115v2_setup(void) 138{ 139 u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); 140 141 ath79_register_m25p80(NULL); 142 143 ath79_register_leds_gpio(-1, ARRAY_SIZE(f9k1115v2_leds_gpio), 144 f9k1115v2_leds_gpio); 145 ath79_register_gpio_keys_polled(-1, F9K1115V2_KEYS_POLL_INTERVAL, 146 ARRAY_SIZE(f9k1115v2_gpio_keys), 147 f9k1115v2_gpio_keys); 148 149 ath79_register_wmac(art + F9K1115V2_WMAC_CALDATA_OFFSET, NULL); 150 151 ath79_register_mdio(0, 0x0); 152 mdiobus_register_board_info(f9k1115v2_mdio0_info, 153 ARRAY_SIZE(f9k1115v2_mdio0_info)); 154 155 ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); 156 157 ath79_init_mac(ath79_eth0_data.mac_addr, 158 art + F9K1115V2_WAN_MAC_OFFSET, 0); 159 160 ath79_init_mac(ath79_eth1_data.mac_addr, 161 art + F9K1115V2_LAN_MAC_OFFSET, 0); 162 163 ath79_eth0_pll_data.pll_1000 = 0xa6000000; 164 ath79_eth1_pll_data.pll_1000 = 0x03000101; 165 166 /* GMAC0 is connected to the RMGII interface */ 167 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; 168 ath79_eth0_data.phy_mask = BIT(0); 169 ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev; 170 171 ath79_register_eth(0); 172 173 /* GMAC1 is connected to the SGMII interface */ 174 ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII; 175 ath79_eth1_data.speed = SPEED_1000; 176 ath79_eth1_data.duplex = DUPLEX_FULL; 177 178 ath79_register_eth(1); 179 180 ath79_register_pci(); 181 182 ath79_register_usb(); 183 gpio_request_one(F9K1115V2_GPIO_USB2_POWER, 184 GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED, 185 "USB2 power"); 186} 187 188MIPS_MACHINE(ATH79_MACH_F9K1115V2, "F9K1115V2", "Belkin AC1750DB", 189 f9k1115v2_setup); 190