1/* 2 * ADM5120 specific board support for LZMA decompressor 3 * 4 * Copyright (C) 2007-2008 OpenWrt.org 5 * Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 * General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 20 */ 21 22#include "config.h" 23#include <stddef.h> 24 25#define READREG(r) *(volatile unsigned int *)(r) 26#define WRITEREG(r,v) *(volatile unsigned int *)(r) = v 27 28/* 29 * INTC definitions 30 */ 31#define INTC_BASE 0xB2200000 32 33/* INTC registers */ 34#define INTC_REG_IRQ_DISABLE 0x0C 35 36/* 37 * UART definitions 38 */ 39#define UART0_BASE 0xB2600000 40#define UART1_BASE 0xB2800000 41/* UART registers */ 42#define UART_REG_DATA 0x00 /* Data register */ 43#define UART_REG_ECR 0x04 /* Error Clear register */ 44#define UART_REG_LCRH 0x08 /* Line Control High register */ 45#define UART_REG_LCRM 0x0C /* Line Control Middle register */ 46#define UART_REG_LCRL 0x10 /* Line Control Low register */ 47#define UART_REG_CTRL 0x14 /* Control register */ 48#define UART_REG_FLAG 0x18 /* Flag register */ 49 50/* Control register bits */ 51#define UART_CTRL_EN ( 1 << 0 ) /* UART enable */ 52 53/* Line Control High register bits */ 54#define UART_LCRH_FEN ( 1 << 4 ) /* FIFO enable */ 55 56/* Flag register bits */ 57#define UART_FLAG_CTS ( 1 << 0 ) 58#define UART_FLAG_DSR ( 1 << 1 ) 59#define UART_FLAG_DCD ( 1 << 2 ) 60#define UART_FLAG_BUSY ( 1 << 3 ) 61#define UART_FLAG_RXFE ( 1 << 4 ) /* RX FIFO empty */ 62#define UART_FLAG_TXFF ( 1 << 5 ) /* TX FIFO full */ 63#define UART_FLAG_RXFF ( 1 << 6 ) /* RX FIFO full */ 64#define UART_FLAG_TXFE ( 1 << 7 ) /* TX FIFO empty */ 65 66/* 67 * SWITCH definitions 68 */ 69#define SWITCH_BASE 0xB2000000 70 71#define SWITCH_REG_CPUP_CONF 0x0024 72#define SWITCH_REG_PORT_CONF0 0x0028 73 74#define SWITCH_REG_GPIO_CONF0 0x00B8 75#define SWITCH_REG_GPIO_CONF2 0x00BC 76 77#define SWITCH_REG_PORT0_LED 0x0100 78#define SWITCH_REG_PORT1_LED 0x0104 79#define SWITCH_REG_PORT2_LED 0x0108 80#define SWITCH_REG_PORT3_LED 0x010C 81#define SWITCH_REG_PORT4_LED 0x0110 82 83#define SWITCH_PORTS_HW 0x3F /* Hardware Ports */ 84 85/* CPUP_CONF register bits */ 86#define CPUP_CONF_DCPUP ( 1 << 0 ) /* Disable CPU port */ 87 88/* PORT_CONF0 register bits */ 89#define PORT_CONF0_DP_SHIFT 0 /* disable port shift*/ 90 91 92/* 93 * UART routines 94 */ 95 96#if defined(CONFIG_USE_UART0) 97# define UART_READ(r) READREG(UART0_BASE+(r)) 98# define UART_WRITE(r,v) WRITEREG(UART0_BASE+(r),(v)) 99#else 100# define UART_READ(r) READREG(UART1_BASE+(r)) 101# define UART_WRITE(r,v) WRITEREG(UART1_BASE+(r),(v)) 102#endif 103 104static void uart_init(void) 105{ 106#if 0 107 unsigned int t; 108 109 /* disable uart */ 110 UART_WRITE(UART_REG_CTRL, 0); 111 112 /* keep current baud rate */ 113 t = UART_READ(UART_REG_LCRM); 114 UART_WRITE(UART_REG_LCRM, t); 115 t = UART_READ(UART_REG_LCRL); 116 UART_WRITE(UART_REG_LCRL, t); 117 118 /* keep data, stop, and parity bits, but disable FIFO */ 119 t = UART_READ(UART_REG_LCRH); 120 t &= ~(UART_LCRH_FEN); 121 UART_WRITE(UART_REG_LCRH, t ); 122 123 /* clear error bits */ 124 UART_WRITE(UART_REG_ECR, 0xFF); 125 126 /* enable uart, and disable interrupts */ 127 UART_WRITE(UART_REG_CTRL, UART_CTRL_EN); 128#endif 129} 130 131/* 132 * INTC routines 133 */ 134 135#define INTC_READ(r) READREG(INTC_BASE+(r)) 136#define INTC_WRITE(r,v) WRITEREG(INTC_BASE+(r),v) 137 138static void intc_init(void) 139{ 140 INTC_WRITE(INTC_REG_IRQ_DISABLE, 0xFFFFFFFF); 141} 142 143/* 144 * SWITCH routines 145 */ 146 147#define SWITCH_READ(r) READREG(SWITCH_BASE+(r)) 148#define SWITCH_WRITE(r,v) WRITEREG(SWITCH_BASE+(r),v) 149 150static void switch_init(void) 151{ 152 /* disable PHYS ports */ 153 SWITCH_WRITE(SWITCH_REG_PORT_CONF0, 154 (SWITCH_PORTS_HW << PORT_CONF0_DP_SHIFT)); 155 156 /* disable CPU port */ 157 SWITCH_WRITE(SWITCH_REG_CPUP_CONF, CPUP_CONF_DCPUP); 158 159 /* disable GPIO lines */ 160 SWITCH_WRITE(SWITCH_REG_GPIO_CONF0, 0); 161 SWITCH_WRITE(SWITCH_REG_GPIO_CONF2, 0); 162 163 /* disable LED lines */ 164 SWITCH_WRITE(SWITCH_REG_PORT0_LED, 0); 165 SWITCH_WRITE(SWITCH_REG_PORT1_LED, 0); 166 SWITCH_WRITE(SWITCH_REG_PORT2_LED, 0); 167 SWITCH_WRITE(SWITCH_REG_PORT3_LED, 0); 168 SWITCH_WRITE(SWITCH_REG_PORT4_LED, 0); 169} 170 171void board_putc(int ch) 172{ 173 while ((UART_READ(UART_REG_FLAG) & UART_FLAG_TXFE) == 0); 174 175 UART_WRITE(UART_REG_DATA, ch); 176 177 while ((UART_READ(UART_REG_FLAG) & UART_FLAG_TXFE) == 0); 178} 179 180void board_init(void) 181{ 182 intc_init(); 183 switch_init(); 184 uart_init(); 185} 186