1/*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License, Version 1.0 only
6 * (the "License").  You may not use this file except in compliance
7 * with the License.
8 *
9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10 * or http://www.opensolaris.org/os/licensing.
11 * See the License for the specific language governing permissions
12 * and limitations under the License.
13 *
14 * When distributing Covered Code, include this CDDL HEADER in each
15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16 * If applicable, add the following below this CDDL HEADER, with the
17 * fields enclosed by brackets "[]" replaced with your own identifying
18 * information: Portions Copyright [yyyy] [name of copyright owner]
19 *
20 * CDDL HEADER END
21 */
22/*
23 * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
24 * Use is subject to license terms.
25 */
26
27#ifndef _PCF8584_H
28#define	_PCF8584_H
29
30#pragma ident	"%Z%%M%	%I%	%E% SMI"
31
32#ifdef	__cplusplus
33extern "C" {
34#endif
35
36#include <sys/promif.h>
37
38/*
39 * S1 control
40 */
41#define	S1_ACK	0x01
42#define	S1_STO	0x02
43#define	S1_STA	0x04
44#define	S1_ENI	0x08
45#define	S1_ES2	0x10
46#define	S1_ES1	0x20
47#define	S1_ESO	0x40
48
49/*
50 * S1 status
51 */
52#define	S1_BBN	0x01
53#define	S1_LAB	0x02
54#define	S1_AAS	0x04
55#define	S1_AD0	0x08
56#define	S1_LRB	0x08
57#define	S1_BER	0x10
58#define	S1_STS	0x20
59
60/*
61 * S1 control/status
62 */
63
64#define	S1_PIN	0x80
65
66/*
67 * This has to be OR'ed in with the address for
68 * I2C read transactions.
69 */
70#define	I2C_READ	0x01
71
72/*
73 * S0 initialization bytes
74 */
75
76#define	S0_OWN 0x55
77#define	S0_CLK 0x1C		/* System clock = 12 MHz, SCL = 90 KHz) */
78
79#define	PCF8584_INIT_WAIT 200000	/* 200 ms */
80#define	DUMMY_ADDR 0x20
81#define	DUMMY_DATA 0x00
82
83#define	MONITOR_ADDRESS	0x0
84
85#define	S1_START	(S1_PIN | S1_ESO | S1_STA | S1_ACK)
86#define	S1_STOP		(S1_PIN | S1_ESO | S1_STO | S1_ACK)
87#define	S1_START2	(S1_ESO | S1_STA | S1_ACK)
88
89/*
90 * printing levels
91 */
92#define	PRT_SELECT	0x01
93#define	PRT_INTR	0x02
94#define	PRT_INIT	0x04
95#define	PRT_TRAN	0x08
96#define	PRT_POLL	0x10
97#define	PRT_BUFFONLY	0x100
98#define	PRT_PROM	0x200
99
100/*
101 * states for the I2C state machine.
102 */
103enum tran_state {
104	TRAN_STATE_NULL,
105	TRAN_STATE_WR,
106	TRAN_STATE_RD,
107	TRAN_STATE_WR_RD,
108	TRAN_STATE_START,
109	TRAN_STATE_DUMMY_DATA,
110	TRAN_STATE_DUMMY_RD
111};
112
113/*
114 * different implementations of pcf8584
115 */
116enum impl_type {
117	GENERIC,
118	BBC,
119	PIC16F747
120};
121
122typedef struct pcf8584_regs {
123	uint8_t *pcf8584_regs_s0;
124	uint8_t *pcf8584_regs_s1;
125} pcf8584_regs_t;
126
127typedef struct pcf8584 {
128	dev_info_t		*pcf8584_dip;
129	int			pcf8584_attachflags;
130	kcondvar_t		pcf8584_cv;
131	kmutex_t		pcf8584_imutex;
132	kcondvar_t		pcf8584_icv;
133	ddi_iblock_cookie_t	pcf8584_icookie;
134	int			pcf8584_mode;
135	int			pcf8584_open;
136	int			pcf8584_busy;
137	int			pcf8584_bus;
138	int			pcf8584_cur_status;
139	dev_info_t		*pcf8584_nexus_dip;
140	i2c_transfer_t		*pcf8584_cur_tran;
141	dev_info_t		*pcf8584_cur_dip;
142	pcf8584_regs_t		pcf8584_regs;
143	ddi_acc_handle_t	pcf8584_rhandle;
144	uint8_t			*pcf8584_b_reg;
145	ddi_acc_handle_t	pcf8584_b_rhandle;
146	enum tran_state		pcf8584_tran_state;
147	char			pcf8584_name[12];
148	enum impl_type		pcf8584_impl_type;
149	uint32_t		pcf8584_impl_delay;
150} pcf8584_t;
151
152/*
153 * i2c_parent_pvt contains info that is chip specific
154 * and is stored on the child's devinfo parent private data.
155 */
156typedef struct pcf8584_ppvt {
157	int pcf8584_ppvt_bus; /* xcal's bbc implmentation multiplexes */
158			    /* multiple I2C busses on a single set of */
159			    /* registers.  this tells it what bus to */
160			    /* use  */
161	int pcf8584_ppvt_addr; /* address of I2C device */
162} pcf8584_ppvt_t;
163
164#define	PCF8584_PIL			4
165#define	PCF8584_POLL_MODE		1
166#define	PCF8584_INTR_MODE		2
167#define	PCF8584_INITIAL_SOFT_SPACE	4
168#define	PCF8584_GENERIC_DELAY		0
169#define	PCF8584_PIC16F747_DELAY		10
170
171/*
172 * generic interrupt return values
173 */
174#define	I2C_COMPLETE	2
175#define	I2C_PENDING	3
176
177/*
178 * Transfer status values
179 */
180#define	PCF8584_TRANSFER_NEW	1
181#define	PCF8584_TRANSFER_ON	2
182#define	PCF8584_TRANSFER_OVER	3
183
184/*
185 * Attach flags
186 */
187#define	ADD_INTR	0x01
188#define	ADD_PVT		0x02
189#define	SETUP_REGS	0x04
190#define	NEXUS_REGISTER	0x08
191#define	PROP_CREATE	0x10
192#define	IMUTEX		0x20
193#define	ALLOCATE_PVT	0x40
194#define	MINOR_NODE	0x80
195
196#ifdef	__cplusplus
197}
198#endif
199
200#endif /* _PCF8584_H */
201