1/*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License, Version 1.0 only
6 * (the "License").  You may not use this file except in compliance
7 * with the License.
8 *
9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10 * or http://www.opensolaris.org/os/licensing.
11 * See the License for the specific language governing permissions
12 * and limitations under the License.
13 *
14 * When distributing Covered Code, include this CDDL HEADER in each
15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16 * If applicable, add the following below this CDDL HEADER, with the
17 * fields enclosed by brackets "[]" replaced with your own identifying
18 * information: Portions Copyright [yyyy] [name of copyright owner]
19 *
20 * CDDL HEADER END
21 */
22/*
23 * Copyright 2002-2003 Sun Microsystems, Inc.  All rights reserved.
24 * Use is subject to license terms.
25 */
26
27#ifndef _NEXUS_I2BSC_IMPL_H
28#define	_NEXUS_I2BSC_IMPL_H
29
30#pragma ident	"%Z%%M%	%I%	%E% SMI"
31
32#ifdef	__cplusplus
33extern "C" {
34#endif
35
36#include <sys/modctl.h>
37#include <sys/promif.h>
38#include <sys/lom_ebuscodes.h>
39#include <sys/bscbus.h>
40
41/*
42 * When "#address-cells" is 1, it means we aren't multiplexing i2c busses.  We
43 * therefore mark the bus number to I2BSC_DEFAULT_BUS.
44 */
45#define	I2BSC_DEFAULT_BUS		0
46
47/*
48 * Since i2c transfers are slow and take up lots of time, we limit our i2c
49 * transfer size to an advertised limit, I2BSC_MAX_TRANSFER_SZ bytes.
50 * The value was derived from an EEPROM page size of 32 bytes + 2 bytes to
51 * denote the address offset within the EEPROM.
52 */
53#define	I2BSC_MAX_TRANSFER_SZ		34
54
55/*
56 * Address Space Accessors
57 */
58#define	I2BSC_NEXUS_ADDR(ssp, as, index) \
59	(&((ssp)->bscbus_regs[((as) * 256) + (index)]))
60
61/*
62 * Re-try limit on Accessors was determined empircally.  During a firmware
63 * download (the most heavy use of the comms channel), retries of up to 21
64 * attempts have been seen.  The next power of 2 up is 32; the chosen retry
65 * limit.
66 */
67#define	I2BSC_RETRY_LIMIT		32
68
69/*
70 * During attach processing we need to figure out if the firmware is broken
71 * from the start.  If our re-try strategy is too aggressive we get poor
72 * boot times.  Therefore, the initial broken firmware check done during attach
73 * is given a relatively low retry threshold.
74 */
75#define	I2BSC_SHORT_RETRY_LIMIT		4
76
77
78/*
79 * strace(1M) prints out the debug data once the debug value is set in
80 * the i2bsc.conf file and the debug driver is installed.
81 *
82 * Debug flags
83 *
84 * '@' - Register (@)ccess
85 * 'A' - (A)ttach
86 * 'D' - (D)ettach
87 * 'S' - (S)ession
88 * 'T' - I2C (T)ransfer
89 * 'U' - (U)pload
90 */
91
92/*
93 * Debug tips :
94 *
95 * strace(1M) prints out the debug data.
96 * A nice way to work out the debug value set in i2bsc.conf is to use mdb
97 * Say we want to show 'T' i2c transfer and 'U' upload processing,
98 * you calculate the debug value with the following mdb session :
99 *	# mdb
100 *	> 1<<('T'-'@') | 1<<('U'-'@') = X
101 *	                300000
102 *
103 *      > $q
104 * When you explicitly set "debug=0x300000;" in i2bsc.conf, it causes the
105 * debug driver to log Transfer and upload messages for strace(1M).
106 */
107
108typedef struct i2bsc {
109	uint64_t		debug;		/* debugging turned on */
110	short			majornum;	/* debugging - major number */
111	short			minornum;	/* debugging - minor number */
112
113	int			i2c_proxy_support;
114
115	ddi_device_acc_attr_t	bscbus_attr;	/* bscbus attributes */
116	ddi_acc_handle_t	bscbus_handle;	/* bscbus opaque handle */
117	uint32_t		bscbus_fault;	/* 0 => okay		*/
118
119	/*
120	 * A session is a set of contigious gets/puts marked either as
121	 * successful or failed.
122	 */
123	int			bscbus_session_failure;
124	uint8_t			*bscbus_regs;	/* bscbus register space */
125
126	dev_info_t		*i2bsc_dip;
127	int			i2bsc_attachflags;
128	kmutex_t		i2bsc_imutex;
129	kcondvar_t		i2bsc_icv;
130	int			i2bsc_open;
131	int			i2bsc_busy;
132	int			i2bsc_bus;
133	i2c_transfer_t		*i2bsc_cur_tran;
134	dev_info_t		*i2bsc_cur_dip;
135	char			i2bsc_name[MODMAXNAMELEN];
136} i2bsc_t;
137
138/*
139 * i2c_parent_pvt contains info that is chip specific
140 * and is stored on the child's devinfo parent private data.
141 */
142typedef struct i2bsc_ppvt {
143	int i2bsc_ppvt_bus; /* multiple I2C busses on a single set of */
144			    /* registers.  this tells it what bus to */
145			    /* use  */
146	int i2bsc_ppvt_addr; /* address of I2C device */
147} i2bsc_ppvt_t;
148
149#define	I2BSC_INITIAL_SOFT_SPACE	1
150
151/*
152 * Attach flags
153 */
154#define	SETUP_REGS	0x01
155#define	NEXUS_REGISTER	0x02
156#define	IMUTEX		0x04
157#define	MINOR_NODE	0x08
158#define	FIRMWARE_ALIVE	0x10
159#define	TRANSFER_SZ	0x20
160
161#ifdef	__cplusplus
162}
163#endif
164
165#endif /* _NEXUS_I2BSC_IMPL_H */
166