1/*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License, Version 1.0 only
6 * (the "License").  You may not use this file except in compliance
7 * with the License.
8 *
9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10 * or http://www.opensolaris.org/os/licensing.
11 * See the License for the specific language governing permissions
12 * and limitations under the License.
13 *
14 * When distributing Covered Code, include this CDDL HEADER in each
15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16 * If applicable, add the following below this CDDL HEADER, with the
17 * fields enclosed by brackets "[]" replaced with your own identifying
18 * information: Portions Copyright [yyyy] [name of copyright owner]
19 *
20 * CDDL HEADER END
21 */
22/*
23 * Copyright 1998-2003 Sun Microsystems, Inc.  All rights reserved.
24 * Use is subject to license terms.
25 */
26
27#ifndef _SYS_PDA_H
28#define	_SYS_PDA_H
29
30#pragma ident	"%Z%%M%	%I%	%E% SMI"
31
32#ifdef	__cplusplus
33extern "C" {
34#endif
35
36#include <sys/types.h>
37
38/*
39 * Contains definitions used for PDA (Post Descriptor Array) [post2obp]
40 * support.
41 *
42 * XXX - These data structures is defined in SSP-land in:
43 *	 src/post/export/xf_postif.h.  It is not anticipated
44 *	 that any future changes will be made to this data
45 *	 structure so we'll allow this hack on this go around.
46 */
47
48#define	MAX_ABUSES		4	/* Address buses */
49#define	MAX_DBUSES		2	/* Data buses */
50
51#define	MAX_SYSBDS		16	/* no more than 16 system boards */
52#define	MAX_PROCMODS		4	/* Per system board */
53#define	MAX_PC			3	/* Per system board */
54#define	MAX_XDB			4	/* Per system board */
55#define	MAX_CIC			4	/* Per system board */
56#define	MAX_MGROUPS		4	/* Per MC and system board */
57#define	MAX_IOCS		2	/* Per system board */
58#define	MAX_SLOTS_PER_IOC	4	/* Per ioc */
59
60typedef struct {
61	ushort_t	bda_board;		/* BDAN 0|Anyred|mem|Board */
62	ushort_t	bda_proc;		/* BDAN Processor 3:0	*/
63	ushort_t	bda_pc;			/* BDAN PC asic 2:0	*/
64	ushort_t	bda_xdb;		/* BDAN XDB asic 3:0	*/
65	ushort_t	bda_cic;		/* BDAN CIC asic 3:0	*/
66	ushort_t	bda_ldpath;		/* BDAN 0|0| ldpath [dbus] */
67	ushort_t	bda_ioc;		/* BDAN 0|0| ioc 1:0	*/
68	ushort_t	bda_ios[MAX_IOCS];	/* BDAN Scard 3:0	*/
69	ushort_t	bda_mgroup;		/* BDAN memory group 3:0 */
70} board_desc_t;
71
72typedef struct {
73	ushort_t	bada_proc [MAX_PROCMODS];  /* Extra status on procs */
74	uchar_t		bada_iom_type;		/* I/O module type. */
75	uchar_t		bada_fill[3];
76	ushort_t	bada_ioc[MAX_IOCS];	/* Extra status on iocs	*/
77} board_auxdesc_t;
78
79/*
80 * The three lsb of bada_proc holds the ecache size of that proc
81 * module, as (log-base-2 - 19), so 1/2 MB is 0, 1 MB is 1, ...
82 * 32 MB is 6. 7 is a bogus value.
83 */
84#define	BADA_PROC_GET_ECL2M19(bada_proc)	((bada_proc) & 0x7)
85
86typedef struct {
87	uint32_t	bmda_adr;		/* MC ADR */
88	uint32_t	bmda_gab_bank_sel;	/* MC gab bank sel reg */
89	ushort_t	bmda_bank_setup;	/* MC gab bank setup reg */
90	ushort_t	bmda_filler;
91	int32_t		bmda_badpage[MAX_MGROUPS];
92						/*
93						 * One bad page offset per
94						 * mgroup is allowed. No
95						 * bad page if < 0.
96						 */
97} board_mdesc_t;
98
99/*
100 * BDA nibble status definitions:
101 * These are ordered in terms of preserving interesting information
102 * in POST displays where all configurations are displayed in a
103 * single value. The highest value for a resource over all
104 * configurations is shown.
105 * Of course, this is just for help to engineers/technicians in
106 * understanding what happened; for the most part, everything
107 * except "GOOD" is just different flavors of "BAD".
108 * Note the special macro SET_BDA_NBL_CRUNCH below which requires
109 * that BDAN_CRUNCH be 0.
110 */
111#define	BDAN_CRUNCH	0x0		/* Unusable by implication */
112#define	BDAN_UNDEFINED	0x1		/* Architecturally Missing */
113#define	BDAN_MISS	0x2		/* Missing */
114#define	BDAN_FAIL	0x3		/* Tested and failed */
115#define	BDAN_BLACK	0x4		/* Blacklisted */
116#define	BDAN_RED	0x5		/* Redlisted */
117#define	BDAN_EXCLUDED	0x6		/* Board is not in this domain */
118#define	BDAN_UNCONFIG	0x7		/* Good, but not in config. */
119#define	BDAN_GOOD	0x8		/* Like it says. */
120#define	BDAN_MASK	0xF
121
122
123/* Macros for accessing BDA nibbles */
124#define	BDA_NBL(shrt, nibix) \
125		(((shrt) >> ((nibix) << 2)) & BDAN_MASK)
126#define	SET_BDA_NBL(shrt, nibix, val) \
127{ \
128	shrt &= ~(BDAN_MASK << ((nibix) << 2)); \
129	shrt |= (val) << ((nibix) << 2); \
130}
131
132/*
133 * This exists to keep lint from complaining about statements with
134 * null efect when we OR in a constant 0 in SET_BDA_NBL. It's a pain,
135 * but it does save the code optimizer some work. ;-{
136 */
137#define	SET_BDA_NBL_CRUNCH(shrt, nibix) \
138		(shrt &= ~(BDAN_MASK << ((nibix) << 2)))
139
140/* Definitions for nibbles in the bda_board element: */
141#define	BDA_GEN_NBL	0	/* Overall state of the board */
142#define	BDA_MC_NBL	1	/* State of the memory. */
143/*
144 * BDAN_RED if anything red on board, or board is BDAN_EXCLUDED;
145 * otherwise BDAN_GOOD
146 */
147#define	BDA_ANYRED_NBL	2
148/*
149 * Macro BDA_PAGESHIFT hides Solaris page size to Starfire POST, as POST
150 * assumes Solaris basic page size as 8K.
151 * Note: Only BDA_PAGESHIFT is used, BDA_PAGESIZE is added for readability.
152 */
153#define	BDA_PAGESHIFT	13
154#define	BDA_PAGESIZE	(1<<BDA_PAGESHIFT)
155
156typedef struct {			/* Memory Total Descriptor */
157	int32_t	Memt_NumPages;		/* 8 KB each */
158	int32_t	Memt_NumChunks;
159} MemoryTotal_t;
160
161typedef struct {				/* Chunk Descriptor */
162	uint32_t	Memc_StartAddress;	/* In 8 KB pages */
163	int32_t		Memc_Size;		/* In 8 KB pages */
164} MemChunk_t;
165
166
167#define	P2OBP_MAGIC	"XFPOST_2OBP"
168#define	VAR_ARRAY_LEN	1
169
170typedef struct {
171	char		p2o_magic[12];		/* magic cookie = P2OBP_MAGIC */
172	int32_t		p2o_struct_version;	/* equal to P2OBP_VERSION */
173	uint32_t	p2o_csum;		/* sum(uint[]) */
174	uint32_t	p2o_post_time;		/* creation time */
175	uint32_t	p2o_post_pid;		/* pid of sequencer on SSP */
176	uint32_t	p2o_post_level;		/* level at which hpost ran */
177	short		p2o_abus_mask;		/* [3:0] = Valid PA buses */
178						/* [5:4] = bus shuffle mode */
179	short		p2o_dbus_mask;		/* Valid physdata buses */
180	uint32_t	p2o_intercon_freq;	/* hz */
181	uint32_t	p2o_procssor_freq;	/* hz */
182	int32_t		p2o_post_private;
183	uint32_t	p2o_flags;		/* See P2OFLAG_XXX */
184	uchar_t		p2o_procint_intx_freq_ratio;	/* 0 if not known */
185	uchar_t		p2o_fill_byte[3];
186	uint_t		p2o_filler[6];		/* for expansion */
187	board_desc_t	p2o_bdinfo[MAX_SYSBDS];
188	board_mdesc_t	p2o_bdminfo[MAX_SYSBDS];
189	board_auxdesc_t	p2o_auxinfo[MAX_SYSBDS];
190	MemoryTotal_t	p2o_memtotal;
191	/*
192	 * Array of descriptors of existing memory.
193	 * Number of descriptors is given in memtotal.NumChunks.
194	 */
195	MemChunk_t	p2o_mchunks[VAR_ARRAY_LEN];
196} post2obp_info_t;
197
198#ifdef _KERNEL
199/*
200 * Following definitions in support of DR.
201 */
202typedef void		*pda_handle_t;
203
204extern pda_handle_t	pda_open();
205extern void		pda_close(pda_handle_t ph);
206extern int		pda_board_present(pda_handle_t ph, int boardnum);
207extern void		*pda_get_board_info(pda_handle_t ph, int boardnum);
208extern uint_t		pda_get_mem_size(pda_handle_t ph, int boardnum);
209extern void		pda_mem_add_span(pda_handle_t ph,
210						uint64_t basepa,
211						uint64_t nbytes);
212extern void		pda_mem_del_span(pda_handle_t ph,
213						uint64_t basepa,
214						uint64_t nbytes);
215extern void		pda_mem_sync(pda_handle_t ph, int board, int unit);
216extern void		pda_get_busmask(pda_handle_t ph,
217						short *amask, short *dmask);
218extern int		pda_is_valid(pda_handle_t ph);
219
220#endif /* _KERNEL */
221
222#ifdef	__cplusplus
223}
224#endif
225
226#endif /* _SYS_PDA_H */
227