1/*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21/*
22 * Copyright 2007 Sun Microsystems, Inc.  All rights reserved.
23 * Use is subject to license terms.
24 */
25
26#pragma ident	"%Z%%M%	%I%	%E% SMI"
27
28
29/*
30 * This file is through cpp before being used as
31 * an inline.  It contains support routines used
32 * only by DR for the copy-rename sequence.
33 */
34
35#if defined(lint)
36#include <sys/types.h>
37#endif /* lint */
38
39#ifndef	INLINE
40
41#include <sys/asm_linkage.h>
42
43#else /* INLINE */
44
45#define	ENTRY_NP(x)	.inline	x,0
46#define	retl		/* nop */
47#define	SET_SIZE(x)	.end
48
49#endif /* INLINE */
50
51#include <sys/privregs.h>
52#include <sys/sun4asi.h>
53#include <sys/machparam.h>
54
55#include <sys/intreg.h>
56#include <sys/opl_olympus_regs.h>
57
58/*
59 * Bcopy routine used by DR to copy
60 * between physical addresses.
61 * Borrowed from Starfire DR 2.6.
62 */
63#if defined(lint)
64
65/*ARGSUSED*/
66void
67bcopy32_il(uint64_t paddr1, uint64_t paddr2)
68{}
69
70#else /* lint */
71
72	ENTRY_NP(bcopy32_il)
73	.register %g2, #scratch
74	.register %g3, #scratch
75	rdpr	%pstate, %g0
76	ldxa	[%o0]ASI_MEM, %o2
77	add	%o0, 8, %o0
78	ldxa	[%o0]ASI_MEM, %o3
79	add	%o0, 8, %o0
80	ldxa	[%o0]ASI_MEM, %g1
81	add	%o0, 8, %o0
82	ldxa	[%o0]ASI_MEM, %g2
83
84	stxa	%o2, [%o1]ASI_MEM
85	add	%o1, 8, %o1
86	stxa	%o3, [%o1]ASI_MEM
87	add	%o1, 8, %o1
88	stxa	%g1, [%o1]ASI_MEM
89	add	%o1, 8, %o1
90	stxa	%g2, [%o1]ASI_MEM
91
92	retl
93	nop
94	SET_SIZE(bcopy32_il)
95
96#endif /* lint */
97
98#if defined(lint)
99
100/*ARGSUSED*/
101void
102flush_cache_il(void)
103{}
104
105#else /* lint */
106
107	ENTRY_NP(flush_cache_il)
108	rdpr	%pstate, %o3
109	andn	%o3, PSTATE_IE, %o4
110	wrpr	%g0, %o4, %pstate
111	mov	ASI_L2_CTRL_U2_FLUSH, %o4
112	mov	ASI_L2_CTRL_RW_ADDR, %o5
113	stxa	%o4, [%o5]ASI_L2_CTRL
114	! retl
115	wrpr	%g0, %o3, %pstate	! restore earlier pstate
116	SET_SIZE(flush_cache_il)
117
118#endif /* lint */
119
120#if defined(lint)
121/* ARGUSED */
122uint64_t
123drmach_get_stick_il(void)
124{}
125
126#else /* lint */
127	ENTRY_NP(drmach_get_stick_il)
128	retl
129	rd	STICK, %o0
130	SET_SIZE(drmach_get_stick_il)
131#endif /* lint */
132
133#if defined(lint)
134/* ARGUSED */
135void
136membar_sync_il(void)
137{}
138
139#else /* lint */
140	ENTRY_NP(membar_sync_il)
141	retl
142	membar #Sync
143	SET_SIZE(membar_sync_il)
144#endif /* lint */
145
146
147#if defined(lint)
148
149/* ARGSUSED */
150void
151flush_instr_mem_il(caddr_t vaddr)
152{}
153
154#else	/* lint */
155
156/*
157 * flush_instr_mem:
158 *	Flush 1 page of the I-$ starting at vaddr
159 * 	%o0 vaddr
160 *
161 * SPARC64-VI maintains consistency of the on-chip Instruction Cache with
162 * the stores from all processors so that a FLUSH instruction is only needed
163 * to ensure pipeline is consistent. This means a single flush is sufficient at
164 * the end of a sequence of stores that updates the instruction stream to
165 * ensure correct operation.
166 */
167
168	ENTRY_NP(flush_instr_mem_il)
169	flush	%o0			! address irrelevant
170	retl
171	 nop
172	SET_SIZE(flush_instr_mem_il)
173
174#endif	/* lint */
175
176#if defined(lint)
177
178/* ARGSUSED */
179void
180drmach_sleep_il(void)
181{}
182
183#else	/* lint */
184
185/*
186 * drmach-sleep_il:
187 *
188 * busy loop wait can affect performance of the sibling strand
189 * the sleep instruction can be used to avoid that.
190 */
191
192	ENTRY_NP(drmach_sleep_il)
193.word	0x81b01060
194	retl
195	 nop
196	SET_SIZE(drmach_sleep_il)
197
198#endif	/* lint */
199
200#if defined(lint)
201
202/* ARGSUSED */
203void
204flush_windows_il(void)
205{}
206
207#else	/* lint */
208
209/*
210 * flush_windows_il:
211 *
212 */
213
214	ENTRY_NP(flush_windows_il)
215	retl
216	 flushw
217	SET_SIZE(flush_windows_il)
218
219#endif	/* lint */
220