1/*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License, Version 1.0 only
6 * (the "License").  You may not use this file except in compliance
7 * with the License.
8 *
9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10 * or http://www.opensolaris.org/os/licensing.
11 * See the License for the specific language governing permissions
12 * and limitations under the License.
13 *
14 * When distributing Covered Code, include this CDDL HEADER in each
15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16 * If applicable, add the following below this CDDL HEADER, with the
17 * fields enclosed by brackets "[]" replaced with your own identifying
18 * information: Portions Copyright [yyyy] [name of copyright owner]
19 *
20 * CDDL HEADER END
21 */
22/*
23 * Copyright (c) 1999, 2000 by Sun Microsystems, Inc.
24 * All rights reserved.
25 */
26
27#ifndef	_MONTECARLO_SYS_MCT_TOPOLOGY_H
28#define	_MONTECARLO_SYS_MCT_TOPOLOGY_H
29
30#pragma ident	"%Z%%M%	%I%	%E% SMI"
31
32#ifdef	__cplusplus
33extern "C" {
34#endif
35
36/*
37 * mct_topology.h
38 * MonteCarlo / Tonga topology structures and types for the scsb driver
39 * and its kstat structure "env_topology", to be available to applications
40 * like envmond and snmp agents.
41 */
42/*
43 * SCB information also defined in scsb.h, which file is not available to
44 * applications.
45 */
46#define	SCB_P10_NOK_LED_REGS	4
47#define	SCB_P10_OK_LED_REGS	4
48#define	SCB_P10_BLINK_LED_REGS	2
49#define	SCB_P10_LED_REGS	10
50#define	SCB_P15_NOK_LED_REGS	3
51#define	SCB_P15_OK_LED_REGS	3
52#define	SCB_P15_BLINK_LED_REGS	3
53#define	SCB_P15_LED_REGS	9
54
55/* Save this existing definition, but use it as the MAX */
56#define	SCSB_LEDDATA_REGISTERS	SCB_P10_LED_REGS
57
58#define	MC_MAX_SLOTS		8	/* CPU, ALRM, cPCI Slots */
59#define	MC_MAX_FAN		2
60#define	MC_MAX_PDU		2
61#define	MC_MAX_PS		2
62#define	MC_MAX_DISK		3
63#define	MC_MAX_SCB		1
64#define	MC_MAX_AC		1
65#define	MC_MAX_CFTM		1
66#define	MC_MAX_CRTM		1
67#define	MC_MAX_PRTM		1
68
69#define	TG_MAX_SLOTS		5	/* CPU, ALRM, cPCI Slots */
70#define	TG_MAX_FAN		2
71#define	TG_MAX_PS		1
72#define	TG_MAX_PDU		1
73#define	TG_MAX_DISK		1
74#define	TG_MAX_SCB		1
75#define	TG_MAX_AC		1
76#define	TG_MAX_CFTM		1
77#define	TG_MAX_CRTM		1
78#define	TG_MAX_PRTM		1
79
80/*
81 * Maximum number of FRUs in MCT systems,
82 * used for sizeof fru_id_table[] and index check
83 */
84#define	MCT_MAX_FRUS		32
85
86/*
87 * The I2C addresses of System I2C devices
88 * from "MonteCarlo: Programming Interface Specifications" Version 0.9
89 */
90#define	MCT_I2C_CPUPWR		0x72
91#define	MCT_I2C_FAN1		0x74
92#define	MCT_I2C_FAN2		0x76
93#define	MCT_I2C_FAN3		0x78
94#define	MCT_I2C_PS1		0x7c
95#define	MCT_I2C_PS2		0x7e
96#define	MCT_I2C_SCB		0x80
97#define	MCT_I2C_CPUTEMP		0x9e
98
99/*
100 * CFG1_MPID masks
101 */
102#define	SCTRL_MPID_MASK			0xf
103#define	SCTRL_MPID_HALF			0x0
104#define	SCTRL_MPID_QUARTER		0x1
105#define	SCTRL_MPID_QUARTER_NODSK	0x3
106
107/*
108 * Interrupt Event Codes
109 * Also used by "scsb" to locate fruid_table index,
110 * so the order is very important.
111 */
112#define	SCTRL_EVENT_NONE		0x0000
113#define	SCTRL_EVENT_SLOT1		0x00000001
114#define	SCTRL_EVENT_SLOT2		0x00000002
115#define	SCTRL_EVENT_SLOT3		0x00000004
116#define	SCTRL_EVENT_SLOT4		0x00000008
117#define	SCTRL_EVENT_SLOT5		0x00000010
118#define	SCTRL_EVENT_SLOT6		0x00000020
119#define	SCTRL_EVENT_SLOT7		0x00000040
120#define	SCTRL_EVENT_SLOT8		0x00000080
121#define	SCTRL_EVENT_SLOT9		0x00000100
122#define	SCTRL_EVENT_SLOT10		0x00000200
123#define	SCTRL_EVENT_PDU1		0x00000400
124#define	SCTRL_EVENT_PDU2		0x00000800
125#define	SCTRL_EVENT_PS1			0x00001000
126#define	SCTRL_EVENT_PS2			0x00002000
127#define	SCTRL_EVENT_DISK1		0x00004000
128#define	SCTRL_EVENT_DISK2		0x00008000
129#define	SCTRL_EVENT_DISK3		0x00010000
130#define	SCTRL_EVENT_FAN1		0x00020000
131#define	SCTRL_EVENT_FAN2		0x00040000
132#define	SCTRL_EVENT_FAN3		0x00080000
133#define	SCTRL_EVENT_ALARM		0x00100000
134#define	SCTRL_EVENT_SCB			0x00200000
135#define	SCTRL_EVENT_SSB			0x00400000
136#define	SCTRL_EVENT_CRTM		0x00800000
137#define	SCTRL_EVENT_CFTM		0x01000000
138#define	SCTRL_EVENT_PRTM		0x02000000
139#define	SCTRL_EVENT_PWRDWN		0x04000000
140#define	SCTRL_EVENT_REPLACE		0x08000000
141#define	SCTRL_EVENT_ALARM_INT		0x10000000
142#define	SCTRL_EVENT_ALARM_INSERTION	0x20000000
143#define	SCTRL_EVENT_ALARM_REMOVAL	0x40000000
144#define	SCTRL_EVENT_OTHER		0x80000000
145
146
147
148typedef	uchar_t		topo_id_t;
149typedef	uchar_t		fru_id_t;
150typedef	uint16_t	fru_version_t;
151typedef	uint16_t	fru_max_t;
152typedef	uint16_t	scsb_unum_t;
153
154typedef	enum {
155	MCT_HEALTH_NA	= 0,
156	MCT_HEALTH_OK	= 1,
157	MCT_HEALTH_NOK	= 2
158} fru_health_t;
159
160/*
161 * Known MC/Tg Slot occupants, and UNKN for unknown
162 * NOTE: the CTC occupant is the CFTM FRU type on MonteCarlo
163 */
164typedef enum {
165	OC_UNKN	= 0,
166	OC_CPU	= 1,
167	OC_AC	= 2,
168	OC_BHS	= 3,
169	OC_FHS	= 4,
170	OC_HAHS	= 5,
171	OC_QFE	= 6,
172	OC_FRCH	= 7,
173	OC_COMBO = 8,
174	OC_PMC	= 9,
175	OC_ATM	= 10,
176	OC_CTC	= 11
177} mct_slot_occupant_t;
178
179typedef enum {
180	SLOT	= 0,
181	PDU	= 1,
182	PS	= 2,
183	DISK	= 3,
184	FAN	= 4,
185	ALARM	= 5,
186	SCB	= 6,
187	SSB	= 7,
188	CFTM	= 8,
189	CRTM	= 9,
190	PRTM	= 10,
191	MIDPLANE = 11
192} scsb_utype_t;
193
194#define	SCSB_UNIT_TYPES		11	/* w/o MIDPLANE	*/
195
196typedef enum scsb_fru_status {
197	FRU_NOT_PRESENT,
198	FRU_PRESENT,
199	FRU_NOT_AVAILABLE
200} scsb_fru_status_t;
201
202typedef enum {
203	SWAP_NOT, SWAP_BASIC, SWAP_FULL, SWAP_HA
204} cpci_swap_type_t;
205
206typedef struct fru_options {
207	char			*board_name;
208	cpci_swap_type_t	swap_type;
209	struct fru_options	*next;
210} fru_options_t;
211
212typedef struct fru_i2c_info {
213	uchar_t		syscfg_reg;
214	uchar_t		syscfg_bit;
215	uchar_t		ledata_reg;
216	uchar_t		ledata_bit;
217	uchar_t		blink_reg;
218	uchar_t		blink_bit;
219} fru_i2c_info_t;
220
221typedef struct fru_info {
222	scsb_fru_status_t fru_status;	/* FRU present status		*/
223	scsb_unum_t	fru_unit;	/* FRU external unit number	*/
224	scsb_utype_t	fru_type;	/* also an index to FRU lists	*/
225	fru_id_t	fru_id;		/* I2C address, SCSIID, Slot Num */
226	fru_version_t	fru_version;	/* version number where possible */
227	fru_options_t	*type_list;	/* list of possible boards for slots */
228	fru_i2c_info_t	*i2c_info;	/* for I2C devices		*/
229	struct fru_info	*next;
230} fru_info_t;
231
232struct system_info {
233	fru_info_t	mid_plane;	/* one always present		*/
234	fru_max_t	max_units[SCSB_UNIT_TYPES];
235	fru_info_t	*fru_info_list[SCSB_UNIT_TYPES];
236};
237
238/*
239 * scsb kstat types
240 */
241#define	SCSB_KS_LEDDATA		"scsb_leddata"
242#define	SCSB_KS_STATE		"scsb_state"
243#define	SCSB_KS_EVC_REGISTER	"scsb_evc_register"
244#define	SCSB_KS_TOPOLOGY	"env_topology"
245
246typedef struct ks_fru_info {
247	scsb_fru_status_t fru_status;	/* FRU presence/availability status  */
248	scsb_unum_t	fru_unit;	/* FRU external unit number	*/
249	scsb_utype_t	fru_type;	/* and occupant type for solts	*/
250	fru_id_t	fru_id;		/* I2C address, SCSIID, Slot Num */
251	fru_version_t	fru_version;	/* version number where possible */
252	fru_health_t	fru_health;	/* From NOK LED, if available	*/
253} ks_fru_info_t;
254
255typedef union scsb_leddata {
256	uchar_t		scb_led_regs[SCSB_LEDDATA_REGISTERS];
257	union {
258		struct {
259			uchar_t	nok_leds[SCB_P10_NOK_LED_REGS];
260			uchar_t	 ok_leds[SCB_P10_OK_LED_REGS];
261			uchar_t	blink_leds[SCB_P10_BLINK_LED_REGS];
262		} p10;
263		struct {
264			uchar_t	nok_leds[SCB_P15_NOK_LED_REGS];
265			uchar_t	 ok_leds[SCB_P15_OK_LED_REGS];
266			uchar_t	blink_leds[SCB_P15_BLINK_LED_REGS];
267		} p15;
268	} leds;
269} scsb_ks_leddata_t;
270
271typedef struct {
272	uint8_t		scb_present;		/* SCB is present	  */
273	uint8_t		ssb_present;		/* SSB is present	  */
274	uint8_t		scsb_frozen;		/* SCB swap state	  */
275	uint8_t		scsb_mode;		/* driver access mode	  */
276	uint8_t		unused_1;
277	uint8_t		unused_2;
278	uint8_t		unused_3;
279	uint8_t		unused_4;
280	uint32_t	event_code;		/* event code bit map	  */
281} scsb_ks_state_t;
282
283typedef struct {
284	ks_fru_info_t	mid_plane;
285	fru_max_t	max_units[SCSB_UNIT_TYPES];
286	ks_fru_info_t	mct_slots[MC_MAX_SLOTS];
287	ks_fru_info_t	mct_pdu[MC_MAX_PDU];
288	ks_fru_info_t	mct_ps[MC_MAX_PS];
289	ks_fru_info_t	mct_disk[MC_MAX_DISK];
290	ks_fru_info_t	mct_fan[MC_MAX_FAN];
291	ks_fru_info_t	mct_scb[MC_MAX_SCB];
292	ks_fru_info_t	mct_ssb[MC_MAX_SCB];
293	ks_fru_info_t	mct_alarm[MC_MAX_AC];
294	ks_fru_info_t	mct_cftm[MC_MAX_CFTM];
295	ks_fru_info_t	mct_crtm[MC_MAX_CRTM];
296	ks_fru_info_t	mct_prtm[MC_MAX_PRTM];
297} mct_topology_t;
298
299#ifdef	__cplusplus
300}
301#endif
302
303#endif	/* _MONTECARLO_SYS_MCT_TOPOLOGY_H */
304