1/* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21/* 22 * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 23 * Use is subject to license terms. 24 */ 25 26#ifndef _SYS_PX_DMA_H 27#define _SYS_PX_DMA_H 28 29#ifdef __cplusplus 30extern "C" { 31#endif 32 33typedef pfn_t px_iopfn_t; 34 35#define MAKE_DMA_COOKIE(cp, address, size) \ 36 { \ 37 (cp)->dmac_notused = 0; \ 38 (cp)->dmac_type = 0; \ 39 (cp)->dmac_laddress = (address); \ 40 (cp)->dmac_size = (size); \ 41 } 42 43#define PX_HAS_REDZONE(mp) \ 44 (((mp)->dmai_flags & PX_DMAI_FLAGS_REDZONE) ? 1 : 0) 45#define PX_MAP_BUFZONE(mp) \ 46 (((mp)->dmai_flags & PX_DMAI_FLAGS_MAP_BUFZONE) ? 1 :0) 47 48typedef struct px_dma_hdl { 49 ddi_dma_impl_t pdh_ddi_hdl; 50 ddi_dma_attr_t pdh_attr_dev; 51} px_dma_hdl_t; 52 53struct px_dma_impl { /* forthdebug only, keep in sync with ddi_dma_impl_t */ 54 ulong_t dmai_mapping; 55 uint_t dmai_size; 56 off_t dmai_offset; 57 uint_t dmai_minxfer; 58 uint_t dmai_burstsizes; 59 uint_t dmai_ndvmapages; 60 uint_t dmai_roffset; 61 uint_t dmai_rflags; 62 uint_t dmai_flags; 63 uint_t dmai_nwin; 64 uint_t dmai_winsize; 65 caddr_t dmai_tte; 66 void *dmai_pfnlst; 67 uint_t *dmai_pfn0; 68 void *dmai_winlst; 69 dev_info_t *dmai_rdip; 70 ddi_dma_obj_t dmai_object; 71 ddi_dma_attr_t dmai_attr_aug; 72 ddi_dma_cookie_t *dmai_cookie; 73 74 int (*dmai_fault_check)(struct ddi_dma_impl *handle); 75 void (*dmai_fault_notify)(struct ddi_dma_impl *handle); 76 int dmai_fault; 77 78 ddi_dma_attr_t dmai_attr_dev; 79}; 80 81/* Included in case other px-specific flags are added later. */ 82#define PX_DMA_SYNC_DDI_FLAGS ((1 << 16) - 1) /* Look for only DDI flags */ 83 84/* 85 * flags for overloading dmai_inuse field of the dma request 86 * structure: 87 */ 88#define dmai_flags dmai_inuse 89#define dmai_tte dmai_nexus_private 90#define dmai_fdvma dmai_nexus_private 91#define dmai_pfnlst dmai_iopte 92#define dmai_winlst dmai_minfo 93#define dmai_pfn0 dmai_sbi 94#define dmai_roffset dmai_pool 95#define dmai_bdf dmai_minxfer 96#define PX_MP_PFN0(mp) ((px_iopfn_t)(mp)->dmai_pfn0) 97#define PX_WINLST(mp) ((px_dma_win_t *)(mp)->dmai_winlst) 98#define PX_DEV_ATTR(mp) ((ddi_dma_attr_t *)(mp + 1)) 99#define SET_DMAATTR(p, lo, hi, nocross, cntmax) \ 100 (p)->dma_attr_addr_lo = (lo); \ 101 (p)->dma_attr_addr_hi = (hi); \ 102 (p)->dma_attr_seg = (nocross); \ 103 (p)->dma_attr_count_max = (cntmax); 104 105#define SET_DMAALIGN(p, align) \ 106 (p)->dma_attr_align = (align); 107 108#define PX_DMAI_FLAGS_INUSE 0x1 109#define PX_DMAI_FLAGS_BYPASSREQ 0x2 110#define PX_DMAI_FLAGS_PEER_ONLY 0x4 111#define PX_DMAI_FLAGS_NOCTX 0x8 112#define PX_DMAI_FLAGS_DVMA 0x10 113#define PX_DMAI_FLAGS_BYPASS 0x20 114#define PX_DMAI_FLAGS_PTP 0x40 115#define PX_DMAI_FLAGS_DMA (PX_DMAI_FLAGS_BYPASS | PX_DMAI_FLAGS_PTP) 116#define PX_DMAI_FLAGS_DMA_TYPE (PX_DMAI_FLAGS_DMA | PX_DMAI_FLAGS_DVMA) 117#define PX_DMAI_FLAGS_CONTEXT 0x100 118#define PX_DMAI_FLAGS_FASTTRACK 0x200 119#define PX_DMAI_FLAGS_VMEMCACHE 0x400 120#define PX_DMAI_FLAGS_PGPFN 0x800 121#define PX_DMAI_FLAGS_NOSYSLIMIT 0x1000 122#define PX_DMAI_FLAGS_NOFASTLIMIT 0x2000 123#define PX_DMAI_FLAGS_NOSYNC 0x4000 124#define PX_DMAI_FLAGS_PTP32 0x10000 125#define PX_DMAI_FLAGS_PTP64 0x20000 126/* 127 * #define PX_DMAI_FLAGS_MAP_BUFZONE 0x40000 128 * See pcie_impl.h 129 */ 130#define PX_DMAI_FLAGS_REDZONE 0x80000 131#define PX_DMAI_FLAGS_PRESERVE (PX_DMAI_FLAGS_PEER_ONLY | \ 132 PX_DMAI_FLAGS_BYPASSREQ | PX_DMAI_FLAGS_NOSYSLIMIT | \ 133 PX_DMAI_FLAGS_NOFASTLIMIT | PX_DMAI_FLAGS_NOCTX | \ 134 PX_DMAI_FLAGS_MAP_BUFZONE | PX_DMAI_FLAGS_REDZONE) 135 136#define PX_HAS_NOFASTLIMIT(mp) ((mp)->dmai_flags & PX_DMAI_FLAGS_NOFASTLIMIT) 137#define PX_HAS_NOSYSLIMIT(mp) ((mp)->dmai_flags & PX_DMAI_FLAGS_NOSYSLIMIT) 138#define PX_DMA_ISPEERONLY(mp) ((mp)->dmai_flags & PX_DMAI_FLAGS_PEER_ONLY) 139#define PX_DMA_ISPGPFN(mp) ((mp)->dmai_flags & PX_DMAI_FLAGS_PGPFN) 140#define PX_DMA_TYPE(mp) ((mp)->dmai_flags & PX_DMAI_FLAGS_DMA_TYPE) 141#define PX_DMA_ISDVMA(mp) (PX_DMA_TYPE(mp) == PX_DMAI_FLAGS_DVMA) 142#define PX_DMA_ISBYPASS(mp) (PX_DMA_TYPE(mp) == PX_DMAI_FLAGS_BYPASS) 143#define PX_DMA_ISPTP(mp) (PX_DMA_TYPE(mp) == PX_DMAI_FLAGS_PTP) 144#define PX_DMA_ISPTP32(mp) ((mp)->dmai_flags & PX_DMAI_FLAGS_PTP32) 145#define PX_DMA_ISPTP64(mp) ((mp)->dmai_flags & PX_DMAI_FLAGS_PTP64) 146#define PX_DMA_CANFAST(mp) (((mp)->dmai_ndvmapages + PX_HAS_REDZONE(mp) \ 147 <= px_dvma_page_cache_clustsz) && PX_HAS_NOFASTLIMIT(mp)) 148#define PX_DMA_WINNPGS(mp) MMU_BTOP((mp)->dmai_winsize) 149#define PX_DMA_CANCACHE(mp) (!PX_HAS_REDZONE(mp) && \ 150 (PX_DMA_WINNPGS(mp) == 1) && PX_HAS_NOSYSLIMIT(mp)) 151 152#define PX_DEV_NOFASTLIMIT(lo, hi, fastlo, fasthi, align_pg) \ 153 (((lo) <= (fastlo)) && ((hi) >= (fasthi)) && \ 154 ((align_pg) <= px_dvma_page_cache_clustsz)) 155 156#define PX_DEV_NOSYSLIMIT(lo, hi, syslo, syshi, align_pg) \ 157 (((lo) <= (syslo)) && ((hi) >= (syshi)) && (align_pg == 1)) 158 159#define PX_DMA_NOCTX(rdip) (!px_use_contexts || (px_ctx_no_active_flush && \ 160 ddi_prop_exists(DDI_DEV_T_ANY, rdip, \ 161 DDI_PROP_DONTPASS | DDI_PROP_NOTPROM, "active-dma-flush"))) 162#define PX_DMA_USECTX(mp) (!(mp->dmai_flags & DMAI_FLAGS_NOCTX)) 163 164#define PX_DMA_BADPTP(pfn, attrp) \ 165 ((IOMMU_PTOB(pfn) < attrp->dma_attr_addr_lo) || \ 166 (IOMMU_PTOB(pfn) > attrp->dma_attr_addr_hi)) 167#define PX_DMA_CURWIN(mp) \ 168 (((mp)->dmai_offset + (mp)->dmai_roffset) / (mp)->dmai_winsize) 169 170#ifdef PX_DMA_PROF 171 172/* collect fast track failure statistics */ 173#define PX_DVMA_FASTTRAK_PROF(mp) { \ 174if ((mp->dmai_ndvmapages + PX_HAS_REDZONE(mp)) > px_dvma_page_cache_clustsz) \ 175 px_dvmaft_npages++; \ 176else if (!PX_HAS_NOFASTLIMIT(mp)) \ 177 px_dvmaft_limit++; \ 178} 179 180#else /* !PX_DMA_PROF */ 181 182#define PX_DVMA_FASTTRAK_PROF(mp) 183 184#endif /* PX_DMA_PROF */ 185 186typedef struct px_dma_win { 187 struct px_dma_win *win_next; 188 uint32_t win_ncookies; 189 uint32_t win_curseg; 190 uint64_t win_size; 191 uint64_t win_offset; 192 /* cookie table: sizeof (ddi_dma_cookie_t) * win_ncookies */ 193} px_dma_win_t; 194 195/* dvma debug records */ 196struct px_dvma_rec { 197 char *dvma_addr; 198 uint_t len; 199 ddi_dma_impl_t *mp; 200 struct px_dvma_rec *next; 201}; 202 203extern int px_dma_attach(px_t *px_p); 204extern int px_dma_win(dev_info_t *dip, dev_info_t *rdip, 205 ddi_dma_handle_t handle, uint_t win, off_t *offp, 206 size_t *lenp, ddi_dma_cookie_t *cookiep, uint_t *ccountp); 207 208extern ddi_dma_impl_t *px_dma_allocmp(dev_info_t *dip, dev_info_t *rdip, 209 int (*waitfp)(caddr_t), caddr_t arg); 210extern void px_dma_freemp(ddi_dma_impl_t *mp); 211extern void px_dma_freepfn(ddi_dma_impl_t *mp); 212extern ddi_dma_impl_t *px_dma_lmts2hdl(dev_info_t *dip, dev_info_t *rdip, 213 px_mmu_t *mmu_p, ddi_dma_req_t *dmareq); 214extern int px_dma_attr2hdl(px_t *px_p, ddi_dma_impl_t *mp); 215extern int px_dma_type(px_t *px_p, ddi_dma_req_t *req, ddi_dma_impl_t *mp); 216extern int px_dma_pfn(px_t *px_p, ddi_dma_req_t *req, ddi_dma_impl_t *mp); 217extern int px_dvma_win(px_t *px_p, ddi_dma_req_t *r, ddi_dma_impl_t *mp); 218extern void px_dma_freewin(ddi_dma_impl_t *mp); 219extern int px_dvma_map_fast(px_mmu_t *mmu_p, ddi_dma_impl_t *mp); 220extern int px_dvma_map(ddi_dma_impl_t *mp, ddi_dma_req_t *dmareq, 221 px_mmu_t *mmu_p); 222extern void px_dvma_unmap(px_mmu_t *mmu_p, ddi_dma_impl_t *mp); 223extern int px_dma_physwin(px_t *px_p, ddi_dma_req_t *dmareq, 224 ddi_dma_impl_t *mp); 225extern int px_dvma_ctl(dev_info_t *dip, dev_info_t *rdip, 226 ddi_dma_impl_t *mp, enum ddi_dma_ctlops cmd, off_t *offp, 227 size_t *lenp, caddr_t *objp, uint_t cache_flags); 228extern int px_dma_ctl(dev_info_t *dip, dev_info_t *rdip, 229 ddi_dma_impl_t *mp, enum ddi_dma_ctlops cmd, off_t *offp, 230 size_t *lenp, caddr_t *objp, uint_t cache_flags); 231 232#define PX_GET_MP_NCOOKIES(mp) ((mp)->dmai_ncookies) 233#define PX_SET_MP_NCOOKIES(mp, nc) ((mp)->dmai_ncookies = (nc)) 234#define PX_GET_MP_PFN1_ADDR(mp) (((px_iopfn_t *)(mp)->dmai_pfnlst) + 1) 235 236#define PX_GET_MP_TTE(tte) \ 237 (((uint64_t)(uintptr_t)(tte) >> 5) << (32 + 5) | \ 238 ((uint32_t)(uintptr_t)(tte)) & (PCI_MAP_ATTR_READ | \ 239 PCI_MAP_ATTR_WRITE | PCI_MAP_ATTR_RO | \ 240 PCI_MAP_ATTR_PHFUN_MASK)) 241 242#define PX_SAVE_MP_TTE(mp, tte) \ 243 (mp)->dmai_tte = (caddr_t)((uintptr_t)HI32(tte) | ((tte) & \ 244 (PCI_MAP_ATTR_READ | PCI_MAP_ATTR_WRITE | \ 245 PCI_MAP_ATTR_RO | PCI_MAP_ATTR_PHFUN_MASK))) 246 247#define PX_GET_MP_PFN1(mp, page_no) \ 248 (((px_iopfn_t *)(mp)->dmai_pfnlst)[page_no]) 249#define PX_GET_MP_PFN(mp, page_no) ((mp)->dmai_ndvmapages == 1 ? \ 250 (px_iopfn_t)(mp)->dmai_pfnlst : PX_GET_MP_PFN1(mp, page_no)) 251 252#define PX_SET_MP_PFN(mp, page_no, pfn) { \ 253 if ((mp)->dmai_ndvmapages == 1) { \ 254 ASSERT(!((page_no) || (mp)->dmai_pfnlst)); \ 255 (mp)->dmai_pfnlst = (void *)(pfn); \ 256 } else \ 257 ((px_iopfn_t *)(mp)->dmai_pfnlst)[page_no] = \ 258 (px_iopfn_t)(pfn); \ 259} 260#define PX_SET_MP_PFN1(mp, page_no, pfn) { \ 261 ((px_iopfn_t *)(mp)->dmai_pfnlst)[page_no] = (pfn); \ 262} 263 264extern int px_dma_freehdl(dev_info_t *dip, dev_info_t *rdip, 265 ddi_dma_handle_t handle); 266 267#if defined(DEBUG) 268extern void px_dump_dma_handle(uint64_t flag, dev_info_t *dip, 269 ddi_dma_impl_t *hp); 270#else 271#define px_dump_dma_handle(flag, dip, hp) 272#endif 273 274#ifdef __cplusplus 275} 276#endif 277 278#endif /* _SYS_PX_DMA_H */ 279