1/* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22/* 23 * Copyright 2010 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27#ifndef _SYS_CPU_MODULE_H 28#define _SYS_CPU_MODULE_H 29 30#include <sys/types.h> 31#include <sys/cpuvar.h> 32#include <sys/nvpair.h> 33#include <sys/mc.h> 34#include <sys/sunddi.h> 35 36#ifdef __cplusplus 37extern "C" { 38#endif 39 40#ifdef _KERNEL 41 42#define CMIERR_BASE 0xc000 43 44typedef enum cmi_errno { 45 CMI_SUCCESS = 0, 46 /* 47 * CPU Module Interface API error return values/ 48 */ 49 CMIERR_UNKNOWN = CMIERR_BASE, /* no specific error reason reported */ 50 CMIERR_API, /* API usage error caught */ 51 CMIERR_NOTSUP, /* Unsupported operation */ 52 CMIERR_HDL_CLASS, /* Inappropriate handle class */ 53 CMIERR_HDL_NOTFOUND, /* Can't find handle for resource */ 54 CMIERR_MSRGPF, /* #GP during cmi_hdl_{wr,rd}msr */ 55 CMIERR_INTERPOSE, /* MSR/PCICFG interposition error */ 56 CMIERR_DEADLOCK, /* Deadlock avoidance */ 57 /* 58 * Memory-controller related errors 59 */ 60 CMIERR_MC_ABSENT, /* No, or not yet registered, MC ops */ 61 CMIERR_MC_NOTSUP, /* Requested functionality unimpld */ 62 CMIERR_MC_NOMEMSCRUB, /* No dram scrubber, or disabled */ 63 CMIERR_MC_SYNDROME, /* Invalid syndrome or syndrome type */ 64 CMIERR_MC_BADSTATE, /* MC driver state is invalid */ 65 CMIERR_MC_NOADDR, /* Address not found */ 66 CMIERR_MC_RSRCNOTPRESENT, /* Resource not present in system */ 67 CMIERR_MC_ADDRBITS, /* Too few valid addr bits */ 68 CMIERR_MC_INVALUNUM, /* Invalid input unum */ 69 CMIERR_MC_PARTIALUNUMTOPA /* unum to pa reflected physaddr */ 70} cmi_errno_t; 71 72/* 73 * All access to cpu information is made via a handle, in order to get 74 * the desired info even when running non-natively. 75 * 76 * A CMI_HDL_NATIVE handle is used when we believe we are running on 77 * bare-metal. If we *are* on bare metal then this handle type will 78 * get us through to the real hardware, and there will be a 1:1 correspondence 79 * between handles and cpu_t structures; if not, say we are a domU to 80 * some unknown/undetected/unannounced hypervisor then chances are the 81 * hypervisor is not exposing much hardware detail to us so we should 82 * be prepared for some operations that "cannot fail" to fail or return 83 * odd data. 84 * 85 * A CMI_HDL_SOLARIS_xVM_MCA handle is used when we are running 86 * in i86xpv architecture - dom0 to a Solaris xVM hypervisor - and want to 87 * use a handle on each real execution core (as opposed to vcpu) 88 * to perform MCA related activities. The model for this handle type 89 * is that the hypervisor continues to own the real hardware and 90 * includes a polling service and #MC handler which forward error 91 * telemetry to dom0 for logging and diagnosis. As such, the operations 92 * such as RDMSR and WRMSR for this handle type do *not* read and write 93 * real MSRs via hypercalls- instead they should provide the values from 94 * already-read MCA bank telemetry, and writes are discarded. 95 * 96 * If some application requires real MSR read and write access another 97 * handle class should be introduced. 98 */ 99 100typedef struct cmi_hdl *cmi_hdl_t; /* opaque chip/core/strand handle */ 101 102enum cmi_hdl_class { 103 CMI_HDL_NATIVE, 104 CMI_HDL_SOLARIS_xVM_MCA, 105 CMI_HDL_NEUTRAL 106}; 107 108struct regs; 109 110typedef struct cmi_mc_ops { 111 cmi_errno_t (*cmi_mc_patounum)(void *, uint64_t, uint8_t, uint8_t, 112 uint32_t, int, mc_unum_t *); 113 cmi_errno_t (*cmi_mc_unumtopa)(void *, mc_unum_t *, nvlist_t *, 114 uint64_t *); 115 void (*cmi_mc_logout)(cmi_hdl_t, boolean_t, boolean_t); 116} cmi_mc_ops_t; 117 118extern cmi_hdl_t cmi_init(enum cmi_hdl_class, uint_t, uint_t, uint_t); 119extern void cmi_post_startup(void); 120extern void cmi_post_mpstartup(void); 121extern void cmi_fini(cmi_hdl_t); 122 123extern void cmi_hdl_hold(cmi_hdl_t); 124extern void cmi_hdl_rele(cmi_hdl_t); 125extern void *cmi_hdl_getcmidata(cmi_hdl_t); 126extern void cmi_hdl_setspecific(cmi_hdl_t, void *); 127extern void *cmi_hdl_getspecific(cmi_hdl_t); 128extern const struct cmi_mc_ops *cmi_hdl_getmcops(cmi_hdl_t); 129extern void *cmi_hdl_getmcdata(cmi_hdl_t); 130extern enum cmi_hdl_class cmi_hdl_class(cmi_hdl_t); 131 132extern cmi_hdl_t cmi_hdl_lookup(enum cmi_hdl_class, uint_t, uint_t, uint_t); 133extern cmi_hdl_t cmi_hdl_any(void); 134 135#define CMI_HDL_WALK_NEXT 0 136#define CMI_HDL_WALK_DONE 1 137extern void cmi_hdl_walk(int (*)(cmi_hdl_t, void *, void *, void *), 138 void *, void *, void *); 139 140extern void cmi_hdlconf_rdmsr_nohw(cmi_hdl_t); 141extern void cmi_hdlconf_wrmsr_nohw(cmi_hdl_t); 142extern cmi_errno_t cmi_hdl_rdmsr(cmi_hdl_t, uint_t, uint64_t *); 143extern cmi_errno_t cmi_hdl_wrmsr(cmi_hdl_t, uint_t, uint64_t); 144 145extern void cmi_hdl_enable_mce(cmi_hdl_t); 146extern uint_t cmi_hdl_vendor(cmi_hdl_t); 147extern const char *cmi_hdl_vendorstr(cmi_hdl_t); 148extern uint_t cmi_hdl_family(cmi_hdl_t); 149extern uint_t cmi_hdl_model(cmi_hdl_t); 150extern uint_t cmi_hdl_stepping(cmi_hdl_t); 151extern uint_t cmi_hdl_chipid(cmi_hdl_t); 152extern uint_t cmi_hdl_procnodeid(cmi_hdl_t); 153extern uint_t cmi_hdl_coreid(cmi_hdl_t); 154extern uint_t cmi_hdl_strandid(cmi_hdl_t); 155extern uint_t cmi_hdl_strand_apicid(cmi_hdl_t); 156extern uint_t cmi_hdl_procnodes_per_pkg(cmi_hdl_t); 157extern boolean_t cmi_hdl_is_cmt(cmi_hdl_t); 158extern uint32_t cmi_hdl_chiprev(cmi_hdl_t); 159extern const char *cmi_hdl_chiprevstr(cmi_hdl_t); 160extern uint32_t cmi_hdl_getsockettype(cmi_hdl_t); 161extern const char *cmi_hdl_getsocketstr(cmi_hdl_t); 162extern id_t cmi_hdl_logical_id(cmi_hdl_t); 163extern uint16_t cmi_hdl_smbiosid(cmi_hdl_t); 164extern uint_t cmi_hdl_smb_chipid(cmi_hdl_t); 165extern nvlist_t *cmi_hdl_smb_bboard(cmi_hdl_t); 166 167extern int cmi_hdl_online(cmi_hdl_t, int, int *); 168 169#ifndef __xpv 170extern uint_t cmi_ntv_hwchipid(cpu_t *); 171extern uint_t cmi_ntv_hwprocnodeid(cpu_t *); 172extern uint_t cmi_ntv_hwcoreid(cpu_t *); 173extern uint_t cmi_ntv_hwstrandid(cpu_t *); 174extern void cmi_ntv_hwdisable_mce(cmi_hdl_t); 175#endif /* __xpv */ 176 177typedef struct cmi_mca_regs { 178 uint_t cmr_msrnum; 179 uint64_t cmr_msrval; 180} cmi_mca_regs_t; 181 182extern cmi_errno_t cmi_hdl_msrinject(cmi_hdl_t, cmi_mca_regs_t *, uint_t, 183 int); 184extern void cmi_hdl_msrinterpose(cmi_hdl_t, cmi_mca_regs_t *, uint_t); 185extern void cmi_hdl_msrforward(cmi_hdl_t, cmi_mca_regs_t *, uint_t); 186extern boolean_t cmi_inj_tainted(void); 187 188extern void cmi_faulted_enter(cmi_hdl_t); 189extern void cmi_faulted_exit(cmi_hdl_t); 190 191extern void cmi_pcird_nohw(void); 192extern void cmi_pciwr_nohw(void); 193extern uint8_t cmi_pci_getb(int, int, int, int, int *, ddi_acc_handle_t); 194extern uint16_t cmi_pci_getw(int, int, int, int, int *, ddi_acc_handle_t); 195extern uint32_t cmi_pci_getl(int, int, int, int, int *, ddi_acc_handle_t); 196extern void cmi_pci_interposeb(int, int, int, int, uint8_t); 197extern void cmi_pci_interposew(int, int, int, int, uint16_t); 198extern void cmi_pci_interposel(int, int, int, int, uint32_t); 199extern void cmi_pci_putb(int, int, int, int, ddi_acc_handle_t, uint8_t); 200extern void cmi_pci_putw(int, int, int, int, ddi_acc_handle_t, uint16_t); 201extern void cmi_pci_putl(int, int, int, int, ddi_acc_handle_t, uint32_t); 202 203extern void cmi_mca_init(cmi_hdl_t); 204 205extern void cmi_hdl_poke(cmi_hdl_t); 206extern void cmi_hdl_int(cmi_hdl_t, int); 207 208extern void cmi_mca_trap(struct regs *); 209 210extern boolean_t cmi_panic_on_ue(void); 211 212extern void cmi_mc_register(cmi_hdl_t, const struct cmi_mc_ops *, void *); 213extern cmi_errno_t cmi_mc_register_global(const struct cmi_mc_ops *, void *); 214extern void cmi_mc_sw_memscrub_disable(void); 215extern cmi_errno_t cmi_mc_patounum(uint64_t, uint8_t, uint8_t, uint32_t, int, 216 mc_unum_t *); 217extern cmi_errno_t cmi_mc_unumtopa(mc_unum_t *, nvlist_t *, uint64_t *); 218extern void cmi_mc_logout(cmi_hdl_t, boolean_t, boolean_t); 219 220extern void cmi_panic_callback(void); 221 222#endif /* _KERNEL */ 223 224#ifdef __cplusplus 225} 226#endif 227 228#endif /* _SYS_CPU_MODULE_H */ 229