1/*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21/*
22 * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved.
23 */
24
25/*
26 * x86-specific routines used by the CPU Performance counter driver.
27 */
28
29#include <sys/types.h>
30#include <sys/time.h>
31#include <sys/atomic.h>
32#include <sys/regset.h>
33#include <sys/privregs.h>
34#include <sys/x86_archext.h>
35#include <sys/cpuvar.h>
36#include <sys/machcpuvar.h>
37#include <sys/archsystm.h>
38#include <sys/cpc_pcbe.h>
39#include <sys/cpc_impl.h>
40#include <sys/x_call.h>
41#include <sys/cmn_err.h>
42#include <sys/cmt.h>
43#include <sys/spl.h>
44#include <sys/apic.h>
45
46static const uint64_t allstopped = 0;
47static kcpc_ctx_t *(*overflow_intr_handler)(caddr_t);
48
49/* Do threads share performance monitoring hardware? */
50static int strands_perfmon_shared = 0;
51
52int kcpc_hw_overflow_intr_installed;		/* set by APIC code */
53extern kcpc_ctx_t *kcpc_overflow_intr(caddr_t arg, uint64_t bitmap);
54
55extern int kcpc_counts_include_idle; /* Project Private /etc/system variable */
56
57void (*kcpc_hw_enable_cpc_intr)(void);		/* set by APIC code */
58
59int
60kcpc_hw_add_ovf_intr(kcpc_ctx_t *(*handler)(caddr_t))
61{
62	if (x86_type != X86_TYPE_P6)
63		return (0);
64	overflow_intr_handler = handler;
65	return (ipltospl(APIC_PCINT_IPL));
66}
67
68void
69kcpc_hw_rem_ovf_intr(void)
70{
71	overflow_intr_handler = NULL;
72}
73
74/*
75 * Hook used on P4 systems to catch online/offline events.
76 */
77/*ARGSUSED*/
78static int
79kcpc_cpu_setup(cpu_setup_t what, int cpuid, void *arg)
80{
81	pg_cmt_t	*chip_pg;
82	int		active_cpus_cnt;
83
84	if (what != CPU_ON)
85		return (0);
86
87	/*
88	 * If any CPU-bound contexts exist, we don't need to invalidate
89	 * anything, as no per-LWP contexts can coexist.
90	 */
91	if (kcpc_cpuctx || dtrace_cpc_in_use)
92		return (0);
93
94	/*
95	 * If this chip now has more than 1 active cpu, we must invalidate all
96	 * contexts in the system.
97	 */
98	chip_pg = (pg_cmt_t *)pghw_find_pg(cpu[cpuid], PGHW_CHIP);
99	if (chip_pg != NULL) {
100		active_cpus_cnt = GROUP_SIZE(&chip_pg->cmt_cpus_actv);
101		if (active_cpus_cnt > 1)
102			kcpc_invalidate_all();
103	}
104
105	return (0);
106}
107
108static kmutex_t cpu_setup_lock;	/* protects setup_registered */
109static int setup_registered;
110
111
112void
113kcpc_hw_init(cpu_t *cp)
114{
115	kthread_t *t = cp->cpu_idle_thread;
116	uint32_t versionid;
117	struct cpuid_regs cpuid;
118
119	strands_perfmon_shared = 0;
120	if (is_x86_feature(x86_featureset, X86FSET_HTT)) {
121		if (cpuid_getvendor(cpu[0]) == X86_VENDOR_Intel) {
122			/*
123			 * Intel processors that support Architectural
124			 * Performance Monitoring Version 3 have per strand
125			 * performance monitoring hardware.
126			 * Hence we can allow use of performance counters on
127			 * multiple strands on the same core simultaneously.
128			 */
129			cpuid.cp_eax = 0x0;
130			(void) __cpuid_insn(&cpuid);
131			if (cpuid.cp_eax < 0xa) {
132				strands_perfmon_shared = 1;
133			} else {
134				cpuid.cp_eax = 0xa;
135				(void) __cpuid_insn(&cpuid);
136
137				versionid = cpuid.cp_eax & 0xFF;
138				if (versionid < 3) {
139					strands_perfmon_shared = 1;
140				}
141			}
142		} else {
143			strands_perfmon_shared = 1;
144		}
145	}
146
147	if (strands_perfmon_shared) {
148		mutex_enter(&cpu_setup_lock);
149		if (setup_registered == 0) {
150			mutex_enter(&cpu_lock);
151			register_cpu_setup_func(kcpc_cpu_setup, NULL);
152			mutex_exit(&cpu_lock);
153			setup_registered = 1;
154		}
155		mutex_exit(&cpu_setup_lock);
156	}
157
158	mutex_init(&cp->cpu_cpc_ctxlock, "cpu_cpc_ctxlock", MUTEX_DEFAULT, 0);
159
160	if (kcpc_counts_include_idle)
161		return;
162
163	installctx(t, cp, kcpc_idle_save, kcpc_idle_restore,
164	    NULL, NULL, NULL, NULL);
165}
166
167void
168kcpc_hw_fini(cpu_t *cp)
169{
170	ASSERT(cp->cpu_idle_thread == NULL);
171
172	mutex_destroy(&cp->cpu_cpc_ctxlock);
173}
174
175#define	BITS(v, u, l)	\
176	(((v) >> (l)) & ((1 << (1 + (u) - (l))) - 1))
177
178#define	PCBE_NAMELEN 30	/* Enough Room for pcbe.manuf.model.family.stepping */
179
180/*
181 * Examine the processor and load an appropriate PCBE.
182 */
183int
184kcpc_hw_load_pcbe(void)
185{
186	return (kcpc_pcbe_tryload(cpuid_getvendorstr(CPU), cpuid_getfamily(CPU),
187	    cpuid_getmodel(CPU), cpuid_getstep(CPU)));
188}
189
190/*
191 * Called by the generic framework to check if it's OK to bind a set to a CPU.
192 */
193int
194kcpc_hw_cpu_hook(processorid_t cpuid, ulong_t *kcpc_cpumap)
195{
196	cpu_t		*cpu, *p;
197	pg_t		*chip_pg;
198	pg_cpu_itr_t	itr;
199
200	if (!strands_perfmon_shared)
201		return (0);
202
203	/*
204	 * Only one logical CPU on each Pentium 4 HT CPU may be bound to at
205	 * once.
206	 *
207	 * This loop is protected by holding cpu_lock, in order to properly
208	 * access the cpu_t of the desired cpu.
209	 */
210	mutex_enter(&cpu_lock);
211	if ((cpu = cpu_get(cpuid)) == NULL) {
212		mutex_exit(&cpu_lock);
213		return (-1);
214	}
215
216	chip_pg = (pg_t *)pghw_find_pg(cpu, PGHW_CHIP);
217
218	PG_CPU_ITR_INIT(chip_pg, itr);
219	while ((p = pg_cpu_next(&itr)) != NULL) {
220		if (p == cpu)
221			continue;
222		if (BT_TEST(kcpc_cpumap, p->cpu_id)) {
223			mutex_exit(&cpu_lock);
224			return (-1);
225		}
226	}
227
228	mutex_exit(&cpu_lock);
229	return (0);
230}
231
232/*
233 * Called by the generic framework to check if it's OK to bind a set to an LWP.
234 */
235int
236kcpc_hw_lwp_hook(void)
237{
238	pg_cmt_t	*chip;
239	group_t		*chips;
240	group_iter_t	i;
241
242	if (!strands_perfmon_shared)
243		return (0);
244
245	/*
246	 * Only one CPU per chip may be online.
247	 */
248	mutex_enter(&cpu_lock);
249
250	chips = pghw_set_lookup(PGHW_CHIP);
251	if (chips == NULL) {
252		mutex_exit(&cpu_lock);
253		return (0);
254	}
255
256	group_iter_init(&i);
257	while ((chip = group_iterate(chips, &i)) != NULL) {
258		if (GROUP_SIZE(&chip->cmt_cpus_actv) > 1) {
259			mutex_exit(&cpu_lock);
260			return (-1);
261		}
262	}
263
264	mutex_exit(&cpu_lock);
265	return (0);
266}
267