1/*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License, Version 1.0 only
6 * (the "License").  You may not use this file except in compliance
7 * with the License.
8 *
9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10 * or http://www.opensolaris.org/os/licensing.
11 * See the License for the specific language governing permissions
12 * and limitations under the License.
13 *
14 * When distributing Covered Code, include this CDDL HEADER in each
15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16 * If applicable, add the following below this CDDL HEADER, with the
17 * fields enclosed by brackets "[]" replaced with your own identifying
18 * information: Portions Copyright [yyyy] [name of copyright owner]
19 *
20 * CDDL HEADER END
21 */
22/*
23 * Copyright 2004 Sun Microsystems, Inc.  All rights reserved.
24 * Use is subject to license terms.
25 */
26
27#ifndef _SYS_PCATA_H
28#define	_SYS_PCATA_H
29
30#pragma ident	"%Z%%M%	%I%	%E% SMI"
31
32#ifdef	__cplusplus
33extern "C" {
34#endif
35
36#define	FALSE	0
37#define	TRUE	1
38
39#if defined(DEBUG)
40#define	ATA_DEBUG 	1
41#endif	/* defined(DEBUG) */
42
43/*
44 * port offsets from base address ioaddr1
45 */
46#define	AT_DATA		0x00	/* data register			*/
47#define	AT_ERROR	0x01	/* error register (read)		*/
48#define	AT_FEATURE	0x01	/* feature (write)			*/
49#define	AT_COUNT	0x02	/* sector count				*/
50#define	AT_SECT		0x03	/* sector number			*/
51#define	AT_LCYL		0x04	/* cylinder low byte			*/
52#define	AT_HCYL		0x05	/* cylinder high byte			*/
53#define	AT_DRVHD	0x06	/* drive/head register			*/
54#define	AT_STATUS	0x07	/* status/command register		*/
55#define	AT_CMD		0x07	/* status/command register		*/
56
57/*
58 * port offsets from base address ioaddr2
59 */
60#define	AT_ALTSTATUS	0x0E	/* alternate status (read)		*/
61#define	AT_DEVCTL	0x0E	/* device control (write)		*/
62#define	AT_DRVADDR	0x0F	/* drive address (read)			*/
63
64
65/*
66 *	Device control register
67 */
68
69#define	AT_NIEN		0x02	/* disable interrupts			*/
70#define	AT_SRST		0x04	/* controller reset			*/
71#define	AT_DEVCTL_D3	0x08	/* bit 3 is always set, see spec */
72
73#define	ENABLE_INTERRUPT	AT_DEVCTL_D3	/* clear AT_NIEN bit 	*/
74#define	DISABLE_INTERRUPT	AT_DEVCTL_D3|AT_NIEN
75
76/*
77 * Status bits from AT_STATUS register
78 */
79#define	ATS_BSY		0x80	/* controller busy			*/
80#define	ATS_DRDY	0x40	/* drive ready				*/
81#define	ATS_DWF		0x20	/* write fault				*/
82#define	ATS_DSC		0x10	/* seek operation complete		*/
83#define	ATS_DRQ		0x08	/* data request				*/
84#define	ATS_CORR	0x04	/* ECC correction applied		*/
85#define	ATS_IDX		0x02	/* disk revolution index		*/
86#define	ATS_ERR		0x01	/* error flag				*/
87
88/*
89 * Status bits from AT_ERROR register
90 */
91#define	ATE_AMNF	0x01	/* address mark not found		*/
92#define	ATE_TKONF	0x02	/* track 0 not found			*/
93#define	ATE_ABORT	0x04	/* aborted command			*/
94#define	ATE_IDNF	0x10	/* ID not found				*/
95#define	ATE_UNC		0x40	/* uncorrectable data error		*/
96#define	ATE_BBK		0x80	/* bad block detected			*/
97
98/*
99 * Drive selectors for AT_DRVHD register
100 */
101#define	ATDH_DRIVE0	0xa0	/* or into AT_DRVHD to select drive 0	*/
102#define	ATDH_DRIVE1	0xb0	/* or into AT_DRVHD to select drive 1	*/
103
104/*
105 * ATA commands.
106 */
107#define	ATC_DIAG	0x90	/* diagnose command			*/
108#define	ATC_RECAL	0x10	/* restore cmd, bottom 4 bits step rate	*/
109#define	ATC_SEEK	0x70	/* seek cmd, bottom 4 bits step rate	*/
110#define	ATC_RDVER	0x40	/* read verify cmd			*/
111#define	ATC_RDSEC	0x20	/* read sector cmd			*/
112#define	ATC_RDLONG	0x23	/* read long without retry		*/
113#define	ATC_WRSEC	0x30	/* write sector cmd			*/
114#define	ATC_SETMULT	0xc6	/* set multiple mode			*/
115#define	ATC_RDMULT	0xc4	/* read multiple			*/
116#define	ATC_WRMULT	0xc5	/* write multiple			*/
117#define	ATC_FORMAT	0x50	/* format track command			*/
118#define	ATC_SETPARAM	0x91	/* set parameters command		*/
119#define	ATC_READPARMS	0xec	/* Read Parameters command		*/
120#define	ATC_READDEFECTS	0xa0	/* Read defect list			*/
121#define	ATC_SET_FEAT	0xef	/* set features				*/
122#define	ATC_IDLE_IMMED	0xe1	/* idle immediate			*/
123#define	ATC_STANDBY_IM	0xe0	/* standby immediate			*/
124#define	ATC_ACK_MC	0xdb	/* acknowledge media change		*/
125#define	ATC_DOOR_LOCK	0xde	/* door lock				*/
126#define	ATC_DOOR_UNLOCK	0xdf	/* door unlock				*/
127#define	ATC_PI_SRESET	0x08    /* ATAPI soft reset			*/
128#define	ATC_PI_ID_DEV	0xa1	/* ATAPI identify device		*/
129#define	ATC_PI_PKT	0xa0	/* ATAPI packet command 		*/
130
131/*
132 * ata device type
133 */
134#define	ATA_DEV_NONE	0
135#define	ATA_DEV_DISK	1
136#define	ATA_DEV_12	2 /* atapi 1.2 spec unit */
137#define	ATA_DEV_17	3 /* atapi 1.7B spec unit */
138
139/*
140 * write into config. opt. reg to configure level interrupt and
141 * I/O mapped addressing.
142 */
143#define	LEVEL_MODE_IO_MAP	0x41
144
145
146/*
147 * Low bits for Read/Write commands...
148 */
149#define	ATCM_ECCRETRY	0x01	/* Enable ECC and RETRY by controller	*/
150				/* enabled if bit is CLEARED!!!		*/
151#define	ATCM_LONGMODE	0x02	/* Use Long Mode (get/send data & ECC)	*/
152				/* enabled if bit is SET!!!		*/
153
154/*
155 * direction bits
156 * for ac_direction
157 */
158#define	AT_NO_DATA	0		/* No data transfer */
159#define	AT_OUT		1		/* for writes */
160#define	AT_IN		2		/* for reads */
161
162/*
163 * status bits for ab_ctl_status
164 */
165#define	ATA_ONLINE	0
166#define	ATA_OFFLINE	1
167#define	ATA_PRESENT	2
168
169#define	B_PASSTHRU	0x1000000
170
171/*
172 * timeout and timing parameters
173 *
174 */
175#define	MS2HZ(time)		drv_usectohz(time * 1000)
176#define	PCATA_READY_TIMEOUT	(MS2HZ(6000))  /* card ready */
177#define	PCATA_READYWAIT_TIMEOUT	(MS2HZ(8000))	/* wait for ready in open */
178
179/* for non attached driver or when instance is unknown */
180#define	PCATA_BIO_TIMEOUT1	(MS2HZ(100))	/* sometimes we need it fast */
181
182/* for attached driver or when instance is known */
183#define	PCATA_BIO_TIMEOUT2	(MS2HZ(200))	/* pcata bio timeout */
184
185/* for non attached driver or when instance is unknown */
186#define	PCATA_BIOTIMEOUT_CNT1	10		/* maximum of 10 pkts id */
187
188/* for attached driver or when instance is known */
189#define	PCATA_BIOTIMEOUT_CNT2	40		/* maximum of 40 pkts id */
190
191#define	PCATA_DRIVESETUP_TIMEOUT MS2HZ(1000)	/* drive setup timeout */
192#define	PCATA_DRIVESETUP_CNT	2		/* only two instances for now */
193
194struct ata_cmpkt {
195	struct ata_cmpkt *pkt_forw; 	/* link in chain of packets */
196
197	struct ata_unit	*cp_ctl_private; /* link to struct ata_unit	*/
198	struct	buf	*cp_bp;		/* link to buf structure	*/
199	caddr_t		ac_start_v_addr; /* start memory I/O address	*/
200	daddr_t		cp_srtsec;	/* starting sector number	*/
201	int		cp_bytexfer;	/* bytes xfer in this operation */
202
203	char		ac_cdb;		/* target driver command	*/
204	char		ac_scb;		/* controller status aft cmd	*/
205	ushort_t	ac_flags;	/* controller flags		*/
206
207	int		ac_bytes_per_block; /* blk mode factor per xfer	*/
208	caddr_t		ac_v_addr;	/* I/O should be done to/from 	*/
209
210	int		cp_resid;	/* data bytes not transferred	*/
211	int		cp_reason;	/* error status */
212	int		cp_flags;
213	void		*cp_passthru;
214	char		ac_direction;	/* AT_IN - read AT_OUT - write	*/
215	int		cp_retry;
216	/*
217	 * task file registers setting
218	 */
219					/* sec count in ac_pkt		*/
220#ifdef NOT_USED
221	uchar_t		ac_devctl;
222	uchar_t		ac_sec;
223	uchar_t		ac_count;
224	uchar_t		ac_lwcyl;
225	uchar_t		ac_hicyl;
226	uchar_t		ac_hd;
227#endif
228	uchar_t		ac_cmd;
229
230	/*
231	 * error status
232	 */
233	uchar_t		ac_error;
234	uchar_t		ac_status;
235};
236
237
238
239
240/*	structure of 'Read Parameters' command 				*/
241struct atarpbuf {
242/*  					WORD				*/
243/* 					OFFSET COMMENT			*/
244	ushort_t atarp_config;		/*  0 general configuration bits */
245	ushort_t atarp_fixcyls;		/*  1 # of fixed cylinders */
246	ushort_t atarp_remcyls;		/*  2 # of removable cylinders */
247	ushort_t atarp_heads;		/*  3 # of heads */
248	ushort_t atarp_trksiz;		/*  4 # of unformatted bytes/track */
249	ushort_t atarp_secsiz;		/*  5 # of unformatted bytes/sector */
250	ushort_t atarp_sectors;		/*  6 # of sectors/track */
251	ushort_t atarp_resv1[3];	/*  7 "Vendor Unique" */
252	char	atarp_drvser[20];	/* 10 Serial number */
253	ushort_t atarp_buftype;		/* 20 Buffer type */
254	ushort_t atarp_bufsz;		/* 21 Buffer size in 512 byte incr */
255	ushort_t atarp_ecc;		/* 22 # of ecc bytes avail on rd/wr */
256	char	atarp_fw[8];		/* 23 Firmware revision */
257	char	atarp_model[40];	/* 27 Model # */
258	ushort_t atarp_mult1;		/* 47 Multiple command flags */
259	ushort_t atarp_dwcap;		/* 48 Doubleword capabilities */
260	ushort_t atarp_cap;		/* 49 Capabilities */
261	ushort_t atarp_resv2;		/* 50 Reserved */
262	ushort_t atarp_piomode;		/* 51 PIO timing mode */
263	ushort_t atarp_dmamode;		/* 52 DMA timing mode */
264	ushort_t atarp_validinfo;	/* 53 bit0: wds 54-58, bit1: 64-70 */
265	ushort_t atarp_curcyls;		/* 54 # of current cylinders */
266	ushort_t atarp_curheads;	/* 55 # of current heads */
267	ushort_t atarp_cursectrk;	/* 56 # of current sectors/track */
268	ushort_t atarp_cursccp[2];	/* 57 current sectors capacity */
269	ushort_t atarp_mult2;		/* 59 multiple sectors info */
270	ushort_t atarp_addrsec[2];	/* 60 LBA only: no of addr secs */
271	ushort_t atarp_sworddma;	/* 62 single word dma modes */
272	ushort_t atarp_dworddma;	/* 63 double word dma modes */
273	ushort_t atarp_advpiomode;	/* 64 advanced PIO modes supported */
274	ushort_t atarp_minmwdma;	/* 65 min multi-word dma cycle info */
275	ushort_t atarp_recmwdma;	/* 66 rec multi-word dma cycle info */
276	ushort_t atarp_minpio;		/* 67 min PIO cycle info */
277	ushort_t atarp_minpioflow;	/* 68 min PIO cycle info w/flow ctl */
278};
279
280/*	direct coupled disk driver command				*/
281#define	DCMD_READ	1	/* Read Sectors/Blocks			*/
282#define	DCMD_WRITE	2	/* Write Sectors/Blocks			*/
283#define	DCMD_FMTTRK	3	/* Format Track				*/
284#define	DCMD_FMTDRV	4	/* Format entire drive			*/
285#define	DCMD_RECAL	5	/* Recalibrate				*/
286#define	DCMD_SEEK	6	/* Seek to Cylinder			*/
287#define	DCMD_RDVER	7	/* Read Verify sectors on disk		*/
288#define	DCMD_GETDEF	8	/* Read manufacturers defect list	*/
289
290/*	driver error code						*/
291#define	DERR_SUCCESS	0	/* success				*/
292#define	DERR_AMNF	1	/* address mark not found		*/
293#define	DERR_TKONF	2	/* track 0 not found			*/
294#define	DERR_ABORT	3	/* aborted command			*/
295#define	DERR_DWF	4	/* write fault				*/
296#define	DERR_IDNF	5	/* ID not found				*/
297#define	DERR_BUSY	6	/* drive busy				*/
298#define	DERR_UNC	7	/* uncorrectable data error		*/
299#define	DERR_BBK	8	/* bad block detected			*/
300#define	DERR_INVCDB	9	/* invalid cdb				*/
301
302/*	reason code for completion status				*/
303#define	CPS_SUCCESS	0		/* command completes with no err */
304#define	CPS_FAILURE	1		/* command fails		*/
305#define	CPS_CHKERR	2		/* command fails with status	*/
306#define	CPS_ABORTED	3		/* command aborted		*/
307
308/*	flags definitions						*/
309#define	CPF_NOINTR	0x0001		/* polling mode			*/
310
311
312/*	debug	definitions 						*/
313#ifdef ATA_DEBUG
314
315#define	DENT	0x0001
316#define	DPKT	0x0002
317#define	DIO	0x0004
318#define	DDAT	0x0008
319#define	DPCM	0x0010
320#define	DLBL	0x0020			/* disk label routines		*/
321#define	DINT	0x0040
322#define	DINIT	0x0080
323#define	DOPEN	0x0100
324#define	DMKDEV	0x0200			/* creation of devices		*/
325#define	DERR	0x0400			/* Error Condition		*/
326#define	DMUTEX	0x0800			/* mutex entry/exit		*/
327#define	DVOLD	0x1000			/* volmgt debug			*/
328#endif /* ATA_DEBUG */
329
330
331/*
332 * misc	definition
333 */
334#define	ATA_LOOP_CNT	10000	/* for looping on registers */
335#define	DDI_XSUSPEND	1
336#define	DDI_XRESUME	2
337#define	CFLAG_ERROR	1
338#define	CFLAG_FREE	2
339#define	CTL_SEND_FAILURE	1
340#define	CTL_SEND_SUCCESS	0
341#define	RETRY_CNT	10
342#define	PCATA_GO_RETRY	1
343#define	PCATA_WAIT_CNT	100
344#define	ROUNDUP(a, n)	(((a) + ((n) - 1)) & ~((n) - 1))
345#define	LPART(dev)	(((getminor(dev) & 0x1F) % NUM_PARTS))
346#define	PCIDE_OUTB(a, b, c)	csx_Put8(a, b, c);\
347				drv_usecwait(5);
348
349/*
350 * XXX/lcl - LPART uses 5 bits, shouldn't unit shift right 5?
351 * also UNIT seems to be incompatible with PCATA_SETMINOR
352 * also in sysmacros.h O_MAXMIN seems to be 0xff which means << 10 is bad
353 */
354#define	UNIT(dev)	(getminor(dev)>>2 &1)
355
356#define	PCATA_SOCKET(dev)		((getminor(dev) >> 10) & 0x3f)
357#define	PCATA_SETMINOR(skt, part)	((skt<<10) | (part))
358
359#define	MAX_SLICES	16
360#define	NUM_PARTS	(MAX_SLICES + FD_NUMPART + 1)
361#define	PCATA_NAME	"pcata"
362#define	FDISK_OFFSET	MAX_SLICES	/* vtoc slice 16 == fdisk partition 0 */
363#if defined(_SUNOS_VTOC_16)
364#define	VTOC_OFFSET	1
365#elif defined(_SUNOS_VTOC_8)
366#define	VTOC_OFFSET	0
367#else
368#error No VTOC format defined.
369#endif
370#define	USLICE_WHOLE	2
371
372typedef struct	{
373	kmutex_t		mutex;
374	struct dk_label		ondsklbl;
375	struct partition	pmap[NUM_PARTS];
376	struct dk_map		un_map[NDKMAP];	/* logical partitions */
377	int			fdiskpresent;	/* fdisk present	*/
378	int			uidx;		/* UNIX partition number */
379	} dsk_label_t;
380
381/*
382 * linked list of drives on this controller
383 */
384typedef struct ata_unit {
385	struct ata_soft	*a_blkp;	/* controller structure */
386
387	uchar_t		au_targ;
388	uchar_t		au_drive_bits;
389	uchar_t		au_ctl_bits;
390	int		au_cyl;		/* cylinders */
391	int		au_acyl;	/* alternate cylinders */
392	int		au_hd;
393	int		au_sec;
394	int		au_blksz;
395	short		au_block_factor;
396	short		au_bytes_per_block;
397	uchar_t		au_rd_cmd;
398	uchar_t		au_wr_cmd;
399	buf_t		*un_sbufp;
400	struct atarpbuf *au_rpbuf;
401
402	struct ata_unit	*a_forw;	/* linked list for all ata's 	*/
403	dsk_label_t	lbl;		/* per targer label information */
404} ata_unit_t;
405
406/*
407 * pcata_cftable_t and pcata_cftable_params_t structures are used
408 *	to store values from the CISTPL_CFTABLE_ENTRY tuples.
409 */
410typedef struct pcata_cftable_params_t {
411	uchar_t		config_index;
412	uint32_t	addr_lines;	/* IO addr lines decoded */
413	uint32_t	ata_length[2];	/* length of first IO range */
414	uint32_t	pin;		/* PRR bits valid mask */
415	uint32_t	ata_vcc;
416	uint32_t	ata_vpp1;
417	uint32_t	ata_vpp2;
418	uint32_t	ata_base[2];	/* base of IO range ata registers */
419	int		ranges;		/* number of IO range		*/
420} pcata_cftable_params_t;
421
422typedef struct pcata_cftable_t {
423	uint32_t		desireability;	/* desireability factor */
424	pcata_cftable_params_t	p;		/* parameters */
425	struct pcata_cftable_t	*prev;
426	struct pcata_cftable_t	*next;
427} pcata_cftable_t;
428
429
430
431typedef struct pcata_cis_vars_t {
432	uint32_t	present;	/* config register present flags */
433	uint32_t	pin;		/* PRR bits valid mask */
434	char		prod_strings[CISTPL_VERS_1_MAX_PROD_STRINGS]
435					[CIS_MAX_TUPLE_DATA_LEN];
436	uint32_t	major_revision;	/* card major revision level */
437	uint32_t	minor_revision;	/* card minor revision level */
438	uint32_t	manufacturer_id; /* manufacturer ID */
439	uint32_t	card_id;	/* card ID */
440	uint32_t	config_base;	/* base offset of config registers */
441	uint32_t	ata_base[2];	/* base offset of ata registers */
442	uint32_t	ata_length[2];
443	uchar_t		config_index;
444	uint32_t	addr_lines;	/* number of IO addr lines decoded */
445	/* misc card requirements */
446	uint32_t	ata_vcc;
447	uint32_t	ata_vpp1;
448	uint32_t	ata_vpp2;
449	pcata_cftable_t	cftable;	/* active CFTABLE_ENTRY values */
450} pcata_cis_vars_t;
451
452typedef struct pcata_biotimeout {
453	timeout_id_t    timeout_id;
454	buf_t		*bp;
455} pcata_biotimeout_t;
456
457#define	ATA_MAXDRIVE	8
458
459/*
460 * soft state structure
461 */
462typedef struct ata_soft  {
463	int 		flags;		/* misc state info		*/
464	int 		sn;		/* socket number		*/
465
466	enum dkio_state	media_state;	/* up-to-date media state	*/
467	int		checkmedia_flag;
468	int		ejected_media_flag;
469
470	int		instance;	/* instantiation of ourselves	*/
471	struct	buf	*crashbuf;	/* dumping to root device	*/
472	uint32_t	card_state;	/* like it says			*/
473	int		ejected_while_mounted;
474	int		chr_open;	/* open in character mode	*/
475	int		blk_open;	/* open in block mode		*/
476	int		lyr_open[NUM_PARTS]; /* open in layered mode 	*/
477	client_handle_t	client_handle;	/* client handle for socket	*/
478	acc_handle_t	handle;		/* pcata registers handle	*/
479	ddi_iblock_cookie_t soft_blk_cookie;	/* soft intr cookie	*/
480	ddi_softintr_t	softint_id;
481	timeout_id_t	ready_timeout_id;
482	timeout_id_t	readywait_timeout_id;
483	dev_info_t	*dip;		/* pointer to device node	*/
484	kmutex_t	hi_mutex;	/* protect hi-level interrupt	*/
485	kmutex_t	ata_mutex;
486	kmutex_t	event_hilock;	/* protects hi-level events	*/
487			/*
488			 * wait for cv_broadcast of condvar_mediastate
489			 * in pcata_check_media
490			 */
491	kcondvar_t	condvar_mediastate; /* for DKIOCSTATE ioctl()   */
492	kcondvar_t	readywait_cv;
493	pcata_cis_vars_t cis_vars; 	/* saved things ATA's CIS	*/
494	int		intr_pending;	/* an interrupt is pending	*/
495	int		softint_pending;
496	int		write_in_progress;
497	uint32_t	flash;
498	struct ata_unit	*ab_link;	/* linked units			*/
499	struct ata_cmpkt *ab_active;	/* outstanding requests		*/
500	kmutex_t 	ab_mutex;
501	void		*ab_lkarg;
502	ushort_t	ab_status_flag;
503	ushort_t	ab_resv;
504
505	/*
506	 * Even though we can only have 2 targets, we need 8 slots
507	 * for the generic code
508	 */
509	struct atarpbuf	*ab_rpbp[ATA_MAXDRIVE];
510	uchar_t		ab_dev_type[ATA_MAXDRIVE];
511	dev_info_t	*ab_dip;
512	/*
513	 * port addresses associated with ioaddr1
514	 */
515	uint32_t	ab_data;	/* data register 		*/
516	uint32_t	ab_error;	/* error register (read)	*/
517	uint32_t	ab_feature;	/* features (write)		*/
518	uint32_t	ab_count;	/* sector count 		*/
519	uint32_t	ab_sect;	/* sector number 		*/
520	uint32_t	ab_lcyl;	/* cylinder low byte 		*/
521	uint32_t	ab_hcyl;	/* cylinder high byte 		*/
522	uint32_t	ab_drvhd;	/* drive/head register 		*/
523	uint32_t	ab_status;	/* status/command register 	*/
524	uint32_t	ab_cmd;		/* status/command register 	*/
525
526	/*
527	 * port addresses associated with ioaddr2
528	 */
529	uint32_t	ab_altstatus;	/* alternate status (read)	*/
530	uint32_t	ab_devctl;	/* device control (write)	*/
531	uint32_t	ab_drvaddr;	/* drive address (read)		*/
532
533	int		ab_block_factor[2]; /* hold dev blk factor 	*/
534				/* until unit structure is alloc	*/
535	uchar_t		ab_rd_cmd[2];	/* hold read command until	*/
536					/* unit structure is alloc	*/
537	uchar_t		ab_wr_cmd[2];	/* hold write command until	*/
538					/* unit structure is alloc	*/
539	int		ab_max_transfer;
540
541	struct ata_cmpkt *ab_head;	/* linked list of I/O requests	*/
542	struct ata_cmpkt *ab_last;
543	kmutex_t	label_mutex;	/* protect dsk_label_t		*/
544} ata_soft_t;
545
546
547/*
548 * flags in ata_soft.flags field
549 */
550#define	PCATA_DIDLOCKS		0x00000001	/* cv/mutex_init in attach */
551#define	PCATA_REGCLIENT		0x00000002	/* RegisterClient is OK */
552#define	PCATA_REQSOCKMASK	0x00000004	/* RequestSocketMask is OK */
553#define	PCATA_SOFTINTROK	0x00000008	/* added to interrupt chain */
554#define	PCATA_ATTACHOK		0x00000010	/* made it through attach(OK) */
555#define	PCATA_REQUESTIO		0x00000020	/* did RequestIO */
556#define	PCATA_REQUESTIRQ	0x00000040	/* did RequestIRQ */
557#define	PCATA_REQUESTCONFIG	0x00000080	/* did RequestConfiguration */
558#define	PCATA_MAKEDEVICENODE	0x00000100	/* did MakeDeviceNode */
559#define	PCATA_SUSPENDED		0x00000200	/* device is suspended ? */
560#define	PCATA_READY		0x00000400	/* device is ready to be used */
561#define	PCATA_VALID_IO_INFO	0x00000800	/* have valid IO info frm CIS */
562#define	PCATA_DIDLOCKS2		0x00001000	/* cv/mutex_init in attach */
563#define	PCATA_LABELLOCK		0x00002000	/* Disk label lock */
564#define	PCATA_DIDLOCKS3		0x00004000	/* ata_mutex initialized */
565
566/*
567 * flags in card_state field
568 */
569#define	PCATA_CARD_INSERTED	0x00000001	/* card is here */
570#define	PCATA_WAIT_FOR_READY	0x00000002	/* waiting for card ready */
571#define	PCATA_CARD_IS_READY	0x00000004	/* card is ready */
572#define	PCATA_READY_WAIT	0x00000008	/* waiting for READY */
573#define	PCATA_HAS_WINDOW	0x00000010	/* we have a register window */
574#define	PCATA_WAITINIT		0x00000020	/* initialization in progress */
575
576#define	CARD_PRESENT_VALID(pm)	((pm)->card_state & PCATA_CARD_INSERTED)
577
578/*
579 * UNTIMEOUT() macro to make sure we're not trying untimeout a bogus timeout
580 */
581#define	UNTIMEOUT(utt)	{		\
582	if (utt) {			\
583		(void) untimeout(utt);	\
584		utt = 0;		\
585	}				\
586}
587
588/*
589 * global variables
590 */
591/*
592 * linkage to soft state structures by instance (see ddi_get_soft_state)
593 */
594extern	void			*pcata_soft;
595extern	char			*pcata_name;
596extern	int			pcata_debug;
597extern	struct cb_ops		pcata_cb_ops;
598
599/*
600 * pcata.c
601 */
602int pcata_event(event_t event, int priority, event_callback_args_t *eca);
603int pcata_card_removal(ata_soft_t *softp, int priority);
604int pcata_parse_cis(ata_soft_t *softp, pcata_cftable_t **cftable);
605void pcata_destroy_cftable_list(pcata_cftable_t **cftable);
606char	*pcata_CS_etext(int ret);
607int pcata_readywait(ata_soft_t *softp);
608void pcata_minor_wait(ata_soft_t *softp);
609int pcata_getinfo(dev_info_t *dip, ddi_info_cmd_t cmd, void *arg,
610	void **result);
611
612/*
613 * pcide.c
614 */
615int _init(void);
616int _fini(void);
617int _info(struct modinfo *modinfop);
618int pcata_start(ata_unit_t *, buf_t *, int);
619int pcata_intr_hi(ata_soft_t *softp);
620uint32_t pcata_intr(char *softp);
621int pcata_getedt(ata_soft_t *ata_blkp, int dmax);
622void pcata_byte_swap(char *buf, int n);
623int pcata_set_rw_multiple(ata_soft_t *ata_blkp, int drive);
624void pcata_min(buf_t *bp);
625int pcata_spinup(ata_soft_t *softp, int slot);
626
627/*
628 * pcdisk.c
629 */
630int pcata_strategy(buf_t *bp);
631int pcata_ioctl(dev_t dev, int cmd, intptr_t arg, int flag, cred_t *cred_p,
632	int *rval_p);
633int pcata_lbl_ioctl(dev_t dev, int cmd, intptr_t arg, int flag);
634int pcata_open(dev_t *dev_p, int flag, int otyp, cred_t *cred_p);
635int pcata_close(dev_t dev, int flag, int otyp, cred_t *cred_p);
636int pcata_update_vtoc(ata_soft_t *softp, dev_t dev);
637int pcata_write_dskvtoc(ata_soft_t *softp, dev_t dev, dsk_label_t *lblp,
638	struct vtoc *vtocp);
639int pcata_prop_op(dev_t dev, dev_info_t *dip, ddi_prop_op_t prop_op,
640    int mod_flags, char *name, caddr_t valuep, int *lengthp);
641
642/*
643 * pclabel.c
644 */
645int pcfdisk_parse(buf_t *bp, ata_unit_t *unitp);
646int pcfdisk_read(buf_t *bp, ata_unit_t *unitp);
647int pcdsklbl_wrvtoc(dsk_label_t *lblp, struct vtoc *vtocp, buf_t *bp);
648void pcdsklbl_ondsklabel_to_vtoc(dsk_label_t *lblp, struct vtoc *vtocp);
649void pcdsklbl_vtoc_to_ondsklabel(dsk_label_t *lblp, struct vtoc *vtocp);
650void pcdsklbl_dgtoug(struct dk_geom *up, struct dk_label *dp);
651void pcdsklbl_ugtodg(struct dk_geom *up, struct dk_label *dp);
652void pcinit_pmap(ata_unit_t *unitp);
653
654#ifdef	__cplusplus
655}
656#endif
657
658#endif /* _SYS_PCATA_H */
659