1/* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22/* 23 * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27#ifndef _SYS_IB_ADAPTERS_HERMON_IOCTL_H 28#define _SYS_IB_ADAPTERS_HERMON_IOCTL_H 29 30#include <sys/cred.h> 31 32/* 33 * hermon_ioctl.h 34 * Contains all of the prototypes, #defines, and structures necessary 35 * for all ioctl access into the driver. This includes everything 36 * necessary for updating firmware, accessing the hermon flash device, 37 * providing interfaces for VTS. 38 */ 39 40#ifdef __cplusplus 41extern "C" { 42#endif 43 44int hermon_ioctl(dev_t dev, int cmd, intptr_t arg, int mode, cred_t *credp, 45 int *rvalp); 46 47/* 48 * Enumerated type for the Hermon ioctl() interface types 49 */ 50/* 51 * originally, to make a unique set of IOCTLs but now share the actual 52 * value w/ tavor & arbel (memfree) to make VTS consistent & simpler 53 * 54 * #define HERMON_IOCTL ('h' << 8) 55 */ 56#define HERMON_IOCTL ('t' << 8) 57 58#ifdef DEBUG 59typedef enum { 60 HERMON_IOCTL_FLASH_READ = HERMON_IOCTL | 0x00, 61 HERMON_IOCTL_FLASH_WRITE = HERMON_IOCTL | 0x01, 62 HERMON_IOCTL_FLASH_ERASE = HERMON_IOCTL | 0x02, 63 HERMON_IOCTL_FLASH_INIT = HERMON_IOCTL | 0x03, 64 HERMON_IOCTL_FLASH_FINI = HERMON_IOCTL | 0x04, 65 HERMON_IOCTL_REG_WRITE = HERMON_IOCTL | 0x10, 66 HERMON_IOCTL_REG_READ = HERMON_IOCTL | 0x11, 67 HERMON_IOCTL_LOOPBACK = HERMON_IOCTL | 0x20, 68 HERMON_IOCTL_INFO = HERMON_IOCTL | 0x21, 69 HERMON_IOCTL_PORTS = HERMON_IOCTL | 0x22, 70 HERMON_IOCTL_DDR_READ = HERMON_IOCTL | 0x23, 71 HERMON_IOCTL_WRITE_BOOT_ADDR = HERMON_IOCTL | 0x24 72} hermon_ioctl_enum_t; 73#else 74typedef enum { 75 HERMON_IOCTL_FLASH_READ = HERMON_IOCTL | 0x00, 76 HERMON_IOCTL_FLASH_WRITE = HERMON_IOCTL | 0x01, 77 HERMON_IOCTL_FLASH_ERASE = HERMON_IOCTL | 0x02, 78 HERMON_IOCTL_FLASH_INIT = HERMON_IOCTL | 0x03, 79 HERMON_IOCTL_FLASH_FINI = HERMON_IOCTL | 0x04, 80 HERMON_IOCTL_LOOPBACK = HERMON_IOCTL | 0x20, 81 HERMON_IOCTL_INFO = HERMON_IOCTL | 0x21, 82 HERMON_IOCTL_PORTS = HERMON_IOCTL | 0x22, 83 HERMON_IOCTL_DDR_READ = HERMON_IOCTL | 0x23, 84 HERMON_IOCTL_WRITE_BOOT_ADDR = HERMON_IOCTL | 0x24 85} hermon_ioctl_enum_t; 86#endif /* DEBUG */ 87 88/* 89 * Specific operations for each of the flash ioctl interfaces 90 */ 91#define HERMON_FLASH_READ_SECTOR 0x01 92#define HERMON_FLASH_READ_QUADLET 0x02 93#define HERMON_FLASH_WRITE_SECTOR 0x01 94#define HERMON_FLASH_WRITE_BYTE 0x02 95#define HERMON_FLASH_ERASE_SECTOR 0x01 96#define HERMON_FLASH_ERASE_CHIP 0x02 97 98/* 99 * Default values for the flash (overridden by CFI info, if available) 100 */ 101#define HERMON_FLASH_SECTOR_SZ_DEFAULT 0x10000 102#define HERMON_FLASH_DEVICE_SZ_DEFAULT 0x400000 103#define HERMON_FLASH_SPI_LOG_SECTOR_SIZE 0x10 104#define HERMON_FLASH_SPI_SECTOR_SIZE 0x10000 105#define HERMON_FLASH_SPI_DEVICE_SIZE 0x200000 106 107/* 108 * CFI (Common Flash Interface) initialization 109 */ 110#define HERMON_FLASH_CFI_INIT 0x98 111 112/* For compatability */ 113#define HERMON_FLASH_CFI_SIZE 0x4C 114#define HERMON_FLASH_CFI_SIZE_QUADLET HERMON_FLASH_CFI_SIZE >> 2 115 116/* 117 * Expand CFI data size to support the Intel Expanded Command Set. 118 */ 119#define HERMON_CFI_INFO_SIZE 0x100 120#define HERMON_CFI_INFO_QSIZE HERMON_CFI_INFO_SIZE >> 2 121 122/* 123 * Mellanox uses two different parallel Flash devices for Hermon 124 * HCAs: the AMD AM29LV033C and the Intel 28F320J3C. The AM29LV033C 125 * utilizes the AMD Standard CFI command set while the 28F320J3C 126 * utliizes the Intel Extended CFI command set. Additionally, serial 127 * SPI flash is supported, such as the STMicroelectronics M25Pxx family 128 * of SPI Flash parts. 129 */ 130#define HERMON_FLASH_INTEL_CMDSET 0x0001 131#define HERMON_FLASH_AMD_CMDSET 0x0002 132#define HERMON_FLASH_SPI_CMDSET 0x0003 133#define HERMON_FLASH_UNKNOWN_CMDSET 0XFFFF 134 135/* 136 * The firmware version structure used in HERMON_IOCTL_INFO and 137 * HERMON_IOCTL_FLASH_INIT interfaces. The structure consists of major, 138 * minor and subminor portions for firmware revision number. 139 */ 140typedef struct hermon_fw_info_ioctl_s { 141 uint32_t afi_maj; 142 uint32_t afi_min; 143 uint32_t afi_sub; 144} hermon_fw_info_ioctl_t; 145 146/* 147 * structure used for read, write, and erase flash routines 148 * Supported fields for each type: 149 * read_sector: af_type, af_sector, af_sector_num 150 * read_quadlet: af_type, af_addr, af_quadlet 151 * write_sector: af_type, af_sector, af_sector_num 152 * write_byte: af_type, af_addr, af_byte 153 * erase_sector: af_type, af_sector_num 154 * erase_chip: af_type 155 * 156 * The 'tf_sector' field must point to a sector sized portion of memory, as 157 * all sector read/write ioctl calls are done as one complete sector only. 158 */ 159typedef struct hermon_flash_ioctl_s { 160 uint32_t af_type; 161 caddr_t af_sector; 162 uint32_t af_sector_num; 163 uint32_t af_addr; 164 uint32_t af_quadlet; 165 uint8_t af_byte; 166} hermon_flash_ioctl_t; 167 168/* Structure used for flash init interface */ 169typedef struct hermon_flash_init_ioctl_s { 170 uint32_t af_hwrev; 171 hermon_fw_info_ioctl_t af_fwrev; 172 uint32_t af_cfi_info[HERMON_FLASH_CFI_SIZE_QUADLET]; 173 char af_hwpn[64]; 174 int af_pn_len; 175} hermon_flash_init_ioctl_t; 176 177/* 178 * The structure used for Hermon register read/write interface. 179 * The "trg_reg_set" field indicates the register set (the BAR) from which 180 * the access is desired (HERMON_CMD_BAR, HERMON_UAR_BAR, or HERMON_DDR_BAR). 181 * The "trg_offset" and "trg_data" fields indicate the register and either 182 * the destination or source of the data to be read/written. 183 */ 184typedef struct hermon_reg_ioctl_s { 185 uint_t arg_reg_set; 186 uint_t arg_offset; 187 uint32_t arg_data; 188} hermon_reg_ioctl_t; 189 190 191/* 192 * Hermon VTS IOCTL revision number. This revision number is currently 193 * expected to be passed in all Hermon VTS ioctl interfaces. 194 */ 195#define HERMON_VTS_IOCTL_REVISION 1 196 197/* 198 * The port structure used in HERMON_IOCTL_PORTS interface. 199 * Each port has an associated guid, port number, and IBA-defined 200 * logical port state. 201 */ 202typedef struct hermon_stat_port_ioctl_s { 203 uint64_t asp_guid; 204 uint32_t asp_port_num; 205 uint32_t asp_state; 206} hermon_stat_port_ioctl_t; 207 208/* 209 * The structure used for the HERMON_IOCTL_PORTS interface. 210 * The number of ports and a buffer large enough for 256 211 * port structures will be supplied by the caller. The 212 * revision should be set to HERMON_VTS_IOCTL_REVISION. The 213 * number of ports ("tp_num_ports") is always returned, 214 * regardless of success or failure otherwise. 215 */ 216typedef struct hermon_ports_ioctl_s { 217 uint_t ap_revision; 218 hermon_stat_port_ioctl_t *ap_ports; 219 uint8_t ap_num_ports; 220} hermon_ports_ioctl_t; 221 222/* 223 * These are the status codes that can be returned by the 224 * HERMON_IOCTL_LOOPBACK test. They are returned as part of 225 * the hermon_loopback_ioctl_t struct (below). 226 */ 227typedef enum { 228 HERMON_LOOPBACK_SUCCESS, 229 HERMON_LOOPBACK_INVALID_REVISION, 230 HERMON_LOOPBACK_INVALID_PORT, 231 HERMON_LOOPBACK_PROT_DOMAIN_ALLOC_FAIL, 232 HERMON_LOOPBACK_SEND_BUF_INVALID, 233 HERMON_LOOPBACK_SEND_BUF_MEM_REGION_ALLOC_FAIL, 234 HERMON_LOOPBACK_SEND_BUF_COPY_FAIL, 235 HERMON_LOOPBACK_RECV_BUF_MEM_REGION_ALLOC_FAIL, 236 HERMON_LOOPBACK_XMIT_SEND_CQ_ALLOC_FAIL, 237 HERMON_LOOPBACK_XMIT_RECV_CQ_ALLOC_FAIL, 238 HERMON_LOOPBACK_XMIT_QP_ALLOC_FAIL, 239 HERMON_LOOPBACK_RECV_SEND_CQ_ALLOC_FAIL, 240 HERMON_LOOPBACK_RECV_RECV_CQ_ALLOC_FAIL, 241 HERMON_LOOPBACK_RECV_QP_ALLOC_FAIL, 242 HERMON_LOOPBACK_XMIT_QP_INIT_FAIL, 243 HERMON_LOOPBACK_XMIT_QP_RTR_FAIL, 244 HERMON_LOOPBACK_XMIT_QP_RTS_FAIL, 245 HERMON_LOOPBACK_RECV_QP_INIT_FAIL, 246 HERMON_LOOPBACK_RECV_QP_RTR_FAIL, 247 HERMON_LOOPBACK_RECV_QP_RTS_FAIL, 248 HERMON_LOOPBACK_WQE_POST_FAIL, 249 HERMON_LOOPBACK_CQ_POLL_FAIL, 250 HERMON_LOOPBACK_SEND_RECV_COMPARE_FAIL 251} hermon_loopback_error_t; 252 253/* 254 * The structure used for HERMON_IOCTL_LOOPBACK interface. 255 * It defines the port number, number of iterations, wait duration, 256 * number of retries and the data pattern to be sent. Upon return, 257 * the driver will supply the number of iterations succesfully 258 * completed, and the kind of failure (if any, along with the failing 259 * data pattern). 260 */ 261typedef struct hermon_loopback_ioctl_s { 262 uint_t alb_revision; 263 caddr_t alb_send_buf; 264 caddr_t alb_fail_buf; 265 uint_t alb_buf_sz; 266 uint_t alb_num_iter; 267 uint_t alb_pass_done; 268 uint_t alb_timeout; 269 hermon_loopback_error_t alb_error_type; 270 uint8_t alb_port_num; 271 uint8_t alb_num_retry; 272} hermon_loopback_ioctl_t; 273 274/* 275 * The structure used for the HERMON_IOCTL_INFO interface. It 276 * includes firmware version, hardware version, accessable 277 * range of adapter DDR memory, and adapter flash memory size. 278 */ 279typedef struct hermon_info_ioctl_s { 280 uint_t ai_revision; 281 hermon_fw_info_ioctl_t ai_fw_rev; 282 uint32_t ai_hw_rev; 283 uint_t ai_flash_sz; 284 uint_t rsvd1; /* DDR start */ 285 uint_t rsvd2; /* DDR end */ 286} hermon_info_ioctl_t; 287 288 289#ifdef __cplusplus 290} 291#endif 292 293#endif /* _SYS_IB_ADAPTERS_HERMON_IOCTL_H */ 294