ixgbe_osdep.h revision 9353:b9caf92a0042 
1/*
2 * CDDL HEADER START
3 *
4 * Copyright(c) 2007-2009 Intel Corporation. All rights reserved.
5 * The contents of this file are subject to the terms of the
6 * Common Development and Distribution License (the "License").
7 * You may not use this file except in compliance with the License.
8 *
9 * You can obtain a copy of the license at:
10 *      http://www.opensolaris.org/os/licensing.
11 * See the License for the specific language governing permissions
12 * and limitations under the License.
13 *
14 * When using or redistributing this file, you may do so under the
15 * License only. No other modification of this header is permitted.
16 *
17 * If applicable, add the following below this CDDL HEADER, with the
18 * fields enclosed by brackets "[]" replaced with your own identifying
19 * information: Portions Copyright [yyyy] [name of copyright owner]
20 *
21 * CDDL HEADER END
22 */
23
24/*
25 * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
26 * Use is subject to license terms.
27 */
28
29#ifndef	_IXGBE_OSDEP_H
30#define	_IXGBE_OSDEP_H
31
32#ifdef __cplusplus
33extern "C" {
34#endif
35
36#include <sys/types.h>
37#include <sys/byteorder.h>
38#include <sys/conf.h>
39#include <sys/debug.h>
40#include <sys/stropts.h>
41#include <sys/stream.h>
42#include <sys/strlog.h>
43#include <sys/kmem.h>
44#include <sys/stat.h>
45#include <sys/kstat.h>
46#include <sys/modctl.h>
47#include <sys/errno.h>
48#include <sys/ddi.h>
49#include <sys/dditypes.h>
50#include <sys/sunddi.h>
51#include <sys/pci.h>
52#include <sys/atomic.h>
53#include <sys/note.h>
54#include "ixgbe_debug.h"
55
56/* function declarations */
57struct ixgbe_hw;
58uint16_t ixgbe_read_pci_cfg(struct ixgbe_hw *, uint32_t);
59void ixgbe_write_pci_cfg(struct ixgbe_hw *, uint32_t, uint32_t);
60
61#define	usec_delay(x)		drv_usecwait(x)
62#define	msec_delay(x)		drv_usecwait(x * 1000)
63
64#define	OS_DEP(hw)		((struct ixgbe_osdep *)((hw)->back))
65
66#define	false		B_FALSE
67#define	true		B_TRUE
68
69#define	IXGBE_READ_PCIE_WORD 	ixgbe_read_pci_cfg
70#define	IXGBE_WRITE_PCIE_WORD 	ixgbe_write_pci_cfg
71#define	CMD_MEM_WRT_INVALIDATE	0x0010	/* BIT_4 */
72#define	PCI_COMMAND_REGISTER	0x04
73#define	PCI_EX_CONF_CAP		0xE0
74#define	MAX_NUM_UNICAST_ADDRESSES 0x10
75#define	MAX_NUM_MULTICAST_ADDRESSES 0x1000
76#define	SPEED_10GB		10000
77#define	SPEED_1GB		1000
78#define	SPEED_100		100
79#define	FULL_DUPLEX		2
80
81#define	IXGBE_WRITE_FLUSH(a)	(void) IXGBE_READ_REG(a, IXGBE_STATUS)
82
83#define	IXGBE_WRITE_REG(a, reg, value)	\
84	ddi_put32((OS_DEP(a))->reg_handle, \
85	    (uint32_t *)((uintptr_t)(a)->hw_addr + reg), (value))
86
87#define	IXGBE_READ_REG(a, reg)	\
88	ddi_get32((OS_DEP(a))->reg_handle, \
89	    (uint32_t *)((uintptr_t)(a)->hw_addr + reg))
90
91#define	IXGBE_WRITE_REG64(hw, reg, value)	\
92	do {								\
93		IXGBE_WRITE_REG(hw, reg, (u32) value);			\
94		IXGBE_WRITE_REG(hw, reg + 4, (u32) (value >> 32));	\
95		_NOTE(CONSTCOND)					\
96	} while (0)
97
98#define	msec_delay_irq	msec_delay
99#define	IXGBE_HTONL	htonl
100
101#define	UNREFERENCED_PARAMETER(x)	_NOTE(ARGUNUSED(x))
102
103typedef	int8_t		s8;
104typedef	int16_t		s16;
105typedef	int32_t		s32;
106typedef	int64_t		s64;
107typedef uint8_t		u8;
108typedef	uint16_t 	u16;
109typedef	uint32_t	u32;
110typedef	uint64_t	u64;
111typedef boolean_t	bool;
112
113struct ixgbe_osdep {
114	ddi_acc_handle_t reg_handle;
115	ddi_acc_handle_t cfg_handle;
116	struct ixgbe *ixgbe;
117};
118
119#ifdef __cplusplus
120}
121#endif
122
123#endif	/* _IXGBE_OSDEP_H */
124