1/*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22/*
23 * Copyright 2008 Sun Microsystems, Inc.  All rights reserved.
24 * Use is subject to license terms.
25 */
26
27#ifndef _HPI_PFC_H
28#define	_HPI_PFC_H
29
30#pragma ident	"%Z%%M%	%I%	%E% SMI"
31
32#ifdef __cplusplus
33extern "C" {
34#endif
35
36#include <hpi.h>
37#include <hxge_common.h>
38#include <hxge_pfc_hw.h>
39#include <hxge_pfc.h>
40
41typedef enum _tcam_op {
42	TCAM_RWC_STAT	= 0x1,
43	TCAM_RWC_MATCH	= 0x2
44} tcam_op_t;
45
46/*
47 * HPI PFC ERROR Codes
48 */
49#define	HPI_PFC_BLK_CODE	PFC_BLK_ID << 8
50#define	HPI_PFC_ERROR		(HPI_FAILURE | HPI_PFC_BLK_CODE)
51#define	HPI_TCAM_ERROR		0x10
52#define	HPI_FCRAM_ERROR		0x20
53#define	HPI_GEN_PFC		0x30
54#define	HPI_PFC_SW_PARAM_ERROR	0x40
55#define	HPI_PFC_HW_ERROR	0x80
56
57#define	HPI_PFC_RESET_ERROR	(HPI_PFC_ERROR | HPI_GEN_PFC | RESET_FAILED)
58#define	HPI_PFC_TCAM_WR_ERROR		\
59	(HPI_PFC_ERROR | HPI_TCAM_ERROR | WRITE_FAILED)
60#define	HPI_PFC_ASC_RAM_RD_ERROR	\
61	(HPI_PFC_ERROR | HPI_TCAM_ERROR | READ_FAILED)
62#define	HPI_PFC_ASC_RAM_WR_ERROR	\
63	(HPI_PFC_ERROR | HPI_TCAM_ERROR | WRITE_FAILED)
64
65#define	TCAM_CLASS_INVALID		\
66	(HPI_PFC_SW_PARAM_ERROR | 0xb)
67/* have only 0xc, 0xd, 0xe and 0xf left for sw error codes */
68#define	HPI_PFC_TCAM_HW_ERROR		\
69	(HPI_PFC_ERROR | HPI_PFC_HW_ERROR | HPI_TCAM_ERROR)
70
71#define	PFC_N_VLAN_MEMBERS		0x20
72
73#define	PFC_N_MAC_ADDRESSES		16
74#define	PFC_MAX_DMA_CHANNELS		4
75#define	PFC_MAC_ADDR_STEP		8
76
77#define	PFC_HASH_STEP			0x08
78
79#define	PFC_L2_CLASS_CONFIG_STEP	0x08
80
81#define	PFC_L3_CLASS_CONFIG_STEP	0x08
82
83#define	PFC_N_TCAM_ENTRIES		42
84
85#define	PFC_VLAN_REG_OFFSET(vlan_id) \
86	((((vlan_id_t)(vlan_id / PFC_N_VLAN_MEMBERS)) * 8) + PFC_VLAN_TABLE)
87#define	PFC_VLAN_BIT_OFFSET(vlan_id) \
88	(vlan_id % PFC_N_VLAN_MEMBERS)
89#define	PFC_MAC_ADDRESS(slot) \
90	((slot * PFC_MAC_ADDR_STEP) + PFC_MAC_ADDR)
91#define	PFC_MAC_ADDRESS_MASK(slot) \
92	((slot * PFC_MAC_ADDR_STEP) + PFC_MAC_ADDR_MASK)
93#define	PFC_HASH_ADDR(slot) \
94	((slot * PFC_HASH_STEP) + PFC_HASH_TABLE)
95
96#define	PFC_L2_CONFIG(slot) \
97	((slot * PFC_L2_CLASS_CONFIG_STEP) + PFC_L2_CLASS_CONFIG)
98#define	PFC_L3_CONFIG(slot) \
99	(((slot - TCAM_CLASS_TCP_IPV4) * PFC_L3_CLASS_CONFIG_STEP) + \
100	PFC_L3_CLASS_CONFIG)
101
102typedef uint16_t vlan_id_t;
103
104/*
105 * PFC Control Register Functions
106 */
107hpi_status_t hpi_pfc_set_tcam_enable(hpi_handle_t, boolean_t);
108hpi_status_t hpi_pfc_set_l2_hash(hpi_handle_t, boolean_t);
109hpi_status_t hpi_pfc_set_tcp_cksum(hpi_handle_t, boolean_t);
110hpi_status_t hpi_pfc_set_default_dma(hpi_handle_t, uint32_t);
111hpi_status_t hpi_pfc_mac_addr_enable(hpi_handle_t, uint32_t);
112hpi_status_t hpi_pfc_mac_addr_disable(hpi_handle_t, uint32_t);
113hpi_status_t hpi_pfc_set_force_csum(hpi_handle_t, boolean_t);
114
115/*
116 * PFC vlan Functions
117 */
118hpi_status_t hpi_pfc_cfg_vlan_table_clear(hpi_handle_t);
119hpi_status_t hpi_pfc_cfg_vlan_table_entry_clear(hpi_handle_t, vlan_id_t);
120hpi_status_t hpi_pfc_cfg_vlan_table_entry_set(hpi_handle_t, vlan_id_t);
121hpi_status_t hpi_pfc_cfg_vlan_control_set(hpi_handle_t, boolean_t,
122    boolean_t, vlan_id_t);
123hpi_status_t hpi_pfc_get_vlan_parity_log(hpi_handle_t,
124    pfc_vlan_par_err_log_t *);
125
126/*
127 * PFC Mac Address Functions
128 */
129hpi_status_t hpi_pfc_set_mac_address(hpi_handle_t, uint32_t, uint64_t);
130hpi_status_t hpi_pfc_clear_mac_address(hpi_handle_t, uint32_t);
131hpi_status_t hpi_pfc_clear_multicast_hash_table(hpi_handle_t, uint32_t);
132hpi_status_t hpi_pfc_set_multicast_hash_table(hpi_handle_t, uint32_t,
133    uint64_t);
134
135/*
136 * PFC L2 and L3 Config Functions.
137 */
138hpi_status_t hpi_pfc_set_l2_class_slot(hpi_handle_t, uint16_t, boolean_t, int);
139hpi_status_t hpi_pfc_get_l3_class_config(hpi_handle_t handle, tcam_class_t slot,
140    tcam_key_cfg_t *cfg);
141hpi_status_t hpi_pfc_set_l3_class_config(hpi_handle_t handle, tcam_class_t slot,
142    tcam_key_cfg_t cfg);
143
144/*
145 * PFC TCAM Functions
146 */
147hpi_status_t hpi_pfc_tcam_invalidate_all(hpi_handle_t);
148hpi_status_t hpi_pfc_tcam_entry_invalidate(hpi_handle_t, uint32_t);
149hpi_status_t hpi_pfc_tcam_entry_write(hpi_handle_t, uint32_t,
150    hxge_tcam_entry_t *);
151hpi_status_t hpi_pfc_tcam_entry_read(hpi_handle_t, uint32_t,
152    hxge_tcam_entry_t *);
153hpi_status_t hpi_pfc_tcam_asc_ram_entry_read(hpi_handle_t handle,
154    uint32_t location, uint64_t *ram_data);
155hpi_status_t hpi_pfc_tcam_asc_ram_entry_write(hpi_handle_t handle,
156    uint32_t location, uint64_t ram_data);
157hpi_status_t hpi_pfc_get_tcam_parity_log(hpi_handle_t,
158    pfc_tcam_par_err_log_t *);
159hpi_status_t hpi_pfc_get_tcam_auto_init(hpi_handle_t,
160    pfc_auto_init_t *);
161
162/*
163 * PFC TCP Control
164 */
165hpi_status_t hpi_pfc_set_tcp_control_discard(hpi_handle_t, boolean_t);
166hpi_status_t hpi_pfc_set_tcp_control_fin(hpi_handle_t, boolean_t);
167hpi_status_t hpi_pfc_set_tcp_control_syn(hpi_handle_t, boolean_t);
168hpi_status_t hpi_pfc_set_tcp_control_rst(hpi_handle_t, boolean_t);
169hpi_status_t hpi_pfc_set_tcp_control_psh(hpi_handle_t, boolean_t);
170hpi_status_t hpi_pfc_set_tcp_control_ack(hpi_handle_t, boolean_t);
171hpi_status_t hpi_pfc_set_tcp_control_urg(hpi_handle_t, boolean_t);
172
173/*
174 * PFC Hash Seed Value
175 */
176hpi_status_t hpi_pfc_set_hash_seed_value(hpi_handle_t, uint32_t);
177
178/*
179 * PFC Interrupt Management Functions
180 */
181hpi_status_t hpi_pfc_get_interrupt_status(hpi_handle_t, pfc_int_status_t *);
182hpi_status_t hpi_pfc_clear_interrupt_status(hpi_handle_t);
183hpi_status_t hpi_pfc_set_interrupt_mask(hpi_handle_t, boolean_t,
184    boolean_t, boolean_t);
185
186/*
187 * PFC Packet Logs
188 */
189hpi_status_t hpi_pfc_get_drop_log(hpi_handle_t, pfc_drop_log_t *);
190hpi_status_t hpi_pfc_set_drop_log_mask(hpi_handle_t, boolean_t,
191    boolean_t, boolean_t, boolean_t, boolean_t);
192hpi_status_t hpi_pfc_get_bad_csum_counter(hpi_handle_t, uint64_t *);
193hpi_status_t hpi_pfc_get_drop_counter(hpi_handle_t, uint64_t *);
194
195hpi_status_t hpi_pfc_get_number_mac_addrs(hpi_handle_t handle,
196    uint32_t *n_of_addrs);
197hpi_status_t hpi_pfc_mac_addr_get_i(hpi_handle_t handle, uint8_t *data,
198    int slot);
199hpi_status_t hpi_pfc_num_macs_get(hpi_handle_t handle, uint8_t *data);
200
201#ifdef __cplusplus
202}
203#endif
204
205#endif /* !_HPI_PFC_H */
206