1/* 2 * Copyright (c) 1998, 2003, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. Oracle designates this 8 * particular file as subject to the "Classpath" exception as provided 9 * by Oracle in the LICENSE file that accompanied this code. 10 * 11 * This code is distributed in the hope that it will be useful, but WITHOUT 12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 14 * version 2 for more details (a copy is included in the LICENSE file that 15 * accompanied this code). 16 * 17 * You should have received a copy of the GNU General Public License version 18 * 2 along with this work; if not, write to the Free Software Foundation, 19 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 20 * 21 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 22 * or visit www.oracle.com if you need additional information or have any 23 * questions. 24 */ 25 26/* 27 *---------------------------------------------------------------------- 28 * 29 * Prototypes for the inline templates in vis_32.il (and vis_64.il) 30 * 31 *---------------------------------------------------------------------- 32 */ 33 34#ifndef VIS_PROTO_H 35#define VIS_PROTO_H 36 37 38#include <sys/isa_defs.h> 39 40#ifdef __cplusplus 41extern "C" { 42#endif /* __cplusplus */ 43 44/* Pure edge handling instructions */ 45int vis_edge8(void * /*frs1*/, void * /*frs2*/); 46int vis_edge8l(void * /*frs1*/, void * /*frs2*/); 47int vis_edge16(void * /*frs1*/, void * /*frs2*/); 48int vis_edge16l(void * /*frs1*/, void * /*frs2*/); 49int vis_edge32(void * /*frs1*/, void * /*frs2*/); 50int vis_edge32l(void * /*frs1*/, void * /*frs2*/); 51 52/* Edge handling instructions with negative return values if cc set. */ 53int vis_edge8cc(void * /*frs1*/, void * /*frs2*/); 54int vis_edge8lcc(void * /*frs1*/, void * /*frs2*/); 55int vis_edge16cc(void * /*frs1*/, void * /*frs2*/); 56int vis_edge16lcc(void * /*frs1*/, void * /*frs2*/); 57int vis_edge32cc(void * /*frs1*/, void * /*frs2*/); 58int vis_edge32lcc(void * /*frs1*/, void * /*frs2*/); 59 60/* Alignment instructions. */ 61void *vis_alignaddr(void * /*rs1*/, int /*rs2*/); 62void *vis_alignaddrl(void * /*rs1*/, int /*rs2*/); 63double vis_faligndata(double /*frs1*/, double /*frs2*/); 64 65/* Partitioned comparison instructions. */ 66int vis_fcmple16(double /*frs1*/, double /*frs2*/); 67int vis_fcmpne16(double /*frs1*/, double /*frs2*/); 68int vis_fcmple32(double /*frs1*/, double /*frs2*/); 69int vis_fcmpne32(double /*frs1*/, double /*frs2*/); 70int vis_fcmpgt16(double /*frs1*/, double /*frs2*/); 71int vis_fcmpeq16(double /*frs1*/, double /*frs2*/); 72int vis_fcmpgt32(double /*frs1*/, double /*frs2*/); 73int vis_fcmpeq32(double /*frs1*/, double /*frs2*/); 74 75/* Partitioned multiplication. */ 76double vis_fmul8x16_dummy(float /*frs1*/, int /*dummy*/, double /*frs2*/); 77#ifdef MLIB_OS64BIT 78double vis_fmul8x16(float /*frs1*/, double /*frs2*/); 79#else 80#define vis_fmul8x16(farg,darg) vis_fmul8x16_dummy((farg),0,(darg)) 81#endif /* MLIB_OS64BIT */ 82 83double vis_fmul8x16au(float /*frs1*/, float /*frs2*/); 84double vis_fmul8x16al(float /*frs1*/, float /*frs2*/); 85double vis_fmul8sux16(double /*frs1*/, double /*frs2*/); 86double vis_fmul8ulx16(double /*frs1*/, double /*frs2*/); 87double vis_fmuld8sux16(float /*frs1*/, float /*frs2*/); 88double vis_fmuld8ulx16(float /*frs1*/, float /*frs2*/); 89 90/* Partitioned addition & subtraction. */ 91double vis_fpadd16(double /*frs1*/, double /*frs2*/); 92float vis_fpadd16s(float /*frs1*/, float /*frs2*/); 93double vis_fpadd32(double /*frs1*/, double /*frs2*/); 94float vis_fpadd32s(float /*frs1*/, float /*frs2*/); 95double vis_fpsub16(double /*frs1*/, double /*frs2*/); 96float vis_fpsub16s(float /*frs1*/, float /*frs2*/); 97double vis_fpsub32(double /*frs1*/, double /*frs2*/); 98float vis_fpsub32s(float /*frs1*/, float /*frs2*/); 99 100/* Pixel packing & clamping. */ 101float vis_fpack16(double /*frs2*/); 102double vis_fpack32(double /*frs1*/, double /*frs2*/); 103float vis_fpackfix(double /*frs2*/); 104 105/* Combined pack ops. */ 106double vis_fpack16_pair(double /*frs2*/, double /*frs2*/); 107double vis_fpackfix_pair(double /*frs2*/, double /*frs2*/); 108void vis_st2_fpack16(double, double, double *); 109void vis_std_fpack16(double, double, double *); 110void vis_st2_fpackfix(double, double, double *); 111 112double vis_fpack16_to_hi(double /*frs1*/, double /*frs2*/); 113double vis_fpack16_to_lo(double /*frs1*/, double /*frs2*/); 114 115/* Motion estimation. */ 116#ifdef MLIB_OS64BIT 117#define vis_pdist(px1,px2,acc) vis_pxldist64(acc,px1,px2) 118double vis_pxldist64(double accum /*frd*/, double pxls1 /*frs1*/, 119 double pxls2 /*frs2*/); 120#else 121double vis_pdist(double /*frs1*/, double /*frs2*/, double /*frd*/); 122#endif /* MLIB_OS64BIT */ 123 124/* Channel merging. */ 125double vis_fpmerge(float /*frs1*/, float /*frs2*/); 126 127/* Pixel expansion. */ 128double vis_fexpand(float /*frs2*/); 129double vis_fexpand_hi(double /*frs2*/); 130double vis_fexpand_lo(double /*frs2*/); 131 132/* Bitwise logical operators. */ 133double vis_fnor(double /*frs1*/, double /*frs2*/); 134float vis_fnors(float /*frs1*/, float /*frs2*/); 135double vis_fandnot(double /*frs1*/, double /*frs2*/); 136float vis_fandnots(float /*frs1*/, float /*frs2*/); 137double vis_fnot(double /*frs1*/); 138float vis_fnots(float /*frs1*/); 139double vis_fxor(double /*frs1*/, double /*frs2*/); 140float vis_fxors(float /*frs1*/, float /*frs2*/); 141double vis_fnand(double /*frs1*/, double /*frs2*/); 142float vis_fnands(float /*frs1*/, float /*frs2*/); 143double vis_fand(double /*frs1*/, double /*frs2*/); 144float vis_fands(float /*frs1*/, float /*frs2*/); 145double vis_fxnor(double /*frs1*/, double /*frs2*/); 146float vis_fxnors(float /*frs1*/, float /*frs2*/); 147double vis_fsrc(double /*frs1*/); 148float vis_fsrcs(float /*frs1*/); 149double vis_fornot(double /*frs1*/, double /*frs2*/); 150float vis_fornots(float /*frs1*/, float /*frs2*/); 151double vis_for(double /*frs1*/, double /*frs2*/); 152float vis_fors(float /*frs1*/, float /*frs2*/); 153double vis_fzero(void); 154float vis_fzeros(void); 155double vis_fone(void); 156float vis_fones(void); 157 158/* Partial stores. */ 159void vis_stdfa_ASI_PST8P(double /*frd*/, void * /*rs1*/, int /*rmask*/); 160void vis_stdfa_ASI_PST8PL(double /*frd*/, void * /*rs1*/, int /*rmask*/); 161void vis_stdfa_ASI_PST8S(double /*frd*/, void * /*rs1*/, int /*rmask*/); 162void vis_stdfa_ASI_PST8P_int_pair(void * /*rs1*/, void * /*rs2*/, 163 void * /*rs3*/, int /*rmask*/); 164void vis_stdfa_ASI_PST16P(double /*frd*/, void * /*rs1*/, int /*rmask*/); 165void vis_stdfa_ASI_PST16PL(double /*frd*/, void * /*rs1*/, int /*rmask*/); 166void vis_stdfa_ASI_PST16S(double /*frd*/, void * /*rs1*/, int /*rmask*/); 167void vis_stdfa_ASI_PST32P(double /*frd*/, void * /*rs1*/, int /*rmask*/); 168void vis_stdfa_ASI_PST32PL(double /*frd*/, void * /*rs1*/, int /*rmask*/); 169void vis_stdfa_ASI_PST32S(double /*frd*/, void * /*rs1*/, int /*rmask*/); 170 171/* Byte & short stores. */ 172void vis_stdfa_ASI_FL8P(double /*frd*/, void * /*rs1*/); 173void vis_stdfa_ASI_FL8P_index(double /*frd*/, void * /*rs1*/, long /*index*/); 174void vis_stdfa_ASI_FL8S(double /*frd*/, void * /*rs1*/); 175void vis_stdfa_ASI_FL16P(double /*frd*/, void * /*rs1*/); 176void vis_stdfa_ASI_FL16P_index(double /*frd*/, void * /*rs1*/, long /*index*/); 177void vis_stdfa_ASI_FL16S(double /*frd*/, void * /*rs1*/); 178void vis_stdfa_ASI_FL8PL(double /*frd*/, void * /*rs1*/); 179void vis_stdfa_ASI_FL8PL_index(double /*frd*/, void * /*rs1*/, long /*index*/); 180void vis_stdfa_ASI_FL8SL(double /*frd*/, void * /*rs1*/); 181void vis_stdfa_ASI_FL16PL(double /*frd*/, void * /*rs1*/); 182void vis_stdfa_ASI_FL16PL_index(double /*frd*/, void * /*rs1*/, long /*index*/); 183void vis_stdfa_ASI_FL16SL(double /*frd*/, void * /*rs1*/); 184 185/* Byte & short loads. */ 186double vis_lddfa_ASI_FL8P(void * /*rs1*/); 187double vis_lddfa_ASI_FL8P_index(void * /*rs1*/, long /*index*/); 188double vis_lddfa_ASI_FL8P_hi(void * /*rs1*/, unsigned int /*index*/); 189double vis_lddfa_ASI_FL8P_lo(void * /*rs1*/, unsigned int /*index*/); 190double vis_lddfa_ASI_FL8S(void * /*rs1*/); 191double vis_lddfa_ASI_FL16P(void * /*rs1*/); 192double vis_lddfa_ASI_FL16P_index(void * /*rs1*/, long /*index*/); 193double vis_lddfa_ASI_FL16S(void * /*rs1*/); 194double vis_lddfa_ASI_FL8PL(void * /*rs1*/); 195double vis_lddfa_ASI_FL8PL_index(void * /*rs1*/, long /*index*/); 196double vis_lddfa_ASI_FL8SL(void * /*rs1*/); 197double vis_lddfa_ASI_FL16PL(void * /*rs1*/); 198double vis_lddfa_ASI_FL16PL_index(void * /*rs1*/, long /*index*/); 199double vis_lddfa_ASI_FL16SL(void * /*rs1*/); 200 201/* Direct read from GSR, write to GSR. */ 202unsigned int vis_read_gsr32(void); 203void vis_write_gsr32(unsigned int /*GSR*/); 204 205#define vis_write_gsr vis_write_gsr32 206#define vis_read_gsr vis_read_gsr32 207 208/* Voxel texture mapping. */ 209#ifdef MLIB_OS64BIT 210unsigned long vis_array8(unsigned long /*rs1*/, int /*rs2*/); 211unsigned long vis_array16(unsigned long /*rs1*/, int /*rs2*/); 212unsigned long vis_array32(unsigned long /*rs1*/, int /*rs2*/); 213#elif __STDC__ - 0 == 0 && !defined(_NO_LONGLONG) 214unsigned long vis_array8(unsigned long long /*rs1*/, int /*rs2*/); 215unsigned long vis_array16(unsigned long long /*rs1*/, int /*rs2*/); 216unsigned long vis_array32(unsigned long long /*rs1*/, int /*rs2*/); 217#endif /* MLIB_OS64BIT */ 218 219/* Register aliasing and type casts. */ 220float vis_read_hi(double /*frs1*/); 221float vis_read_lo(double /*frs1*/); 222double vis_write_hi(double /*frs1*/, float /*frs2*/); 223double vis_write_lo(double /*frs1*/, float /*frs2*/); 224double vis_freg_pair(float /*frs1*/, float /*frs2*/); 225float vis_to_float(unsigned int /*value*/); 226double vis_to_double(unsigned int /*value1*/, unsigned int /*value2*/); 227double vis_to_double_dup(unsigned int /*value*/); 228 229#ifdef MLIB_OS64BIT 230double vis_ll_to_double(unsigned long /*value*/); 231#elif __STDC__ - 0 == 0 && !defined(_NO_LONGLONG) 232double vis_ll_to_double(unsigned long long /*value*/); 233#endif /* MLIB_OS64BIT */ 234 235/* Direct access to ASI. */ 236/* normal asi = 0x82, big endian = 0x80, little endian = 0x88 */ 237unsigned int vis_read_asi(void); 238void vis_write_asi(unsigned int /*ASI*/); 239 240/* Big/little endian loads. */ 241float vis_ldfa_ASI_REG(void * /*rs1*/); /* endian according */ 242 /* to %asi */ 243float vis_ldfa_ASI_P(void * /*rs1*/); /* big endian */ 244float vis_ldfa_ASI_P_index(void * /*rs1*/, long /*index*/); /* big endian */ 245float vis_ldfa_ASI_PL(void * /*rs1*/); /* little endian */ 246float vis_ldfa_ASI_PL_index(void * /*rs1*/, long /*index*/); /* little endian */ 247double vis_lddfa_ASI_REG(void * /*rs1*/); /* endian according */ 248 /* to %asi */ 249double vis_lddfa_ASI_P(void * /*rs1*/); /* big endian */ 250double vis_lddfa_ASI_P_index(void * /*rs1*/, long /*index*/); /* big endian */ 251double vis_lddfa_ASI_PL(void * /*rs1*/); /* little endian */ 252double vis_lddfa_ASI_PL_index(void * /*rs1*/, long /*index*/); /* little endian */ 253 254/* Big/little endian stores. */ 255void vis_stfa_ASI_REG(float /*frs*/, void * /*rs1*/); /* endian according */ 256 /* to %asi */ 257void vis_stfa_ASI_P(float /*frs*/, void * /*rs1*/); /* big endian */ 258void vis_stfa_ASI_P_index(float /*frs*/, void * /*rs1*/, long /*index*/); /* big endian */ 259void vis_stfa_ASI_PL(float /*frs*/, void * /*rs1*/); /* little endian */ 260void vis_stfa_ASI_PL_index(float /*frs*/, void * /*rs1*/, long /*index*/); /* little endian */ 261void vis_stdfa_ASI_REG(double /*frd*/, void * /*rs1*/); /* endian according */ 262 /* to %asi */ 263void vis_stdfa_ASI_P(double /*frd*/, void * /*rs1*/); /* big endian */ 264void vis_stdfa_ASI_P_index(double /*frd*/, void * /*rs1*/, long /*index*/); /* big endian */ 265void vis_stdfa_ASI_PL(double /*frd*/, void * /*rs1*/); /* little endian */ 266void vis_stdfa_ASI_PL_index(double /*frd*/, void * /*rs1*/, long /*index*/); /* little endian */ 267 268/* Unsigned short big/little endian loads. */ 269unsigned short vis_lduha_ASI_REG(void * /*rs1*/); 270unsigned short vis_lduha_ASI_P(void * /*rs1*/); 271unsigned short vis_lduha_ASI_PL(void * /*rs1*/); 272unsigned short vis_lduha_ASI_P_index(void * /*rs1*/, long /*index*/); 273unsigned short vis_lduha_ASI_PL_index(void * /*rs1*/, long /*index*/); 274 275/* Nicknames for explicit ASI loads and stores. */ 276#define vis_st_u8 vis_stdfa_ASI_FL8P 277#define vis_st_u8_i vis_stdfa_ASI_FL8P_index 278#define vis_st_u8_le vis_stdfa_ASI_FL8PL 279#define vis_st_u8_le_i vis_stdfa_ASI_FL8PL_index 280#define vis_st_u16 vis_stdfa_ASI_FL16P 281#define vis_st_u16_i vis_stdfa_ASI_FL16P_index 282#define vis_st_u16_le vis_stdfa_ASI_FL16PL 283#define vis_st_u16_le_i vis_stdfa_ASI_FL16PL_index 284 285#define vis_ld_u8 vis_lddfa_ASI_FL8P 286#define vis_ld_u8_i vis_lddfa_ASI_FL8P_index 287#define vis_ld_u8_le vis_lddfa_ASI_FL8PL 288#define vis_ld_u8_le_i vis_lddfa_ASI_FL8PL_index 289#define vis_ld_u16 vis_lddfa_ASI_FL16P 290#define vis_ld_u16_i vis_lddfa_ASI_FL16P_index 291#define vis_ld_u16_le vis_lddfa_ASI_FL16PL 292#define vis_ld_u16_le_i vis_lddfa_ASI_FL16PL_index 293 294#define vis_pst_8 vis_stdfa_ASI_PST8P 295#define vis_pst_16 vis_stdfa_ASI_PST16P 296#define vis_pst_32 vis_stdfa_ASI_PST32P 297 298#define vis_pst_8_le vis_stdfa_ASI_PST8PL 299#define vis_pst_16_le vis_stdfa_ASI_PST16PL 300#define vis_pst_32_le vis_stdfa_ASI_PST32PL 301 302#define vis_ld_f32_asi vis_ldfa_ASI_REG 303#define vis_ld_f32 vis_ldfa_ASI_P 304#define vis_ld_f32_i vis_ldfa_ASI_P_index 305#define vis_ld_f32_le vis_ldfa_ASI_PL 306#define vis_ld_f32_le_i vis_ldfa_ASI_PL_index 307 308#define vis_ld_d64_asi vis_lddfa_ASI_REG 309#define vis_ld_d64 vis_lddfa_ASI_P 310#define vis_ld_d64_i vis_lddfa_ASI_P_index 311#define vis_ld_d64_le vis_lddfa_ASI_PL 312#define vis_ld_d64_le_i vis_lddfa_ASI_PL_index 313 314#define vis_st_f32_asi vis_stfa_ASI_REG 315#define vis_st_f32 vis_stfa_ASI_P 316#define vis_st_f32_i vis_stfa_ASI_P_index 317#define vis_st_f32_le vis_stfa_ASI_PL 318#define vis_st_f32_le_i vis_stfa_ASI_PL_index 319 320#define vis_st_d64_asi vis_stdfa_ASI_REG 321#define vis_st_d64 vis_stdfa_ASI_P 322#define vis_st_d64_i vis_stdfa_ASI_P_index 323#define vis_st_d64_le vis_stdfa_ASI_PL 324#define vis_st_d64_le_i vis_stdfa_ASI_PL_index 325 326/* "<" and ">=" may be implemented in terms of ">" and "<=". */ 327#define vis_fcmplt16(a,b) vis_fcmpgt16((b),(a)) 328#define vis_fcmplt32(a,b) vis_fcmpgt32((b),(a)) 329#define vis_fcmpge16(a,b) vis_fcmple16((b),(a)) 330#define vis_fcmpge32(a,b) vis_fcmple32((b),(a)) 331 332/* Prefetch */ 333void vis_prefetch_read(void * /*address*/); 334void vis_prefetch_write(void * /*address*/); 335 336#pragma no_side_effect(vis_prefetch_read) 337#pragma no_side_effect(vis_prefetch_write) 338 339/* Nonfaulting load */ 340 341char vis_ldsba_ASI_PNF(void * /*rs1*/); 342char vis_ldsba_ASI_PNF_index(void * /*rs1*/, long /*index*/); 343char vis_ldsba_ASI_PNFL(void * /*rs1*/); 344char vis_ldsba_ASI_PNFL_index(void * /*rs1*/, long /*index*/); 345 346unsigned char vis_lduba_ASI_PNF(void * /*rs1*/); 347unsigned char vis_lduba_ASI_PNF_index(void * /*rs1*/, long /*index*/); 348unsigned char vis_lduba_ASI_PNFL(void * /*rs1*/); 349unsigned char vis_lduba_ASI_PNFL_index(void * /*rs1*/, long /*index*/); 350 351short vis_ldsha_ASI_PNF(void * /*rs1*/); 352short vis_ldsha_ASI_PNF_index(void * /*rs1*/, long /*index*/); 353short vis_ldsha_ASI_PNFL(void * /*rs1*/); 354short vis_ldsha_ASI_PNFL_index(void * /*rs1*/, long /*index*/); 355 356unsigned short vis_lduha_ASI_PNF(void * /*rs1*/); 357unsigned short vis_lduha_ASI_PNF_index(void * /*rs1*/, long /*index*/); 358unsigned short vis_lduha_ASI_PNFL(void * /*rs1*/); 359unsigned short vis_lduha_ASI_PNFL_index(void * /*rs1*/, long /*index*/); 360 361int vis_ldswa_ASI_PNF(void * /*rs1*/); 362int vis_ldswa_ASI_PNF_index(void * /*rs1*/, long /*index*/); 363int vis_ldswa_ASI_PNFL(void * /*rs1*/); 364int vis_ldswa_ASI_PNFL_index(void * /*rs1*/, long /*index*/); 365 366unsigned int vis_lduwa_ASI_PNF(void * /*rs1*/); 367unsigned int vis_lduwa_ASI_PNF_index(void * /*rs1*/, long /*index*/); 368unsigned int vis_lduwa_ASI_PNFL(void * /*rs1*/); 369unsigned int vis_lduwa_ASI_PNFL_index(void * /*rs1*/, long /*index*/); 370 371#ifdef MLIB_OS64BIT 372 373long vis_ldxa_ASI_PNF(void * /*rs1*/); 374long vis_ldxa_ASI_PNF_index(void * /*rs1*/, long /*index*/); 375long vis_ldxa_ASI_PNFL(void * /*rs1*/); 376long vis_ldxa_ASI_PNFL_index(void * /*rs1*/, long /*index*/); 377 378#elif __STDC__ - 0 == 0 && !defined(_NO_LONGLONG) 379 380long long vis_ldda_ASI_PNF(void * /*rs1*/); 381long long vis_ldda_ASI_PNF_index(void * /*rs1*/, long /*index*/); 382long long vis_ldda_ASI_PNFL(void * /*rs1*/); 383long long vis_ldda_ASI_PNFL_index(void * /*rs1*/, long /*index*/); 384 385#endif /* MLIB_OS64BIT */ 386 387float vis_ldfa_ASI_PNF(void * /*rs1*/); 388float vis_ldfa_ASI_PNF_index(void * /*rs1*/, long /*index*/); 389float vis_ldfa_ASI_PNFL(void * /*rs1*/); 390float vis_ldfa_ASI_PNFL_index(void * /*rs1*/, long /*index*/); 391 392double vis_lddfa_ASI_PNF(void * /*rs1*/); 393double vis_lddfa_ASI_PNF_index(void * /*rs1*/, long /*index*/); 394double vis_lddfa_ASI_PNFL(void * /*rs1*/); 395double vis_lddfa_ASI_PNFL_index(void * /*rs1*/, long /*index*/); 396 397#define vis_ld_s8_nf vis_ldsba_ASI_PNF 398#define vis_ld_s8_nf_i vis_ldsba_ASI_PNF_index 399#define vis_ld_s8_nf_le vis_ldsba_ASI_PNFL 400#define vis_ld_s8_nf_le_i vis_ldsba_ASI_PNFL_index 401 402#define vis_ld_u8_nf vis_lduba_ASI_PNF 403#define vis_ld_u8_nf_i vis_lduba_ASI_PNF_index 404#define vis_ld_u8_nf_le vis_lduba_ASI_PNFL 405#define vis_ld_u8_nf_le_i vis_lduba_ASI_PNFL_index 406 407#define vis_ld_s16_nf vis_ldsha_ASI_PNF 408#define vis_ld_s16_nf_i vis_ldsha_ASI_PNF_index 409#define vis_ld_s16_nf_le vis_ldsha_ASI_PNFL 410#define vis_ld_s16_nf_le_i vis_ldsha_ASI_PNFL_index 411 412#define vis_ld_u16_nf vis_lduha_ASI_PNF 413#define vis_ld_u16_nf_i vis_lduha_ASI_PNF_index 414#define vis_ld_u16_nf_le vis_lduha_ASI_PNFL 415#define vis_ld_u16_nf_le_i vis_lduha_ASI_PNFL_index 416 417#define vis_ld_s32_nf vis_ldswa_ASI_PNF 418#define vis_ld_s32_nf_i vis_ldswa_ASI_PNF_index 419#define vis_ld_s32_nf_le vis_ldswa_ASI_PNFL 420#define vis_ld_s32_nf_le_i vis_ldswa_ASI_PNFL_index 421 422#define vis_ld_u32_nf vis_lduwa_ASI_PNF 423#define vis_ld_u32_nf_i vis_lduwa_ASI_PNF_index 424#define vis_ld_u32_nf_le vis_lduwa_ASI_PNFL 425#define vis_ld_u32_nf_le_i vis_lduwa_ASI_PNFL_index 426 427#ifdef MLIB_OS64BIT 428 429#define vis_ld_s64_nf vis_ldxa_ASI_PNF 430#define vis_ld_s64_nf_i vis_ldxa_ASI_PNF_index 431#define vis_ld_s64_nf_le vis_ldxa_ASI_PNFL 432#define vis_ld_s64_nf_le_i vis_ldxa_ASI_PNFL_index 433 434#define vis_ld_u64_nf vis_ldxa_ASI_PNF 435#define vis_ld_u64_nf_i vis_ldxa_ASI_PNF_index 436#define vis_ld_u64_nf_le vis_ldxa_ASI_PNFL 437#define vis_ld_u64_nf_le_i vis_ldxa_ASI_PNFL_index 438 439#elif __STDC__ - 0 == 0 && !defined(_NO_LONGLONG) 440 441#define vis_ld_s64_nf vis_ldda_ASI_PNF 442#define vis_ld_s64_nf_i vis_ldda_ASI_PNF_index 443#define vis_ld_s64_nf_le vis_ldda_ASI_PNFL 444#define vis_ld_s64_nf_le_i vis_ldda_ASI_PNFL_index 445 446#define vis_ld_u64_nf vis_ldda_ASI_PNF 447#define vis_ld_u64_nf_i vis_ldda_ASI_PNF_index 448#define vis_ld_u64_nf_le vis_ldda_ASI_PNFL 449#define vis_ld_u64_nf_le_i vis_ldda_ASI_PNFL_index 450 451#endif /* MLIB_OS64BIT */ 452 453#define vis_ld_f32_nf vis_ldfa_ASI_PNF 454#define vis_ld_f32_nf_i vis_ldfa_ASI_PNF_index 455#define vis_ld_f32_nf_le vis_ldfa_ASI_PNFL 456#define vis_ld_f32_nf_le_i vis_ldfa_ASI_PNFL_index 457 458#define vis_ld_d64_nf vis_lddfa_ASI_PNF 459#define vis_ld_d64_nf_i vis_lddfa_ASI_PNF_index 460#define vis_ld_d64_nf_le vis_lddfa_ASI_PNFL 461#define vis_ld_d64_nf_le_i vis_lddfa_ASI_PNFL_index 462 463#if VIS >= 0x200 464/* Edge handling instructions which do not set the integer condition codes */ 465int vis_edge8n(void * /*rs1*/, void * /*rs2*/); 466int vis_edge8ln(void * /*rs1*/, void * /*rs2*/); 467int vis_edge16n(void * /*rs1*/, void * /*rs2*/); 468int vis_edge16ln(void * /*rs1*/, void * /*rs2*/); 469int vis_edge32n(void * /*rs1*/, void * /*rs2*/); 470int vis_edge32ln(void * /*rs1*/, void * /*rs2*/); 471 472#define vis_edge8 vis_edge8n 473#define vis_edge8l vis_edge8ln 474#define vis_edge16 vis_edge16n 475#define vis_edge16l vis_edge16ln 476#define vis_edge32 vis_edge32n 477#define vis_edge32l vis_edge32ln 478 479/* Byte mask and shuffle instructions */ 480void vis_write_bmask(unsigned int /*rs1*/, unsigned int /*rs2*/); 481double vis_bshuffle(double /*frs1*/, double /*frs2*/); 482 483/* Graphics status register */ 484unsigned int vis_read_bmask(void); 485#ifdef MLIB_OS64BIT 486unsigned long vis_read_gsr64(void); 487void vis_write_gsr64(unsigned long /* GSR */); 488#elif __STDC__ - 0 == 0 && !defined(_NO_LONGLONG) 489unsigned long long vis_read_gsr64(void); 490void vis_write_gsr64(unsigned long long /* GSR */); 491#endif /* MLIB_OS64BIT */ 492#endif /* VIS >= 0x200 */ 493 494#ifdef __cplusplus 495} // End of extern "C" 496#endif /* __cplusplus */ 497 498#endif /* VIS_PROTO_H */ 499