1/* 2 * Copyright (c) 1999, 2015, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25#include "precompiled.hpp" 26#include "c1/c1_CodeStubs.hpp" 27#include "c1/c1_FrameMap.hpp" 28#include "c1/c1_LIRAssembler.hpp" 29#include "c1/c1_MacroAssembler.hpp" 30#include "c1/c1_Runtime1.hpp" 31#include "nativeInst_x86.hpp" 32#include "runtime/sharedRuntime.hpp" 33#include "utilities/macros.hpp" 34#include "vmreg_x86.inline.hpp" 35#if INCLUDE_ALL_GCS 36#include "gc/g1/g1SATBCardTableModRefBS.hpp" 37#endif // INCLUDE_ALL_GCS 38 39 40#define __ ce->masm()-> 41 42float ConversionStub::float_zero = 0.0; 43double ConversionStub::double_zero = 0.0; 44 45void ConversionStub::emit_code(LIR_Assembler* ce) { 46 __ bind(_entry); 47 assert(bytecode() == Bytecodes::_f2i || bytecode() == Bytecodes::_d2i, "other conversions do not require stub"); 48 49 50 if (input()->is_single_xmm()) { 51 __ comiss(input()->as_xmm_float_reg(), 52 ExternalAddress((address)&float_zero)); 53 } else if (input()->is_double_xmm()) { 54 __ comisd(input()->as_xmm_double_reg(), 55 ExternalAddress((address)&double_zero)); 56 } else { 57 LP64_ONLY(ShouldNotReachHere()); 58 __ push(rax); 59 __ ftst(); 60 __ fnstsw_ax(); 61 __ sahf(); 62 __ pop(rax); 63 } 64 65 Label NaN, do_return; 66 __ jccb(Assembler::parity, NaN); 67 __ jccb(Assembler::below, do_return); 68 69 // input is > 0 -> return maxInt 70 // result register already contains 0x80000000, so subtracting 1 gives 0x7fffffff 71 __ decrement(result()->as_register()); 72 __ jmpb(do_return); 73 74 // input is NaN -> return 0 75 __ bind(NaN); 76 __ xorptr(result()->as_register(), result()->as_register()); 77 78 __ bind(do_return); 79 __ jmp(_continuation); 80} 81 82void CounterOverflowStub::emit_code(LIR_Assembler* ce) { 83 __ bind(_entry); 84 Metadata *m = _method->as_constant_ptr()->as_metadata(); 85 ce->store_parameter(m, 1); 86 ce->store_parameter(_bci, 0); 87 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::counter_overflow_id))); 88 ce->add_call_info_here(_info); 89 ce->verify_oop_map(_info); 90 __ jmp(_continuation); 91} 92 93RangeCheckStub::RangeCheckStub(CodeEmitInfo* info, LIR_Opr index, 94 bool throw_index_out_of_bounds_exception) 95 : _throw_index_out_of_bounds_exception(throw_index_out_of_bounds_exception) 96 , _index(index) 97{ 98 assert(info != NULL, "must have info"); 99 _info = new CodeEmitInfo(info); 100} 101 102 103void RangeCheckStub::emit_code(LIR_Assembler* ce) { 104 __ bind(_entry); 105 if (_info->deoptimize_on_exception()) { 106 address a = Runtime1::entry_for(Runtime1::predicate_failed_trap_id); 107 __ call(RuntimeAddress(a)); 108 ce->add_call_info_here(_info); 109 ce->verify_oop_map(_info); 110 debug_only(__ should_not_reach_here()); 111 return; 112 } 113 114 // pass the array index on stack because all registers must be preserved 115 if (_index->is_cpu_register()) { 116 ce->store_parameter(_index->as_register(), 0); 117 } else { 118 ce->store_parameter(_index->as_jint(), 0); 119 } 120 Runtime1::StubID stub_id; 121 if (_throw_index_out_of_bounds_exception) { 122 stub_id = Runtime1::throw_index_exception_id; 123 } else { 124 stub_id = Runtime1::throw_range_check_failed_id; 125 } 126 __ call(RuntimeAddress(Runtime1::entry_for(stub_id))); 127 ce->add_call_info_here(_info); 128 ce->verify_oop_map(_info); 129 debug_only(__ should_not_reach_here()); 130} 131 132PredicateFailedStub::PredicateFailedStub(CodeEmitInfo* info) { 133 _info = new CodeEmitInfo(info); 134} 135 136void PredicateFailedStub::emit_code(LIR_Assembler* ce) { 137 __ bind(_entry); 138 address a = Runtime1::entry_for(Runtime1::predicate_failed_trap_id); 139 __ call(RuntimeAddress(a)); 140 ce->add_call_info_here(_info); 141 ce->verify_oop_map(_info); 142 debug_only(__ should_not_reach_here()); 143} 144 145void DivByZeroStub::emit_code(LIR_Assembler* ce) { 146 if (_offset != -1) { 147 ce->compilation()->implicit_exception_table()->append(_offset, __ offset()); 148 } 149 __ bind(_entry); 150 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::throw_div0_exception_id))); 151 ce->add_call_info_here(_info); 152 debug_only(__ should_not_reach_here()); 153} 154 155 156// Implementation of NewInstanceStub 157 158NewInstanceStub::NewInstanceStub(LIR_Opr klass_reg, LIR_Opr result, ciInstanceKlass* klass, CodeEmitInfo* info, Runtime1::StubID stub_id) { 159 _result = result; 160 _klass = klass; 161 _klass_reg = klass_reg; 162 _info = new CodeEmitInfo(info); 163 assert(stub_id == Runtime1::new_instance_id || 164 stub_id == Runtime1::fast_new_instance_id || 165 stub_id == Runtime1::fast_new_instance_init_check_id, 166 "need new_instance id"); 167 _stub_id = stub_id; 168} 169 170 171void NewInstanceStub::emit_code(LIR_Assembler* ce) { 172 assert(__ rsp_offset() == 0, "frame size should be fixed"); 173 __ bind(_entry); 174 __ movptr(rdx, _klass_reg->as_register()); 175 __ call(RuntimeAddress(Runtime1::entry_for(_stub_id))); 176 ce->add_call_info_here(_info); 177 ce->verify_oop_map(_info); 178 assert(_result->as_register() == rax, "result must in rax,"); 179 __ jmp(_continuation); 180} 181 182 183// Implementation of NewTypeArrayStub 184 185NewTypeArrayStub::NewTypeArrayStub(LIR_Opr klass_reg, LIR_Opr length, LIR_Opr result, CodeEmitInfo* info) { 186 _klass_reg = klass_reg; 187 _length = length; 188 _result = result; 189 _info = new CodeEmitInfo(info); 190} 191 192 193void NewTypeArrayStub::emit_code(LIR_Assembler* ce) { 194 assert(__ rsp_offset() == 0, "frame size should be fixed"); 195 __ bind(_entry); 196 assert(_length->as_register() == rbx, "length must in rbx,"); 197 assert(_klass_reg->as_register() == rdx, "klass_reg must in rdx"); 198 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::new_type_array_id))); 199 ce->add_call_info_here(_info); 200 ce->verify_oop_map(_info); 201 assert(_result->as_register() == rax, "result must in rax,"); 202 __ jmp(_continuation); 203} 204 205 206// Implementation of NewObjectArrayStub 207 208NewObjectArrayStub::NewObjectArrayStub(LIR_Opr klass_reg, LIR_Opr length, LIR_Opr result, CodeEmitInfo* info) { 209 _klass_reg = klass_reg; 210 _result = result; 211 _length = length; 212 _info = new CodeEmitInfo(info); 213} 214 215 216void NewObjectArrayStub::emit_code(LIR_Assembler* ce) { 217 assert(__ rsp_offset() == 0, "frame size should be fixed"); 218 __ bind(_entry); 219 assert(_length->as_register() == rbx, "length must in rbx,"); 220 assert(_klass_reg->as_register() == rdx, "klass_reg must in rdx"); 221 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::new_object_array_id))); 222 ce->add_call_info_here(_info); 223 ce->verify_oop_map(_info); 224 assert(_result->as_register() == rax, "result must in rax,"); 225 __ jmp(_continuation); 226} 227 228 229// Implementation of MonitorAccessStubs 230 231MonitorEnterStub::MonitorEnterStub(LIR_Opr obj_reg, LIR_Opr lock_reg, CodeEmitInfo* info) 232: MonitorAccessStub(obj_reg, lock_reg) 233{ 234 _info = new CodeEmitInfo(info); 235} 236 237 238void MonitorEnterStub::emit_code(LIR_Assembler* ce) { 239 assert(__ rsp_offset() == 0, "frame size should be fixed"); 240 __ bind(_entry); 241 ce->store_parameter(_obj_reg->as_register(), 1); 242 ce->store_parameter(_lock_reg->as_register(), 0); 243 Runtime1::StubID enter_id; 244 if (ce->compilation()->has_fpu_code()) { 245 enter_id = Runtime1::monitorenter_id; 246 } else { 247 enter_id = Runtime1::monitorenter_nofpu_id; 248 } 249 __ call(RuntimeAddress(Runtime1::entry_for(enter_id))); 250 ce->add_call_info_here(_info); 251 ce->verify_oop_map(_info); 252 __ jmp(_continuation); 253} 254 255 256void MonitorExitStub::emit_code(LIR_Assembler* ce) { 257 __ bind(_entry); 258 if (_compute_lock) { 259 // lock_reg was destroyed by fast unlocking attempt => recompute it 260 ce->monitor_address(_monitor_ix, _lock_reg); 261 } 262 ce->store_parameter(_lock_reg->as_register(), 0); 263 // note: non-blocking leaf routine => no call info needed 264 Runtime1::StubID exit_id; 265 if (ce->compilation()->has_fpu_code()) { 266 exit_id = Runtime1::monitorexit_id; 267 } else { 268 exit_id = Runtime1::monitorexit_nofpu_id; 269 } 270 __ call(RuntimeAddress(Runtime1::entry_for(exit_id))); 271 __ jmp(_continuation); 272} 273 274 275// Implementation of patching: 276// - Copy the code at given offset to an inlined buffer (first the bytes, then the number of bytes) 277// - Replace original code with a call to the stub 278// At Runtime: 279// - call to stub, jump to runtime 280// - in runtime: preserve all registers (rspecially objects, i.e., source and destination object) 281// - in runtime: after initializing class, restore original code, reexecute instruction 282 283int PatchingStub::_patch_info_offset = -NativeGeneralJump::instruction_size; 284 285void PatchingStub::align_patch_site(MacroAssembler* masm) { 286 // We're patching a 5-7 byte instruction on intel and we need to 287 // make sure that we don't see a piece of the instruction. It 288 // appears mostly impossible on Intel to simply invalidate other 289 // processors caches and since they may do aggressive prefetch it's 290 // very hard to make a guess about what code might be in the icache. 291 // Force the instruction to be double word aligned so that it 292 // doesn't span a cache line. 293 masm->align(round_to(NativeGeneralJump::instruction_size, wordSize)); 294} 295 296void PatchingStub::emit_code(LIR_Assembler* ce) { 297 assert(NativeCall::instruction_size <= _bytes_to_copy && _bytes_to_copy <= 0xFF, "not enough room for call"); 298 299 Label call_patch; 300 301 // static field accesses have special semantics while the class 302 // initializer is being run so we emit a test which can be used to 303 // check that this code is being executed by the initializing 304 // thread. 305 address being_initialized_entry = __ pc(); 306 if (CommentedAssembly) { 307 __ block_comment(" patch template"); 308 } 309 if (_id == load_klass_id) { 310 // produce a copy of the load klass instruction for use by the being initialized case 311#ifdef ASSERT 312 address start = __ pc(); 313#endif 314 Metadata* o = NULL; 315 __ mov_metadata(_obj, o); 316#ifdef ASSERT 317 for (int i = 0; i < _bytes_to_copy; i++) { 318 address ptr = (address)(_pc_start + i); 319 int a_byte = (*ptr) & 0xFF; 320 assert(a_byte == *start++, "should be the same code"); 321 } 322#endif 323 } else if (_id == load_mirror_id) { 324 // produce a copy of the load mirror instruction for use by the being 325 // initialized case 326#ifdef ASSERT 327 address start = __ pc(); 328#endif 329 jobject o = NULL; 330 __ movoop(_obj, o); 331#ifdef ASSERT 332 for (int i = 0; i < _bytes_to_copy; i++) { 333 address ptr = (address)(_pc_start + i); 334 int a_byte = (*ptr) & 0xFF; 335 assert(a_byte == *start++, "should be the same code"); 336 } 337#endif 338 } else { 339 // make a copy the code which is going to be patched. 340 for (int i = 0; i < _bytes_to_copy; i++) { 341 address ptr = (address)(_pc_start + i); 342 int a_byte = (*ptr) & 0xFF; 343 __ emit_int8(a_byte); 344 *ptr = 0x90; // make the site look like a nop 345 } 346 } 347 348 address end_of_patch = __ pc(); 349 int bytes_to_skip = 0; 350 if (_id == load_mirror_id) { 351 int offset = __ offset(); 352 if (CommentedAssembly) { 353 __ block_comment(" being_initialized check"); 354 } 355 assert(_obj != noreg, "must be a valid register"); 356 Register tmp = rax; 357 Register tmp2 = rbx; 358 __ push(tmp); 359 __ push(tmp2); 360 // Load without verification to keep code size small. We need it because 361 // begin_initialized_entry_offset has to fit in a byte. Also, we know it's not null. 362 __ movptr(tmp2, Address(_obj, java_lang_Class::klass_offset_in_bytes())); 363 __ get_thread(tmp); 364 __ cmpptr(tmp, Address(tmp2, InstanceKlass::init_thread_offset())); 365 __ pop(tmp2); 366 __ pop(tmp); 367 __ jcc(Assembler::notEqual, call_patch); 368 369 // access_field patches may execute the patched code before it's 370 // copied back into place so we need to jump back into the main 371 // code of the nmethod to continue execution. 372 __ jmp(_patch_site_continuation); 373 374 // make sure this extra code gets skipped 375 bytes_to_skip += __ offset() - offset; 376 } 377 if (CommentedAssembly) { 378 __ block_comment("patch data encoded as movl"); 379 } 380 // Now emit the patch record telling the runtime how to find the 381 // pieces of the patch. We only need 3 bytes but for readability of 382 // the disassembly we make the data look like a movl reg, imm32, 383 // which requires 5 bytes 384 int sizeof_patch_record = 5; 385 bytes_to_skip += sizeof_patch_record; 386 387 // emit the offsets needed to find the code to patch 388 int being_initialized_entry_offset = __ pc() - being_initialized_entry + sizeof_patch_record; 389 390 __ emit_int8((unsigned char)0xB8); 391 __ emit_int8(0); 392 __ emit_int8(being_initialized_entry_offset); 393 __ emit_int8(bytes_to_skip); 394 __ emit_int8(_bytes_to_copy); 395 address patch_info_pc = __ pc(); 396 assert(patch_info_pc - end_of_patch == bytes_to_skip, "incorrect patch info"); 397 398 address entry = __ pc(); 399 NativeGeneralJump::insert_unconditional((address)_pc_start, entry); 400 address target = NULL; 401 relocInfo::relocType reloc_type = relocInfo::none; 402 switch (_id) { 403 case access_field_id: target = Runtime1::entry_for(Runtime1::access_field_patching_id); break; 404 case load_klass_id: target = Runtime1::entry_for(Runtime1::load_klass_patching_id); reloc_type = relocInfo::metadata_type; break; 405 case load_mirror_id: target = Runtime1::entry_for(Runtime1::load_mirror_patching_id); reloc_type = relocInfo::oop_type; break; 406 case load_appendix_id: target = Runtime1::entry_for(Runtime1::load_appendix_patching_id); reloc_type = relocInfo::oop_type; break; 407 default: ShouldNotReachHere(); 408 } 409 __ bind(call_patch); 410 411 if (CommentedAssembly) { 412 __ block_comment("patch entry point"); 413 } 414 __ call(RuntimeAddress(target)); 415 assert(_patch_info_offset == (patch_info_pc - __ pc()), "must not change"); 416 ce->add_call_info_here(_info); 417 int jmp_off = __ offset(); 418 __ jmp(_patch_site_entry); 419 // Add enough nops so deoptimization can overwrite the jmp above with a call 420 // and not destroy the world. We cannot use fat nops here, since the concurrent 421 // code rewrite may transiently create the illegal instruction sequence. 422 for (int j = __ offset() ; j < jmp_off + 5 ; j++ ) { 423 __ nop(); 424 } 425 if (_id == load_klass_id || _id == load_mirror_id || _id == load_appendix_id) { 426 CodeSection* cs = __ code_section(); 427 RelocIterator iter(cs, (address)_pc_start, (address)(_pc_start + 1)); 428 relocInfo::change_reloc_info_for_address(&iter, (address) _pc_start, reloc_type, relocInfo::none); 429 } 430} 431 432 433void DeoptimizeStub::emit_code(LIR_Assembler* ce) { 434 __ bind(_entry); 435 ce->store_parameter(_trap_request, 0); 436 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::deoptimize_id))); 437 ce->add_call_info_here(_info); 438 DEBUG_ONLY(__ should_not_reach_here()); 439} 440 441 442void ImplicitNullCheckStub::emit_code(LIR_Assembler* ce) { 443 address a; 444 if (_info->deoptimize_on_exception()) { 445 // Deoptimize, do not throw the exception, because it is probably wrong to do it here. 446 a = Runtime1::entry_for(Runtime1::predicate_failed_trap_id); 447 } else { 448 a = Runtime1::entry_for(Runtime1::throw_null_pointer_exception_id); 449 } 450 451 ce->compilation()->implicit_exception_table()->append(_offset, __ offset()); 452 __ bind(_entry); 453 __ call(RuntimeAddress(a)); 454 ce->add_call_info_here(_info); 455 ce->verify_oop_map(_info); 456 debug_only(__ should_not_reach_here()); 457} 458 459 460void SimpleExceptionStub::emit_code(LIR_Assembler* ce) { 461 assert(__ rsp_offset() == 0, "frame size should be fixed"); 462 463 __ bind(_entry); 464 // pass the object on stack because all registers must be preserved 465 if (_obj->is_cpu_register()) { 466 ce->store_parameter(_obj->as_register(), 0); 467 } 468 __ call(RuntimeAddress(Runtime1::entry_for(_stub))); 469 ce->add_call_info_here(_info); 470 debug_only(__ should_not_reach_here()); 471} 472 473 474void ArrayCopyStub::emit_code(LIR_Assembler* ce) { 475 //---------------slow case: call to native----------------- 476 __ bind(_entry); 477 // Figure out where the args should go 478 // This should really convert the IntrinsicID to the Method* and signature 479 // but I don't know how to do that. 480 // 481 VMRegPair args[5]; 482 BasicType signature[5] = { T_OBJECT, T_INT, T_OBJECT, T_INT, T_INT}; 483 SharedRuntime::java_calling_convention(signature, args, 5, true); 484 485 // push parameters 486 // (src, src_pos, dest, destPos, length) 487 Register r[5]; 488 r[0] = src()->as_register(); 489 r[1] = src_pos()->as_register(); 490 r[2] = dst()->as_register(); 491 r[3] = dst_pos()->as_register(); 492 r[4] = length()->as_register(); 493 494 // next registers will get stored on the stack 495 for (int i = 0; i < 5 ; i++ ) { 496 VMReg r_1 = args[i].first(); 497 if (r_1->is_stack()) { 498 int st_off = r_1->reg2stack() * wordSize; 499 __ movptr (Address(rsp, st_off), r[i]); 500 } else { 501 assert(r[i] == args[i].first()->as_Register(), "Wrong register for arg "); 502 } 503 } 504 505 ce->align_call(lir_static_call); 506 507 ce->emit_static_call_stub(); 508 if (ce->compilation()->bailed_out()) { 509 return; // CodeCache is full 510 } 511 AddressLiteral resolve(SharedRuntime::get_resolve_static_call_stub(), 512 relocInfo::static_call_type); 513 __ call(resolve); 514 ce->add_call_info_here(info()); 515 516#ifndef PRODUCT 517 __ incrementl(ExternalAddress((address)&Runtime1::_arraycopy_slowcase_cnt)); 518#endif 519 520 __ jmp(_continuation); 521} 522 523///////////////////////////////////////////////////////////////////////////// 524#if INCLUDE_ALL_GCS 525 526void G1PreBarrierStub::emit_code(LIR_Assembler* ce) { 527 // At this point we know that marking is in progress. 528 // If do_load() is true then we have to emit the 529 // load of the previous value; otherwise it has already 530 // been loaded into _pre_val. 531 532 __ bind(_entry); 533 assert(pre_val()->is_register(), "Precondition."); 534 535 Register pre_val_reg = pre_val()->as_register(); 536 537 if (do_load()) { 538 ce->mem2reg(addr(), pre_val(), T_OBJECT, patch_code(), info(), false /*wide*/, false /*unaligned*/); 539 } 540 541 __ cmpptr(pre_val_reg, (int32_t) NULL_WORD); 542 __ jcc(Assembler::equal, _continuation); 543 ce->store_parameter(pre_val()->as_register(), 0); 544 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::g1_pre_barrier_slow_id))); 545 __ jmp(_continuation); 546 547} 548 549void G1PostBarrierStub::emit_code(LIR_Assembler* ce) { 550 __ bind(_entry); 551 assert(addr()->is_register(), "Precondition."); 552 assert(new_val()->is_register(), "Precondition."); 553 Register new_val_reg = new_val()->as_register(); 554 __ cmpptr(new_val_reg, (int32_t) NULL_WORD); 555 __ jcc(Assembler::equal, _continuation); 556 ce->store_parameter(addr()->as_pointer_register(), 0); 557 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::g1_post_barrier_slow_id))); 558 __ jmp(_continuation); 559} 560 561#endif // INCLUDE_ALL_GCS 562///////////////////////////////////////////////////////////////////////////// 563 564#undef __ 565