1/*
2 * Copyright (c) 2002, 2013, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2012, 2013 SAP SE. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26#ifndef CPU_PPC_VM_ICACHE_PPC_HPP
27#define CPU_PPC_VM_ICACHE_PPC_HPP
28
29// Interface for updating the instruction cache.  Whenever the VM modifies
30// code, part of the processor instruction cache potentially has to be flushed.
31
32class ICache : public AbstractICache {
33  friend class ICacheStubGenerator;
34  static int ppc64_flush_icache(address start, int lines, int magic);
35
36 public:
37  enum {
38    // Actually, cache line size is 64, but keeping it as it is to be
39    // on the safe side on ALL PPC64 implementations.
40    log2_line_size = 5,
41    line_size      = 1 << log2_line_size
42  };
43
44  static void ppc64_flush_icache_bytes(address start, int bytes) {
45    // Align start address to an icache line boundary and transform
46    // nbytes to an icache line count.
47    const uint line_offset = mask_address_bits(start, line_size - 1);
48    ppc64_flush_icache(start - line_offset, (bytes + line_offset + line_size - 1) >> log2_line_size, 0);
49  }
50};
51
52#endif // CPU_PPC_VM_ICACHE_PPC_HPP
53