1/* 2 * Copyright (c) 1999, 2015, Oracle and/or its affiliates. All rights reserved. 3 * Copyright (c) 2012, 2015 SAP SE. All rights reserved. 4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 5 * 6 * This code is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License version 2 only, as 8 * published by the Free Software Foundation. 9 * 10 * This code is distributed in the hope that it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 13 * version 2 for more details (a copy is included in the LICENSE file that 14 * accompanied this code). 15 * 16 * You should have received a copy of the GNU General Public License version 17 * 2 along with this work; if not, write to the Free Software Foundation, 18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 19 * 20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 21 * or visit www.oracle.com if you need additional information or have any 22 * questions. 23 * 24 */ 25 26#ifndef CPU_PPC_VM_C1_FRAMEMAP_PPC_HPP 27#define CPU_PPC_VM_C1_FRAMEMAP_PPC_HPP 28 29 public: 30 31 enum { 32 nof_reg_args = 8, // Registers R3-R10 are available for parameter passing. 33 first_available_sp_in_frame = frame::jit_out_preserve_size, 34 frame_pad_in_bytes = 0 35 }; 36 37 static const int pd_c_runtime_reserved_arg_size; 38 39 static LIR_Opr R0_opr; 40 static LIR_Opr R1_opr; 41 static LIR_Opr R2_opr; 42 static LIR_Opr R3_opr; 43 static LIR_Opr R4_opr; 44 static LIR_Opr R5_opr; 45 static LIR_Opr R6_opr; 46 static LIR_Opr R7_opr; 47 static LIR_Opr R8_opr; 48 static LIR_Opr R9_opr; 49 static LIR_Opr R10_opr; 50 static LIR_Opr R11_opr; 51 static LIR_Opr R12_opr; 52 static LIR_Opr R13_opr; 53 static LIR_Opr R14_opr; 54 static LIR_Opr R15_opr; 55 static LIR_Opr R16_opr; 56 static LIR_Opr R17_opr; 57 static LIR_Opr R18_opr; 58 static LIR_Opr R19_opr; 59 static LIR_Opr R20_opr; 60 static LIR_Opr R21_opr; 61 static LIR_Opr R22_opr; 62 static LIR_Opr R23_opr; 63 static LIR_Opr R24_opr; 64 static LIR_Opr R25_opr; 65 static LIR_Opr R26_opr; 66 static LIR_Opr R27_opr; 67 static LIR_Opr R28_opr; 68 static LIR_Opr R29_opr; 69 static LIR_Opr R30_opr; 70 static LIR_Opr R31_opr; 71 72 static LIR_Opr R0_oop_opr; 73 //R1: Stack pointer. Not an oop. 74 static LIR_Opr R2_oop_opr; 75 static LIR_Opr R3_oop_opr; 76 static LIR_Opr R4_oop_opr; 77 static LIR_Opr R5_oop_opr; 78 static LIR_Opr R6_oop_opr; 79 static LIR_Opr R7_oop_opr; 80 static LIR_Opr R8_oop_opr; 81 static LIR_Opr R9_oop_opr; 82 static LIR_Opr R10_oop_opr; 83 static LIR_Opr R11_oop_opr; 84 static LIR_Opr R12_oop_opr; 85 //R13: System thread register. Not usable. 86 static LIR_Opr R14_oop_opr; 87 static LIR_Opr R15_oop_opr; 88 //R16: Java thread register. Not an oop. 89 static LIR_Opr R17_oop_opr; 90 static LIR_Opr R18_oop_opr; 91 static LIR_Opr R19_oop_opr; 92 static LIR_Opr R20_oop_opr; 93 static LIR_Opr R21_oop_opr; 94 static LIR_Opr R22_oop_opr; 95 static LIR_Opr R23_oop_opr; 96 static LIR_Opr R24_oop_opr; 97 static LIR_Opr R25_oop_opr; 98 static LIR_Opr R26_oop_opr; 99 static LIR_Opr R27_oop_opr; 100 static LIR_Opr R28_oop_opr; 101 static LIR_Opr R29_oop_opr; 102 //R29: TOC register. Not an oop. 103 static LIR_Opr R30_oop_opr; 104 static LIR_Opr R31_oop_opr; 105 106 static LIR_Opr R0_metadata_opr; 107 //R1: Stack pointer. Not metadata. 108 static LIR_Opr R2_metadata_opr; 109 static LIR_Opr R3_metadata_opr; 110 static LIR_Opr R4_metadata_opr; 111 static LIR_Opr R5_metadata_opr; 112 static LIR_Opr R6_metadata_opr; 113 static LIR_Opr R7_metadata_opr; 114 static LIR_Opr R8_metadata_opr; 115 static LIR_Opr R9_metadata_opr; 116 static LIR_Opr R10_metadata_opr; 117 static LIR_Opr R11_metadata_opr; 118 static LIR_Opr R12_metadata_opr; 119 //R13: System thread register. Not usable. 120 static LIR_Opr R14_metadata_opr; 121 static LIR_Opr R15_metadata_opr; 122 //R16: Java thread register. Not metadata. 123 static LIR_Opr R17_metadata_opr; 124 static LIR_Opr R18_metadata_opr; 125 static LIR_Opr R19_metadata_opr; 126 static LIR_Opr R20_metadata_opr; 127 static LIR_Opr R21_metadata_opr; 128 static LIR_Opr R22_metadata_opr; 129 static LIR_Opr R23_metadata_opr; 130 static LIR_Opr R24_metadata_opr; 131 static LIR_Opr R25_metadata_opr; 132 static LIR_Opr R26_metadata_opr; 133 static LIR_Opr R27_metadata_opr; 134 static LIR_Opr R28_metadata_opr; 135 //R29: TOC register. Not metadata. 136 static LIR_Opr R30_metadata_opr; 137 static LIR_Opr R31_metadata_opr; 138 139 static LIR_Opr SP_opr; 140 141 static LIR_Opr R0_long_opr; 142 static LIR_Opr R3_long_opr; 143 144 static LIR_Opr F1_opr; 145 static LIR_Opr F1_double_opr; 146 147 private: 148 static FloatRegister _fpu_regs [nof_fpu_regs]; 149 150 static LIR_Opr as_long_single_opr(Register r) { 151 return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r)); 152 } 153 static LIR_Opr as_long_pair_opr(Register r) { 154 return LIR_OprFact::double_cpu(cpu_reg2rnr(r->successor()), cpu_reg2rnr(r)); 155 } 156 157 public: 158 159#ifdef _LP64 160 static LIR_Opr as_long_opr(Register r) { 161 return as_long_single_opr(r); 162 } 163 static LIR_Opr as_pointer_opr(Register r) { 164 return as_long_single_opr(r); 165 } 166#else 167 static LIR_Opr as_long_opr(Register r) { 168 Unimplemented(); return 0; 169// return as_long_pair_opr(r); 170 } 171 static LIR_Opr as_pointer_opr(Register r) { 172 Unimplemented(); return 0; 173// return as_opr(r); 174 } 175#endif 176 static LIR_Opr as_float_opr(FloatRegister r) { 177 return LIR_OprFact::single_fpu(r->encoding()); 178 } 179 static LIR_Opr as_double_opr(FloatRegister r) { 180 return LIR_OprFact::double_fpu(r->encoding()); 181 } 182 183 static FloatRegister nr2floatreg (int rnr); 184 185 static VMReg fpu_regname (int n); 186 187 static bool is_caller_save_register(LIR_Opr reg); 188 static bool is_caller_save_register(Register r); 189 190 static int nof_caller_save_cpu_regs() { return pd_nof_caller_save_cpu_regs_frame_map; } 191 static int last_cpu_reg() { return pd_last_cpu_reg; } 192 193 // Registers which need to be saved in the frames (e.g. for GC). 194 // Register usage: 195 // R0: scratch 196 // R1: sp 197 // R13: system thread id 198 // R16: java thread 199 // R29: global TOC 200 static bool reg_needs_save(Register r) { return r != R0 && r != R1 && r != R13 && r != R16 && r != R29; } 201 202#endif // CPU_PPC_VM_C1_FRAMEMAP_PPC_HPP 203