1/* 2 * Copyright (c) 1999, 2010, Oracle and/or its affiliates. All rights reserved. 3 * Copyright (c) 2014, Red Hat Inc. All rights reserved. 4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 5 * 6 * This code is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License version 2 only, as 8 * published by the Free Software Foundation. 9 * 10 * This code is distributed in the hope that it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 13 * version 2 for more details (a copy is included in the LICENSE file that 14 * accompanied this code). 15 * 16 * You should have received a copy of the GNU General Public License version 17 * 2 along with this work; if not, write to the Free Software Foundation, 18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 19 * 20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 21 * or visit www.oracle.com if you need additional information or have any 22 * questions. 23 * 24 */ 25 26#include "precompiled.hpp" 27#include "c1/c1_FrameMap.hpp" 28#include "c1/c1_LIR.hpp" 29#include "runtime/sharedRuntime.hpp" 30#include "vmreg_aarch64.inline.hpp" 31 32LIR_Opr FrameMap::map_to_opr(BasicType type, VMRegPair* reg, bool) { 33 LIR_Opr opr = LIR_OprFact::illegalOpr; 34 VMReg r_1 = reg->first(); 35 VMReg r_2 = reg->second(); 36 if (r_1->is_stack()) { 37 // Convert stack slot to an SP offset 38 // The calling convention does not count the SharedRuntime::out_preserve_stack_slots() value 39 // so we must add it in here. 40 int st_off = (r_1->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; 41 opr = LIR_OprFact::address(new LIR_Address(sp_opr, st_off, type)); 42 } else if (r_1->is_Register()) { 43 Register reg = r_1->as_Register(); 44 if (r_2->is_Register() && (type == T_LONG || type == T_DOUBLE)) { 45 Register reg2 = r_2->as_Register(); 46 assert(reg2 == reg, "must be same register"); 47 opr = as_long_opr(reg); 48 } else if (type == T_OBJECT || type == T_ARRAY) { 49 opr = as_oop_opr(reg); 50 } else if (type == T_METADATA) { 51 opr = as_metadata_opr(reg); 52 } else { 53 opr = as_opr(reg); 54 } 55 } else if (r_1->is_FloatRegister()) { 56 assert(type == T_DOUBLE || type == T_FLOAT, "wrong type"); 57 int num = r_1->as_FloatRegister()->encoding(); 58 if (type == T_FLOAT) { 59 opr = LIR_OprFact::single_fpu(num); 60 } else { 61 opr = LIR_OprFact::double_fpu(num); 62 } 63 } else { 64 ShouldNotReachHere(); 65 } 66 return opr; 67} 68 69LIR_Opr FrameMap::r0_opr; 70LIR_Opr FrameMap::r1_opr; 71LIR_Opr FrameMap::r2_opr; 72LIR_Opr FrameMap::r3_opr; 73LIR_Opr FrameMap::r4_opr; 74LIR_Opr FrameMap::r5_opr; 75LIR_Opr FrameMap::r6_opr; 76LIR_Opr FrameMap::r7_opr; 77LIR_Opr FrameMap::r8_opr; 78LIR_Opr FrameMap::r9_opr; 79LIR_Opr FrameMap::r10_opr; 80LIR_Opr FrameMap::r11_opr; 81LIR_Opr FrameMap::r12_opr; 82LIR_Opr FrameMap::r13_opr; 83LIR_Opr FrameMap::r14_opr; 84LIR_Opr FrameMap::r15_opr; 85LIR_Opr FrameMap::r16_opr; 86LIR_Opr FrameMap::r17_opr; 87LIR_Opr FrameMap::r18_opr; 88LIR_Opr FrameMap::r19_opr; 89LIR_Opr FrameMap::r20_opr; 90LIR_Opr FrameMap::r21_opr; 91LIR_Opr FrameMap::r22_opr; 92LIR_Opr FrameMap::r23_opr; 93LIR_Opr FrameMap::r24_opr; 94LIR_Opr FrameMap::r25_opr; 95LIR_Opr FrameMap::r26_opr; 96LIR_Opr FrameMap::r27_opr; 97LIR_Opr FrameMap::r28_opr; 98LIR_Opr FrameMap::r29_opr; 99LIR_Opr FrameMap::r30_opr; 100 101LIR_Opr FrameMap::rfp_opr; 102LIR_Opr FrameMap::sp_opr; 103 104LIR_Opr FrameMap::receiver_opr; 105 106LIR_Opr FrameMap::r0_oop_opr; 107LIR_Opr FrameMap::r1_oop_opr; 108LIR_Opr FrameMap::r2_oop_opr; 109LIR_Opr FrameMap::r3_oop_opr; 110LIR_Opr FrameMap::r4_oop_opr; 111LIR_Opr FrameMap::r5_oop_opr; 112LIR_Opr FrameMap::r6_oop_opr; 113LIR_Opr FrameMap::r7_oop_opr; 114LIR_Opr FrameMap::r8_oop_opr; 115LIR_Opr FrameMap::r9_oop_opr; 116LIR_Opr FrameMap::r10_oop_opr; 117LIR_Opr FrameMap::r11_oop_opr; 118LIR_Opr FrameMap::r12_oop_opr; 119LIR_Opr FrameMap::r13_oop_opr; 120LIR_Opr FrameMap::r14_oop_opr; 121LIR_Opr FrameMap::r15_oop_opr; 122LIR_Opr FrameMap::r16_oop_opr; 123LIR_Opr FrameMap::r17_oop_opr; 124LIR_Opr FrameMap::r18_oop_opr; 125LIR_Opr FrameMap::r19_oop_opr; 126LIR_Opr FrameMap::r20_oop_opr; 127LIR_Opr FrameMap::r21_oop_opr; 128LIR_Opr FrameMap::r22_oop_opr; 129LIR_Opr FrameMap::r23_oop_opr; 130LIR_Opr FrameMap::r24_oop_opr; 131LIR_Opr FrameMap::r25_oop_opr; 132LIR_Opr FrameMap::r26_oop_opr; 133LIR_Opr FrameMap::r27_oop_opr; 134LIR_Opr FrameMap::r28_oop_opr; 135LIR_Opr FrameMap::r29_oop_opr; 136LIR_Opr FrameMap::r30_oop_opr; 137 138LIR_Opr FrameMap::rscratch1_opr; 139LIR_Opr FrameMap::rscratch2_opr; 140LIR_Opr FrameMap::rscratch1_long_opr; 141LIR_Opr FrameMap::rscratch2_long_opr; 142 143LIR_Opr FrameMap::r0_metadata_opr; 144LIR_Opr FrameMap::r1_metadata_opr; 145LIR_Opr FrameMap::r2_metadata_opr; 146LIR_Opr FrameMap::r3_metadata_opr; 147LIR_Opr FrameMap::r4_metadata_opr; 148LIR_Opr FrameMap::r5_metadata_opr; 149 150LIR_Opr FrameMap::long0_opr; 151LIR_Opr FrameMap::long1_opr; 152LIR_Opr FrameMap::fpu0_float_opr; 153LIR_Opr FrameMap::fpu0_double_opr; 154 155LIR_Opr FrameMap::_caller_save_cpu_regs[] = { 0, }; 156LIR_Opr FrameMap::_caller_save_fpu_regs[] = { 0, }; 157 158//-------------------------------------------------------- 159// FrameMap 160//-------------------------------------------------------- 161 162void FrameMap::initialize() { 163 assert(!_init_done, "once"); 164 165 int i=0; 166 map_register(i, r0); r0_opr = LIR_OprFact::single_cpu(i); i++; 167 map_register(i, r1); r1_opr = LIR_OprFact::single_cpu(i); i++; 168 map_register(i, r2); r2_opr = LIR_OprFact::single_cpu(i); i++; 169 map_register(i, r3); r3_opr = LIR_OprFact::single_cpu(i); i++; 170 map_register(i, r4); r4_opr = LIR_OprFact::single_cpu(i); i++; 171 map_register(i, r5); r5_opr = LIR_OprFact::single_cpu(i); i++; 172 map_register(i, r6); r6_opr = LIR_OprFact::single_cpu(i); i++; 173 map_register(i, r7); r7_opr = LIR_OprFact::single_cpu(i); i++; 174 map_register(i, r10); r10_opr = LIR_OprFact::single_cpu(i); i++; 175 map_register(i, r11); r11_opr = LIR_OprFact::single_cpu(i); i++; 176 map_register(i, r12); r12_opr = LIR_OprFact::single_cpu(i); i++; 177 map_register(i, r13); r13_opr = LIR_OprFact::single_cpu(i); i++; 178 map_register(i, r14); r14_opr = LIR_OprFact::single_cpu(i); i++; 179 map_register(i, r15); r15_opr = LIR_OprFact::single_cpu(i); i++; 180 map_register(i, r16); r16_opr = LIR_OprFact::single_cpu(i); i++; 181 map_register(i, r17); r17_opr = LIR_OprFact::single_cpu(i); i++; 182 map_register(i, r18); r18_opr = LIR_OprFact::single_cpu(i); i++; 183 map_register(i, r19); r19_opr = LIR_OprFact::single_cpu(i); i++; 184 map_register(i, r20); r20_opr = LIR_OprFact::single_cpu(i); i++; 185 map_register(i, r21); r21_opr = LIR_OprFact::single_cpu(i); i++; 186 map_register(i, r22); r22_opr = LIR_OprFact::single_cpu(i); i++; 187 map_register(i, r23); r23_opr = LIR_OprFact::single_cpu(i); i++; 188 map_register(i, r24); r24_opr = LIR_OprFact::single_cpu(i); i++; 189 map_register(i, r25); r25_opr = LIR_OprFact::single_cpu(i); i++; 190 map_register(i, r26); r26_opr = LIR_OprFact::single_cpu(i); i++; 191 192 map_register(i, r27); r27_opr = LIR_OprFact::single_cpu(i); i++; // rheapbase 193 map_register(i, r28); r28_opr = LIR_OprFact::single_cpu(i); i++; // rthread 194 map_register(i, r29); r29_opr = LIR_OprFact::single_cpu(i); i++; // rfp 195 map_register(i, r30); r30_opr = LIR_OprFact::single_cpu(i); i++; // lr 196 map_register(i, r31_sp); sp_opr = LIR_OprFact::single_cpu(i); i++; // sp 197 map_register(i, r8); r8_opr = LIR_OprFact::single_cpu(i); i++; // rscratch1 198 map_register(i, r9); r9_opr = LIR_OprFact::single_cpu(i); i++; // rscratch2 199 200 rscratch1_opr = r8_opr; 201 rscratch2_opr = r9_opr; 202 rscratch1_long_opr = LIR_OprFact::double_cpu(r8_opr->cpu_regnr(), r8_opr->cpu_regnr()); 203 rscratch2_long_opr = LIR_OprFact::double_cpu(r9_opr->cpu_regnr(), r9_opr->cpu_regnr()); 204 205 long0_opr = LIR_OprFact::double_cpu(0, 0); 206 long1_opr = LIR_OprFact::double_cpu(1, 1); 207 208 fpu0_float_opr = LIR_OprFact::single_fpu(0); 209 fpu0_double_opr = LIR_OprFact::double_fpu(0); 210 211 _caller_save_cpu_regs[0] = r0_opr; 212 _caller_save_cpu_regs[1] = r1_opr; 213 _caller_save_cpu_regs[2] = r2_opr; 214 _caller_save_cpu_regs[3] = r3_opr; 215 _caller_save_cpu_regs[4] = r4_opr; 216 _caller_save_cpu_regs[5] = r5_opr; 217 _caller_save_cpu_regs[6] = r6_opr; 218 _caller_save_cpu_regs[7] = r7_opr; 219 // rscratch1, rscratch 2 not included 220 _caller_save_cpu_regs[8] = r10_opr; 221 _caller_save_cpu_regs[9] = r11_opr; 222 _caller_save_cpu_regs[10] = r12_opr; 223 _caller_save_cpu_regs[11] = r13_opr; 224 _caller_save_cpu_regs[12] = r14_opr; 225 _caller_save_cpu_regs[13] = r15_opr; 226 _caller_save_cpu_regs[14] = r16_opr; 227 _caller_save_cpu_regs[15] = r17_opr; 228 _caller_save_cpu_regs[16] = r18_opr; 229 230 for (int i = 0; i < 8; i++) { 231 _caller_save_fpu_regs[i] = LIR_OprFact::single_fpu(i); 232 } 233 234 _init_done = true; 235 236 r0_oop_opr = as_oop_opr(r0); 237 r1_oop_opr = as_oop_opr(r1); 238 r2_oop_opr = as_oop_opr(r2); 239 r3_oop_opr = as_oop_opr(r3); 240 r4_oop_opr = as_oop_opr(r4); 241 r5_oop_opr = as_oop_opr(r5); 242 r6_oop_opr = as_oop_opr(r6); 243 r7_oop_opr = as_oop_opr(r7); 244 r8_oop_opr = as_oop_opr(r8); 245 r9_oop_opr = as_oop_opr(r9); 246 r10_oop_opr = as_oop_opr(r10); 247 r11_oop_opr = as_oop_opr(r11); 248 r12_oop_opr = as_oop_opr(r12); 249 r13_oop_opr = as_oop_opr(r13); 250 r14_oop_opr = as_oop_opr(r14); 251 r15_oop_opr = as_oop_opr(r15); 252 r16_oop_opr = as_oop_opr(r16); 253 r17_oop_opr = as_oop_opr(r17); 254 r18_oop_opr = as_oop_opr(r18); 255 r19_oop_opr = as_oop_opr(r19); 256 r20_oop_opr = as_oop_opr(r20); 257 r21_oop_opr = as_oop_opr(r21); 258 r22_oop_opr = as_oop_opr(r22); 259 r23_oop_opr = as_oop_opr(r23); 260 r24_oop_opr = as_oop_opr(r24); 261 r25_oop_opr = as_oop_opr(r25); 262 r26_oop_opr = as_oop_opr(r26); 263 r27_oop_opr = as_oop_opr(r27); 264 r28_oop_opr = as_oop_opr(r28); 265 r29_oop_opr = as_oop_opr(r29); 266 r30_oop_opr = as_oop_opr(r30); 267 268 r0_metadata_opr = as_metadata_opr(r0); 269 r1_metadata_opr = as_metadata_opr(r1); 270 r2_metadata_opr = as_metadata_opr(r2); 271 r3_metadata_opr = as_metadata_opr(r3); 272 r4_metadata_opr = as_metadata_opr(r4); 273 r5_metadata_opr = as_metadata_opr(r5); 274 275 sp_opr = as_pointer_opr(r31_sp); 276 rfp_opr = as_pointer_opr(rfp); 277 278 VMRegPair regs; 279 BasicType sig_bt = T_OBJECT; 280 SharedRuntime::java_calling_convention(&sig_bt, ®s, 1, true); 281 receiver_opr = as_oop_opr(regs.first()->as_Register()); 282 283 for (int i = 0; i < nof_caller_save_fpu_regs; i++) { 284 _caller_save_fpu_regs[i] = LIR_OprFact::single_fpu(i); 285 } 286} 287 288 289Address FrameMap::make_new_address(ByteSize sp_offset) const { 290 // for rbp, based address use this: 291 // return Address(rbp, in_bytes(sp_offset) - (framesize() - 2) * 4); 292 return Address(sp, in_bytes(sp_offset)); 293} 294 295 296// ----------------mapping----------------------- 297// all mapping is based on rfp addressing, except for simple leaf methods where we access 298// the locals sp based (and no frame is built) 299 300 301// Frame for simple leaf methods (quick entries) 302// 303// +----------+ 304// | ret addr | <- TOS 305// +----------+ 306// | args | 307// | ...... | 308 309// Frame for standard methods 310// 311// | .........| <- TOS 312// | locals | 313// +----------+ 314// | old fp, | <- RFP 315// +----------+ 316// | ret addr | 317// +----------+ 318// | args | 319// | .........| 320 321 322// For OopMaps, map a local variable or spill index to an VMRegImpl name. 323// This is the offset from sp() in the frame of the slot for the index, 324// skewed by VMRegImpl::stack0 to indicate a stack location (vs.a register.) 325// 326// framesize + 327// stack0 stack0 0 <- VMReg 328// | | <registers> | 329// ...........|..............|.............| 330// 0 1 2 3 x x 4 5 6 ... | <- local indices 331// ^ ^ sp() ( x x indicate link 332// | | and return addr) 333// arguments non-argument locals 334 335 336VMReg FrameMap::fpu_regname (int n) { 337 // Return the OptoReg name for the fpu stack slot "n" 338 // A spilled fpu stack slot comprises to two single-word OptoReg's. 339 return as_FloatRegister(n)->as_VMReg(); 340} 341 342LIR_Opr FrameMap::stack_pointer() { 343 return FrameMap::sp_opr; 344} 345 346 347// JSR 292 348LIR_Opr FrameMap::method_handle_invoke_SP_save_opr() { 349 return LIR_OprFact::illegalOpr; // Not needed on aarch64 350} 351 352 353bool FrameMap::validate_frame() { 354 return true; 355} 356