1/*
2 * Copyright (c) 2013, 2015, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 */
23package org.graalvm.compiler.hotspot.aarch64;
24
25import static jdk.vm.ci.aarch64.AArch64.zr;
26import static jdk.vm.ci.code.ValueUtil.asRegister;
27import static jdk.vm.ci.code.ValueUtil.isRegister;
28import static org.graalvm.compiler.lir.LIRInstruction.OperandFlag.HINT;
29import static org.graalvm.compiler.lir.LIRInstruction.OperandFlag.ILLEGAL;
30import static org.graalvm.compiler.lir.LIRInstruction.OperandFlag.REG;
31import static org.graalvm.compiler.lir.LIRInstruction.OperandFlag.STACK;
32
33import org.graalvm.compiler.asm.Label;
34import org.graalvm.compiler.asm.aarch64.AArch64Assembler;
35import org.graalvm.compiler.asm.aarch64.AArch64MacroAssembler;
36import org.graalvm.compiler.core.common.CompressEncoding;
37import org.graalvm.compiler.lir.LIRInstructionClass;
38import org.graalvm.compiler.lir.StandardOp.LoadConstantOp;
39import org.graalvm.compiler.lir.aarch64.AArch64LIRInstruction;
40import org.graalvm.compiler.lir.asm.CompilationResultBuilder;
41
42import jdk.vm.ci.code.Register;
43import jdk.vm.ci.hotspot.HotSpotConstant;
44import jdk.vm.ci.meta.AllocatableValue;
45import jdk.vm.ci.meta.Constant;
46
47public class AArch64HotSpotMove {
48
49    public static class LoadHotSpotObjectConstantInline extends AArch64LIRInstruction implements LoadConstantOp {
50        public static final LIRInstructionClass<LoadHotSpotObjectConstantInline> TYPE = LIRInstructionClass.create(LoadHotSpotObjectConstantInline.class);
51
52        private HotSpotConstant constant;
53        @Def({REG, STACK}) AllocatableValue result;
54
55        public LoadHotSpotObjectConstantInline(HotSpotConstant constant, AllocatableValue result) {
56            super(TYPE);
57            this.constant = constant;
58            this.result = result;
59        }
60
61        @Override
62        protected void emitCode(CompilationResultBuilder crb, AArch64MacroAssembler masm) {
63            crb.recordInlineDataInCode(constant);
64            if (constant.isCompressed()) {
65                // masm.forceMov(asRegister(result), 0);
66                masm.movNarrowAddress(asRegister(result), 0);
67            } else {
68                masm.movNativeAddress(asRegister(result), 0);
69            }
70        }
71
72        @Override
73        public AllocatableValue getResult() {
74            return result;
75        }
76
77        @Override
78        public Constant getConstant() {
79            return constant;
80        }
81    }
82
83    /**
84     * Compresses a 8-byte pointer as a 4-byte int.
85     */
86    public static class CompressPointer extends AArch64LIRInstruction {
87        public static final LIRInstructionClass<CompressPointer> TYPE = LIRInstructionClass.create(CompressPointer.class);
88
89        private final CompressEncoding encoding;
90        private final boolean nonNull;
91
92        @Def({REG, HINT}) protected AllocatableValue result;
93        @Use({REG}) protected AllocatableValue input;
94        @Alive({REG, ILLEGAL}) protected AllocatableValue baseRegister;
95
96        public CompressPointer(AllocatableValue result, AllocatableValue input, AllocatableValue baseRegister, CompressEncoding encoding, boolean nonNull) {
97            super(TYPE);
98            this.result = result;
99            this.input = input;
100            this.baseRegister = baseRegister;
101            this.encoding = encoding;
102            this.nonNull = nonNull;
103        }
104
105        @Override
106        public void emitCode(CompilationResultBuilder crb, AArch64MacroAssembler masm) {
107            Register resultRegister = asRegister(result);
108            Register ptr = asRegister(input);
109            Register base = (isRegister(baseRegister) ? asRegister(baseRegister) : zr);
110            // result = (ptr - base) >> shift
111            if (!encoding.hasBase()) {
112                if (encoding.hasShift()) {
113                    masm.lshr(64, resultRegister, ptr, encoding.getShift());
114                } else {
115                    masm.movx(resultRegister, ptr);
116                }
117            } else if (nonNull) {
118                masm.sub(64, resultRegister, ptr, base);
119                if (encoding.hasShift()) {
120                    masm.shl(64, resultRegister, resultRegister, encoding.getShift());
121                }
122            } else {
123                // if ptr is null it still has to be null after compression
124                masm.cmp(64, ptr, 0);
125                masm.cmov(64, resultRegister, ptr, base, AArch64Assembler.ConditionFlag.NE);
126                masm.sub(64, resultRegister, resultRegister, base);
127                if (encoding.hasShift()) {
128                    masm.lshr(64, resultRegister, resultRegister, encoding.getShift());
129                }
130            }
131        }
132    }
133
134    /**
135     * Decompresses a 4-byte offset into an actual pointer.
136     */
137    public static class UncompressPointer extends AArch64LIRInstruction {
138        public static final LIRInstructionClass<UncompressPointer> TYPE = LIRInstructionClass.create(UncompressPointer.class);
139
140        private final CompressEncoding encoding;
141        private final boolean nonNull;
142
143        @Def({REG}) protected AllocatableValue result;
144        @Use({REG}) protected AllocatableValue input;
145        @Alive({REG, ILLEGAL}) protected AllocatableValue baseRegister;
146
147        public UncompressPointer(AllocatableValue result, AllocatableValue input, AllocatableValue baseRegister, CompressEncoding encoding, boolean nonNull) {
148            super(TYPE);
149            this.result = result;
150            this.input = input;
151            this.baseRegister = baseRegister;
152            this.encoding = encoding;
153            this.nonNull = nonNull;
154        }
155
156        @Override
157        public void emitCode(CompilationResultBuilder crb, AArch64MacroAssembler masm) {
158            Register ptr = asRegister(input);
159            Register resultRegister = asRegister(result);
160            Register base = (isRegister(baseRegister) ? asRegister(baseRegister) : zr);
161            // result = base + (ptr << shift)
162            if (nonNull) {
163                masm.add(64, resultRegister, base, ptr, AArch64Assembler.ShiftType.LSL, encoding.getShift());
164            } else if (!encoding.hasBase()) {
165                masm.add(64, resultRegister, zr, ptr, AArch64Assembler.ShiftType.LSL, encoding.getShift());
166            } else {
167                // if ptr is null it has to be null after decompression
168                Label done = new Label();
169                if (!resultRegister.equals(ptr)) {
170                    masm.mov(32, resultRegister, ptr);
171                }
172                masm.cbz(32, resultRegister, done);
173                masm.add(64, resultRegister, base, resultRegister, AArch64Assembler.ShiftType.LSL, encoding.getShift());
174                masm.bind(done);
175            }
176        }
177    }
178
179    //
180    // private static void decompressPointer(CompilationResultBuilder crb, ARMv8MacroAssembler masm,
181    // Register result,
182    // Register ptr, long base, int shift, int alignment) {
183    // assert base != 0 || shift == 0 || alignment == shift;
184    // // result = heapBase + ptr << alignment
185    // Register heapBase = ARMv8.heapBaseRegister;
186    // // if result == 0, we make sure that it will still be 0 at the end, so that it traps when
187    // // loading storing a value.
188    // masm.cmp(32, ptr, 0);
189    // masm.add(64, result, heapBase, ptr, ARMv8Assembler.ExtendType.UXTX, alignment);
190    // masm.cmov(64, result, result, ARMv8.zr, ARMv8Assembler.ConditionFlag.NE);
191    // }
192
193    public static void decodeKlassPointer(AArch64MacroAssembler masm, Register result, Register ptr, Register klassBase, CompressEncoding encoding) {
194        // result = klassBase + ptr << shift
195        if (encoding.hasShift() || encoding.hasBase()) {
196            masm.add(64, result, klassBase, ptr, AArch64Assembler.ExtendType.UXTX, encoding.getShift());
197        }
198    }
199
200}
201