1/* 2 * Copyright (c) 2016, 2017, Oracle and/or its affiliates. All rights reserved. 3 * Copyright (c) 2016, 2017 SAP SE. All rights reserved. 4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 5 * 6 * This code is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License version 2 only, as 8 * published by the Free Software Foundation. 9 * 10 * This code is distributed in the hope that it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 13 * version 2 for more details (a copy is included in the LICENSE file that 14 * accompanied this code). 15 * 16 * You should have received a copy of the GNU General Public License version 17 * 2 along with this work; if not, write to the Free Software Foundation, 18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 19 * 20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 21 * or visit www.oracle.com if you need additional information or have any 22 * questions. 23 * 24 */ 25 26#include "precompiled.hpp" 27#include "asm/assembler.inline.hpp" 28#include "compiler/disassembler.hpp" 29#include "code/compiledIC.hpp" 30#include "memory/resourceArea.hpp" 31#include "prims/jvm.h" 32#include "runtime/java.hpp" 33#include "runtime/stubCodeGenerator.hpp" 34#include "vm_version_s390.hpp" 35 36# include <sys/sysinfo.h> 37 38bool VM_Version::_is_determine_features_test_running = false; 39 40unsigned long VM_Version::_features[_features_buffer_len] = {0, 0, 0, 0}; 41unsigned long VM_Version::_cipher_features[_features_buffer_len] = {0, 0, 0, 0}; 42unsigned long VM_Version::_msgdigest_features[_features_buffer_len] = {0, 0, 0, 0}; 43unsigned int VM_Version::_nfeatures = 0; 44unsigned int VM_Version::_ncipher_features = 0; 45unsigned int VM_Version::_nmsgdigest_features = 0; 46unsigned int VM_Version::_Dcache_lineSize = 256; 47unsigned int VM_Version::_Icache_lineSize = 256; 48 49static const char* z_gen[] = {" ", "G1", "G2", "G3", "G4", "G5", "G6", "G7" }; 50static const char* z_machine[] = {" ", "2064", "2084", "2094", "2097", "2817", " ", "2964" }; 51static const char* z_name[] = {" ", "z900", "z990", "z9 EC", "z10 EC", "z196 EC", "ec12", "z13" }; 52 53void VM_Version::initialize() { 54 determine_features(); // Get processor capabilities. 55 set_features_string(); // Set a descriptive feature indication. 56 57 if (Verbose) { 58 print_features(); 59 } 60 61 intx cache_line_size = Dcache_lineSize(0); 62 63 MaxVectorSize = 8; 64 65 if (has_PrefetchRaw()) { 66 if (FLAG_IS_DEFAULT(AllocatePrefetchStyle)) { // not preset 67 // 0 = no prefetch. 68 // 1 = Prefetch instructions for each allocation. 69 // 2 = Use TLAB watermark to gate allocation prefetch. 70 AllocatePrefetchStyle = 1; 71 } 72 73 if (AllocatePrefetchStyle > 0) { // Prefetching turned on at all? 74 // Distance to prefetch ahead of allocation pointer. 75 if (FLAG_IS_DEFAULT(AllocatePrefetchDistance) || (AllocatePrefetchDistance < 0)) { // not preset 76 AllocatePrefetchDistance = 0; 77 } 78 79 // Number of lines to prefetch ahead of allocation pointer. 80 if (FLAG_IS_DEFAULT(AllocatePrefetchLines) || (AllocatePrefetchLines <= 0)) { // not preset 81 AllocatePrefetchLines = 3; 82 } 83 84 // Step size in bytes of sequential prefetch instructions. 85 if (FLAG_IS_DEFAULT(AllocatePrefetchStepSize) || (AllocatePrefetchStepSize <= 0)) { // not preset 86 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size); 87 } else if (AllocatePrefetchStepSize < cache_line_size) { 88 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size); 89 } else { 90 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size); 91 } 92 } else { 93 FLAG_SET_DEFAULT(AllocatePrefetchStyle, 0); 94 AllocatePrefetchDistance = 0; 95 AllocatePrefetchLines = 0; 96 // Can't be zero. Will SIGFPE during constraints checking. 97 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size); 98 } 99 100 } else { 101 FLAG_SET_DEFAULT(AllocatePrefetchStyle, 0); 102 AllocatePrefetchDistance = 0; 103 AllocatePrefetchLines = 0; 104 // Can't be zero. Will SIGFPE during constraints checking. 105 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size); 106 } 107 108 // TODO: 109 // On z/Architecture, cache line size is significantly large (256 bytes). Do we really need 110 // to keep contended members that far apart? Performance tests are required. 111 if (FLAG_IS_DEFAULT(ContendedPaddingWidth) && (cache_line_size > ContendedPaddingWidth)) { 112 ContendedPaddingWidth = cache_line_size; 113 } 114 115 // On z/Architecture, the CRC32/CRC32C intrinsics are implemented "by hand". 116 // TODO: Provide implementation based on the vector instructions available from z13. 117 // Note: The CHECKSUM instruction, which has been there since the very beginning 118 // (of z/Architecture), computes "some kind of" a checksum. 119 // It has nothing to do with the CRC32 algorithm. 120 if (FLAG_IS_DEFAULT(UseCRC32Intrinsics)) { 121 FLAG_SET_DEFAULT(UseCRC32Intrinsics, true); 122 } 123 if (FLAG_IS_DEFAULT(UseCRC32CIntrinsics)) { 124 FLAG_SET_DEFAULT(UseCRC32CIntrinsics, true); 125 } 126 127 // TODO: Provide implementation. 128 if (UseAdler32Intrinsics) { 129 warning("Adler32Intrinsics not available on this CPU."); 130 FLAG_SET_DEFAULT(UseAdler32Intrinsics, false); 131 } 132 133 // On z/Architecture, we take UseAES as the general switch to enable/disable the AES intrinsics. 134 // The specific, and yet to be defined, switches UseAESxxxIntrinsics will then be set 135 // depending on the actual machine capabilities. 136 // Explicitly setting them via CmdLine option takes precedence, of course. 137 // TODO: UseAESIntrinsics must be made keylength specific. 138 // As of March 2015 and Java8, only AES128 is supported by the Java Cryptographic Extensions. 139 // Therefore, UseAESIntrinsics is of minimal use at the moment. 140 if (FLAG_IS_DEFAULT(UseAES) && has_Crypto_AES()) { 141 FLAG_SET_DEFAULT(UseAES, true); 142 } 143 if (UseAES && !has_Crypto_AES()) { 144 warning("AES instructions are not available on this CPU"); 145 FLAG_SET_DEFAULT(UseAES, false); 146 } 147 if (UseAES) { 148 if (FLAG_IS_DEFAULT(UseAESIntrinsics)) { 149 FLAG_SET_DEFAULT(UseAESIntrinsics, true); 150 } 151 } 152 if (UseAESIntrinsics && !has_Crypto_AES()) { 153 warning("AES intrinsics are not available on this CPU"); 154 FLAG_SET_DEFAULT(UseAESIntrinsics, false); 155 } 156 if (UseAESIntrinsics && !UseAES) { 157 warning("AES intrinsics require UseAES flag to be enabled. Intrinsics will be disabled."); 158 FLAG_SET_DEFAULT(UseAESIntrinsics, false); 159 } 160 161 // TODO: implement AES/CTR intrinsics 162 if (UseAESCTRIntrinsics) { 163 warning("AES/CTR intrinsics are not available on this CPU"); 164 FLAG_SET_DEFAULT(UseAESCTRIntrinsics, false); 165 } 166 167 // TODO: implement GHASH intrinsics 168 if (UseGHASHIntrinsics) { 169 warning("GHASH intrinsics are not available on this CPU"); 170 FLAG_SET_DEFAULT(UseGHASHIntrinsics, false); 171 } 172 173 if (FLAG_IS_DEFAULT(UseFMA)) { 174 FLAG_SET_DEFAULT(UseFMA, true); 175 } 176 177 // On z/Architecture, we take UseSHA as the general switch to enable/disable the SHA intrinsics. 178 // The specific switches UseSHAxxxIntrinsics will then be set depending on the actual 179 // machine capabilities. 180 // Explicitly setting them via CmdLine option takes precedence, of course. 181 if (FLAG_IS_DEFAULT(UseSHA) && has_Crypto_SHA()) { 182 FLAG_SET_DEFAULT(UseSHA, true); 183 } 184 if (UseSHA && !has_Crypto_SHA()) { 185 warning("SHA instructions are not available on this CPU"); 186 FLAG_SET_DEFAULT(UseSHA, false); 187 } 188 if (UseSHA && has_Crypto_SHA1()) { 189 if (FLAG_IS_DEFAULT(UseSHA1Intrinsics)) { 190 FLAG_SET_DEFAULT(UseSHA1Intrinsics, true); 191 } 192 } else if (UseSHA1Intrinsics) { 193 warning("Intrinsics for SHA-1 crypto hash functions not available on this CPU."); 194 FLAG_SET_DEFAULT(UseSHA1Intrinsics, false); 195 } 196 if (UseSHA && has_Crypto_SHA256()) { 197 if (FLAG_IS_DEFAULT(UseSHA256Intrinsics)) { 198 FLAG_SET_DEFAULT(UseSHA256Intrinsics, true); 199 } 200 } else if (UseSHA256Intrinsics) { 201 warning("Intrinsics for SHA-224 and SHA-256 crypto hash functions not available on this CPU."); 202 FLAG_SET_DEFAULT(UseSHA256Intrinsics, false); 203 } 204 if (UseSHA && has_Crypto_SHA512()) { 205 if (FLAG_IS_DEFAULT(UseSHA512Intrinsics)) { 206 FLAG_SET_DEFAULT(UseSHA512Intrinsics, true); 207 } 208 } else if (UseSHA512Intrinsics) { 209 warning("Intrinsics for SHA-384 and SHA-512 crypto hash functions not available on this CPU."); 210 FLAG_SET_DEFAULT(UseSHA512Intrinsics, false); 211 } 212 213 if (FLAG_IS_DEFAULT(UseMultiplyToLenIntrinsic)) { 214 FLAG_SET_DEFAULT(UseMultiplyToLenIntrinsic, true); 215 } 216 if (FLAG_IS_DEFAULT(UseMontgomeryMultiplyIntrinsic)) { 217 FLAG_SET_DEFAULT(UseMontgomeryMultiplyIntrinsic, true); 218 } 219 if (FLAG_IS_DEFAULT(UseMontgomerySquareIntrinsic)) { 220 FLAG_SET_DEFAULT(UseMontgomerySquareIntrinsic, true); 221 } 222 if (FLAG_IS_DEFAULT(UsePopCountInstruction)) { 223 FLAG_SET_DEFAULT(UsePopCountInstruction, true); 224 } 225 226 // z/Architecture supports 8-byte compare-exchange operations 227 // (see Atomic::cmpxchg and StubGenerator::generate_atomic_cmpxchg_ptr) 228 // and 'atomic long memory ops' (see Unsafe_GetLongVolatile). 229 _supports_cx8 = true; 230 231 _supports_atomic_getadd4 = VM_Version::has_LoadAndALUAtomicV1(); 232 _supports_atomic_getadd8 = VM_Version::has_LoadAndALUAtomicV1(); 233 234 // z/Architecture supports unaligned memory accesses. 235 // Performance penalty is negligible. An additional tick or so 236 // is lost if the accessed data spans a cache line boundary. 237 // Unaligned accesses are not atomic, of course. 238 if (FLAG_IS_DEFAULT(UseUnalignedAccesses)) { 239 FLAG_SET_DEFAULT(UseUnalignedAccesses, true); 240 } 241} 242 243 244void VM_Version::set_features_string() { 245 246 unsigned int ambiguity = 0; 247 if (is_z13()) { 248 _features_string = "System z G7-z13 (LDISP_fast, ExtImm, PCrel Load/Store, CmpB, Cond Load/Store, Interlocked Update, TxM, VectorInstr)"; 249 ambiguity++; 250 } 251 if (is_ec12()) { 252 _features_string = "System z G6-EC12 (LDISP_fast, ExtImm, PCrel Load/Store, CmpB, Cond Load/Store, Interlocked Update, TxM)"; 253 ambiguity++; 254 } 255 if (is_z196()) { 256 _features_string = "System z G5-z196 (LDISP_fast, ExtImm, PCrel Load/Store, CmpB, Cond Load/Store, Interlocked Update)"; 257 ambiguity++; 258 } 259 if (is_z10()) { 260 _features_string = "System z G4-z10 (LDISP_fast, ExtImm, PCrel Load/Store, CmpB)"; 261 ambiguity++; 262 } 263 if (is_z9()) { 264 _features_string = "System z G3-z9 (LDISP_fast, ExtImm), out-of-support as of 2016-04-01"; 265 ambiguity++; 266 } 267 if (is_z990()) { 268 _features_string = "System z G2-z990 (LDISP_fast), out-of-support as of 2014-07-01"; 269 ambiguity++; 270 } 271 if (is_z900()) { 272 _features_string = "System z G1-z900 (LDISP), out-of-support as of 2014-07-01"; 273 ambiguity++; 274 } 275 276 if (ambiguity == 0) { 277 _features_string = "z/Architecture (unknown generation)"; 278 } else if (ambiguity > 1) { 279 tty->print_cr("*** WARNING *** Ambiguous z/Architecture detection, ambiguity = %d", ambiguity); 280 tty->print_cr(" oldest detected generation is %s", _features_string); 281 _features_string = "z/Architecture (ambiguous detection)"; 282 } 283 284 if (has_Crypto_AES()) { 285 char buf[256]; 286 assert(strlen(_features_string) + 4 + 3*4 + 1 < sizeof(buf), "increase buffer size"); 287 jio_snprintf(buf, sizeof(buf), "%s aes%s%s%s", // String 'aes' must be surrounded by spaces so that jtreg tests recognize it. 288 _features_string, 289 has_Crypto_AES128() ? " 128" : "", 290 has_Crypto_AES192() ? " 192" : "", 291 has_Crypto_AES256() ? " 256" : ""); 292 _features_string = os::strdup(buf); 293 } 294 295 if (has_Crypto_SHA()) { 296 char buf[256]; 297 assert(strlen(_features_string) + 4 + 2 + 2*4 + 6 + 1 < sizeof(buf), "increase buffer size"); 298 // String 'sha1' etc must be surrounded by spaces so that jtreg tests recognize it. 299 jio_snprintf(buf, sizeof(buf), "%s %s%s%s%s", 300 _features_string, 301 has_Crypto_SHA1() ? " sha1" : "", 302 has_Crypto_SHA256() ? " sha256" : "", 303 has_Crypto_SHA512() ? " sha512" : "", 304 has_Crypto_GHASH() ? " ghash" : ""); 305 if (has_Crypto_AES()) { os::free((void *)_features_string); } 306 _features_string = os::strdup(buf); 307 } 308} 309 310// featureBuffer - bit array indicating availability of various features 311// featureNum - bit index of feature to be tested 312// Featurenum < 0 requests test for any nonzero bit in featureBuffer. 313// bufLen - length of featureBuffer in bits 314bool VM_Version::test_feature_bit(unsigned long* featureBuffer, int featureNum, unsigned int bufLen) { 315 assert(bufLen > 0, "buffer len must be positive"); 316 assert((bufLen & 0x0007) == 0, "unaligned buffer len"); 317 assert(((intptr_t)featureBuffer&0x0007) == 0, "unaligned feature buffer"); 318 if (featureNum < 0) { 319 // Any bit set at all? 320 bool anyBit = false; 321 for (size_t i = 0; i < bufLen/(8*sizeof(long)); i++) { 322 anyBit = anyBit || (featureBuffer[i] != 0); 323 } 324 return anyBit; 325 } else { 326 assert((unsigned int)featureNum < bufLen, "feature index out of range"); 327 unsigned char* byteBuffer = (unsigned char*)featureBuffer; 328 int byteIndex = featureNum/(8*sizeof(char)); 329 int bitIndex = featureNum%(8*sizeof(char)); 330 // Indexed bit set? 331 return (byteBuffer[byteIndex] & (1U<<(7-bitIndex))) != 0; 332 } 333} 334 335void VM_Version::print_features_internal(const char* text, bool print_anyway) { 336 tty->print_cr("%s %s", text, features_string()); 337 tty->print("%s", text); 338 for (unsigned int i = 0; i < _nfeatures; i++) { 339 tty->print(" 0x%16.16lx", _features[i]); 340 } 341 tty->cr(); 342 343 if (Verbose || print_anyway) { 344 // z900 345 if (has_long_displacement() ) tty->print_cr("available: %s", "LongDispFacility"); 346 // z990 347 if (has_long_displacement_fast() ) tty->print_cr("available: %s", "LongDispFacilityHighPerf"); 348 if (has_ETF2() && has_ETF3() ) tty->print_cr("available: %s", "ETF2 and ETF3"); 349 if (has_Crypto() ) tty->print_cr("available: %s", "CryptoFacility"); 350 // z9 351 if (has_extended_immediate() ) tty->print_cr("available: %s", "ExtImmedFacility"); 352 if (has_StoreFacilityListExtended()) tty->print_cr("available: %s", "StoreFacilityListExtended"); 353 if (has_StoreClockFast() ) tty->print_cr("available: %s", "StoreClockFast"); 354 if (has_ETF2Enhancements() ) tty->print_cr("available: %s", "ETF2 Enhancements"); 355 if (has_ETF3Enhancements() ) tty->print_cr("available: %s", "ETF3 Enhancements"); 356 if (has_HFPUnnormalized() ) tty->print_cr("available: %s", "HFPUnnormalizedFacility"); 357 if (has_HFPMultiplyAndAdd() ) tty->print_cr("available: %s", "HFPMultiplyAndAddFacility"); 358 // z10 359 if (has_ParsingEnhancements() ) tty->print_cr("available: %s", "Parsing Enhancements"); 360 if (has_ExtractCPUtime() ) tty->print_cr("available: %s", "ExtractCPUTime"); 361 if (has_CompareSwapStore() ) tty->print_cr("available: %s", "CompareSwapStore"); 362 if (has_GnrlInstrExtensions() ) tty->print_cr("available: %s", "General Instruction Extensions"); 363 if (has_CompareBranch() ) tty->print_cr(" available: %s", "Compare and Branch"); 364 if (has_CompareTrap() ) tty->print_cr(" available: %s", "Compare and Trap"); 365 if (has_RelativeLoadStore() ) tty->print_cr(" available: %s", "Relative Load/Store"); 366 if (has_MultiplySingleImm32() ) tty->print_cr(" available: %s", "MultiplySingleImm32"); 367 if (has_Prefetch() ) tty->print_cr(" available: %s", "Prefetch"); 368 if (has_MoveImmToMem() ) tty->print_cr(" available: %s", "Direct Moves Immediate to Memory"); 369 if (has_MemWithImmALUOps() ) tty->print_cr(" available: %s", "Direct ALU Ops Memory .op. Immediate"); 370 if (has_ExtractCPUAttributes() ) tty->print_cr(" available: %s", "Extract CPU Atributes"); 371 if (has_ExecuteExtensions() ) tty->print_cr("available: %s", "ExecuteExtensions"); 372 if (has_FPSupportEnhancements() ) tty->print_cr("available: %s", "FPSupportEnhancements"); 373 if (has_DecimalFloatingPoint() ) tty->print_cr("available: %s", "DecimalFloatingPoint"); 374 // z196 375 if (has_DistinctOpnds() ) tty->print_cr("available: %s", "Distinct Operands"); 376 if (has_InterlockedAccessV1() ) tty->print_cr(" available: %s", "InterlockedAccess V1 (fast)"); 377 if (has_PopCount() ) tty->print_cr(" available: %s", "PopCount"); 378 if (has_LoadStoreConditional() ) tty->print_cr(" available: %s", "LoadStoreConditional"); 379 if (has_HighWordInstr() ) tty->print_cr(" available: %s", "HighWord Instructions"); 380 if (has_FastSync() ) tty->print_cr(" available: %s", "FastSync (bcr 14,0)"); 381 if (has_AtomicMemWithImmALUOps() ) tty->print_cr("available: %s", "Atomic Direct ALU Ops Memory .op. Immediate"); 382 if (has_FPExtensions() ) tty->print_cr("available: %s", "Floatingpoint Extensions"); 383 if (has_CryptoExt3() ) tty->print_cr("available: %s", "Crypto Extensions 3"); 384 if (has_CryptoExt4() ) tty->print_cr("available: %s", "Crypto Extensions 4"); 385 // EC12 386 if (has_MiscInstrExt() ) tty->print_cr("available: %s", "Miscelaneous Instruction Extensions"); 387 if (has_ExecutionHint() ) tty->print_cr(" available: %s", "Execution Hints (branch prediction)"); 388 if (has_ProcessorAssist() ) tty->print_cr(" available: %s", "Processor Assists"); 389 if (has_LoadAndTrap() ) tty->print_cr(" available: %s", "Load and Trap"); 390 if (has_TxMem() ) tty->print_cr("available: %s", "Transactional Memory"); 391 if (has_InterlockedAccessV2() ) tty->print_cr(" available: %s", "InterlockedAccess V2 (fast)"); 392 if (has_DFPZonedConversion() ) tty->print_cr(" available: %s", "DFP Zoned Conversions"); 393 // z13 394 if (has_LoadStoreConditional2() ) tty->print_cr("available: %s", "Load/Store Conditional 2"); 395 if (has_CryptoExt5() ) tty->print_cr("available: %s", "Crypto Extensions 5"); 396 if (has_DFPPackedConversion() ) tty->print_cr("available: %s", "DFP Packed Conversions"); 397 if (has_VectorFacility() ) tty->print_cr("available: %s", "Vector Facility"); 398 // test switches 399 if (has_TestFeature1Impl() ) tty->print_cr("available: %s", "TestFeature1Impl"); 400 if (has_TestFeature2Impl() ) tty->print_cr("available: %s", "TestFeature2Impl"); 401 if (has_TestFeature4Impl() ) tty->print_cr("available: %s", "TestFeature4Impl"); 402 if (has_TestFeature8Impl() ) tty->print_cr("available: %s", "TestFeature8Impl"); 403 404 if (has_Crypto()) { 405 tty->cr(); 406 tty->print_cr("detailed availability of %s capabilities:", "CryptoFacility"); 407 if (test_feature_bit(&_cipher_features[0], -1, 2*Cipher::_featureBits)) { 408 tty->cr(); 409 tty->print_cr(" available: %s", "Message Cipher Functions"); 410 } 411 if (test_feature_bit(&_cipher_features[0], -1, (int)Cipher::_featureBits)) { 412 tty->print_cr(" available Crypto Features of KM (Cipher Message):"); 413 for (unsigned int i = 0; i < Cipher::_featureBits; i++) { 414 if (test_feature_bit(&_cipher_features[0], i, (int)Cipher::_featureBits)) { 415 switch (i) { 416 case Cipher::_Query: tty->print_cr(" available: KM Query"); break; 417 case Cipher::_DEA: tty->print_cr(" available: KM DEA"); break; 418 case Cipher::_TDEA128: tty->print_cr(" available: KM TDEA-128"); break; 419 case Cipher::_TDEA192: tty->print_cr(" available: KM TDEA-192"); break; 420 case Cipher::_EncryptedDEA: tty->print_cr(" available: KM Encrypted DEA"); break; 421 case Cipher::_EncryptedDEA128: tty->print_cr(" available: KM Encrypted DEA-128"); break; 422 case Cipher::_EncryptedDEA192: tty->print_cr(" available: KM Encrypted DEA-192"); break; 423 case Cipher::_AES128: tty->print_cr(" available: KM AES-128"); break; 424 case Cipher::_AES192: tty->print_cr(" available: KM AES-192"); break; 425 case Cipher::_AES256: tty->print_cr(" available: KM AES-256"); break; 426 case Cipher::_EnccryptedAES128: tty->print_cr(" available: KM Encrypted-AES-128"); break; 427 case Cipher::_EnccryptedAES192: tty->print_cr(" available: KM Encrypted-AES-192"); break; 428 case Cipher::_EnccryptedAES256: tty->print_cr(" available: KM Encrypted-AES-256"); break; 429 case Cipher::_XTSAES128: tty->print_cr(" available: KM XTS-AES-128"); break; 430 case Cipher::_XTSAES256: tty->print_cr(" available: KM XTS-AES-256"); break; 431 case Cipher::_EncryptedXTSAES128: tty->print_cr(" available: KM XTS-Encrypted-AES-128"); break; 432 case Cipher::_EncryptedXTSAES256: tty->print_cr(" available: KM XTS-Encrypted-AES-256"); break; 433 default: tty->print_cr(" available: unknown KM code %d", i); break; 434 } 435 } 436 } 437 } 438 if (test_feature_bit(&_cipher_features[2], -1, (int)Cipher::_featureBits)) { 439 tty->print_cr(" available Crypto Features of KMC (Cipher Message with Chaining):"); 440 for (unsigned int i = 0; i < Cipher::_featureBits; i++) { 441 if (test_feature_bit(&_cipher_features[2], i, (int)Cipher::_featureBits)) { 442 switch (i) { 443 case Cipher::_Query: tty->print_cr(" available: KMC Query"); break; 444 case Cipher::_DEA: tty->print_cr(" available: KMC DEA"); break; 445 case Cipher::_TDEA128: tty->print_cr(" available: KMC TDEA-128"); break; 446 case Cipher::_TDEA192: tty->print_cr(" available: KMC TDEA-192"); break; 447 case Cipher::_EncryptedDEA: tty->print_cr(" available: KMC Encrypted DEA"); break; 448 case Cipher::_EncryptedDEA128: tty->print_cr(" available: KMC Encrypted DEA-128"); break; 449 case Cipher::_EncryptedDEA192: tty->print_cr(" available: KMC Encrypted DEA-192"); break; 450 case Cipher::_AES128: tty->print_cr(" available: KMC AES-128"); break; 451 case Cipher::_AES192: tty->print_cr(" available: KMC AES-192"); break; 452 case Cipher::_AES256: tty->print_cr(" available: KMC AES-256"); break; 453 case Cipher::_EnccryptedAES128: tty->print_cr(" available: KMC Encrypted-AES-128"); break; 454 case Cipher::_EnccryptedAES192: tty->print_cr(" available: KMC Encrypted-AES-192"); break; 455 case Cipher::_EnccryptedAES256: tty->print_cr(" available: KMC Encrypted-AES-256"); break; 456 case Cipher::_PRNG: tty->print_cr(" available: KMC PRNG"); break; 457 default: tty->print_cr(" available: unknown KMC code %d", i); break; 458 } 459 } 460 } 461 } 462 463 if (test_feature_bit(&_msgdigest_features[0], -1, 2*MsgDigest::_featureBits)) { 464 tty->cr(); 465 tty->print_cr(" available: %s", "Message Digest Functions for SHA"); 466 } 467 if (test_feature_bit(&_msgdigest_features[0], -1, (int)MsgDigest::_featureBits)) { 468 tty->print_cr(" available Features of KIMD (Msg Digest):"); 469 for (unsigned int i = 0; i < MsgDigest::_featureBits; i++) { 470 if (test_feature_bit(&_msgdigest_features[0], i, (int)MsgDigest::_featureBits)) { 471 switch (i) { 472 case MsgDigest::_Query: tty->print_cr(" available: KIMD Query"); break; 473 case MsgDigest::_SHA1: tty->print_cr(" available: KIMD SHA-1"); break; 474 case MsgDigest::_SHA256: tty->print_cr(" available: KIMD SHA-256"); break; 475 case MsgDigest::_SHA512: tty->print_cr(" available: KIMD SHA-512"); break; 476 case MsgDigest::_GHASH: tty->print_cr(" available: KIMD GHASH"); break; 477 default: tty->print_cr(" available: unknown code %d", i); break; 478 } 479 } 480 } 481 } 482 if (test_feature_bit(&_msgdigest_features[2], -1, (int)MsgDigest::_featureBits)) { 483 tty->print_cr(" available Features of KLMD (Msg Digest):"); 484 for (unsigned int i = 0; i < MsgDigest::_featureBits; i++) { 485 if (test_feature_bit(&_msgdigest_features[2], i, (int)MsgDigest::_featureBits)) { 486 switch (i) { 487 case MsgDigest::_Query: tty->print_cr(" available: KLMD Query"); break; 488 case MsgDigest::_SHA1: tty->print_cr(" available: KLMD SHA-1"); break; 489 case MsgDigest::_SHA256: tty->print_cr(" available: KLMD SHA-256"); break; 490 case MsgDigest::_SHA512: tty->print_cr(" available: KLMD SHA-512"); break; 491 default: tty->print_cr(" available: unknown code %d", i); break; 492 } 493 } 494 } 495 } 496 } 497 if (ContendedPaddingWidth > 0) { 498 tty->cr(); 499 tty->print_cr("ContendedPaddingWidth " INTX_FORMAT, ContendedPaddingWidth); 500 } 501 } 502} 503 504void VM_Version::print_features() { 505 print_features_internal("Version:"); 506} 507 508void VM_Version::reset_features(bool reset) { 509 if (reset) { 510 for (unsigned int i = 0; i < _features_buffer_len; i++) { 511 VM_Version::_features[i] = 0; 512 } 513 } 514} 515 516void VM_Version::set_features_z900(bool reset) { 517 reset_features(reset); 518 519 set_has_long_displacement(); 520 set_has_ETF2(); 521} 522 523void VM_Version::set_features_z990(bool reset) { 524 reset_features(reset); 525 526 set_features_z900(false); 527 set_has_ETF3(); 528 set_has_long_displacement_fast(); 529 set_has_HFPMultiplyAndAdd(); 530} 531 532void VM_Version::set_features_z9(bool reset) { 533 reset_features(reset); 534 535 set_features_z990(false); 536 set_has_StoreFacilityListExtended(); 537 // set_has_Crypto(); // Do not set, crypto features must be retrieved separately. 538 set_has_ETF2Enhancements(); 539 set_has_ETF3Enhancements(); 540 set_has_extended_immediate(); 541 set_has_StoreClockFast(); 542 set_has_HFPUnnormalized(); 543} 544 545void VM_Version::set_features_z10(bool reset) { 546 reset_features(reset); 547 548 set_features_z9(false); 549 set_has_CompareSwapStore(); 550 set_has_RelativeLoadStore(); 551 set_has_CompareBranch(); 552 set_has_CompareTrap(); 553 set_has_MultiplySingleImm32(); 554 set_has_Prefetch(); 555 set_has_MoveImmToMem(); 556 set_has_MemWithImmALUOps(); 557 set_has_ExecuteExtensions(); 558 set_has_FPSupportEnhancements(); 559 set_has_DecimalFloatingPoint(); 560 set_has_ExtractCPUtime(); 561 set_has_CryptoExt3(); 562} 563 564void VM_Version::set_features_z196(bool reset) { 565 reset_features(reset); 566 567 set_features_z10(false); 568 set_has_InterlockedAccessV1(); 569 set_has_PopCount(); 570 set_has_LoadStoreConditional(); 571 set_has_HighWordInstr(); 572 set_has_FastSync(); 573 set_has_FPExtensions(); 574 set_has_DistinctOpnds(); 575 set_has_CryptoExt4(); 576} 577 578void VM_Version::set_features_ec12(bool reset) { 579 reset_features(reset); 580 581 set_features_z196(false); 582 set_has_MiscInstrExt(); 583 set_has_InterlockedAccessV2(); 584 set_has_LoadAndALUAtomicV2(); 585 set_has_TxMem(); 586} 587 588void VM_Version::set_features_z13(bool reset) { 589 reset_features(reset); 590 591 set_features_ec12(false); 592 set_has_LoadStoreConditional2(); 593 set_has_CryptoExt5(); 594 set_has_VectorFacility(); 595} 596 597void VM_Version::set_features_from(const char* march) { 598 bool err = false; 599 bool prt = false; 600 601 if ((march != NULL) && (march[0] != '\0')) { 602 const int buf_len = 16; 603 const int hdr_len = 5; 604 char buf[buf_len]; 605 if (strlen(march) >= hdr_len) { 606 memcpy(buf, march, hdr_len); 607 buf[hdr_len] = '\00'; 608 } else { 609 buf[0] = '\00'; 610 } 611 612 if (!strcmp(march, "z900")) { 613 set_features_z900(); 614 } else if (!strcmp(march, "z990")) { 615 set_features_z990(); 616 } else if (!strcmp(march, "z9")) { 617 set_features_z9(); 618 } else if (!strcmp(march, "z10")) { 619 set_features_z10(); 620 } else if (!strcmp(march, "z196")) { 621 set_features_z196(); 622 } else if (!strcmp(march, "ec12")) { 623 set_features_ec12(); 624 } else if (!strcmp(march, "z13")) { 625 set_features_z13(); 626 } else if (!strcmp(buf, "ztest")) { 627 assert(!has_TestFeaturesImpl(), "possible facility list flag conflict"); 628 if (strlen(march) > hdr_len) { 629 int itest = 0; 630 if ((strlen(march)-hdr_len) >= buf_len) err = true; 631 if (!err) { 632 memcpy(buf, &march[hdr_len], strlen(march)-hdr_len); 633 buf[strlen(march)-hdr_len] = '\00'; 634 for (size_t i = 0; !err && (i < strlen(buf)); i++) { 635 itest = itest*10 + buf[i]-'0'; 636 err = err || ((buf[i]-'0') < 0) || ((buf[i]-'0') > 9) || (itest > 15); 637 } 638 } 639 if (!err) { 640 prt = true; 641 if (itest & 0x01) { set_has_TestFeature1Impl(); } 642 if (itest & 0x02) { set_has_TestFeature2Impl(); } 643 if (itest & 0x04) { set_has_TestFeature4Impl(); } 644 if (itest & 0x08) { set_has_TestFeature8Impl(); } 645 } 646 } else { 647 prt = true; 648 set_has_TestFeature1Impl(); 649 set_has_TestFeature2Impl(); 650 set_has_TestFeature4Impl(); 651 set_has_TestFeature8Impl(); 652 } 653 } else { 654 err = true; 655 } 656 if (!err) { 657 set_features_string(); 658 if (prt || PrintAssembly) { 659 print_features_internal("CPU Version as set by cmdline option:", prt); 660 } 661 } else { 662 tty->print_cr("***Warning: Unsupported ProcessorArchitecture: %s, internal settings left undisturbed.", march); 663 } 664 } 665 666} 667 668static long (*getFeatures)(unsigned long*, int, int) = NULL; 669 670void VM_Version::set_getFeatures(address entryPoint) { 671 if (getFeatures == NULL) { 672 getFeatures = (long(*)(unsigned long*, int, int))entryPoint; 673 } 674} 675 676long VM_Version::call_getFeatures(unsigned long* buffer, int buflen, int functionCode) { 677 VM_Version::_is_determine_features_test_running = true; 678 long functionResult = (*getFeatures)(buffer, buflen, functionCode); 679 VM_Version::_is_determine_features_test_running = false; 680 return functionResult; 681} 682 683// Helper function for "extract cache attribute" instruction. 684int VM_Version::calculate_ECAG_functionCode(unsigned int attributeIndication, 685 unsigned int levelIndication, 686 unsigned int typeIndication) { 687 return (attributeIndication<<4) | (levelIndication<<1) | typeIndication; 688} 689 690void VM_Version::determine_features() { 691 692 const int cbuf_size = _code_buffer_len; 693 const int buf_len = _features_buffer_len; 694 695 // Allocate code buffer space for the detection code. 696 ResourceMark rm; 697 CodeBuffer cbuf("determine CPU features", cbuf_size, 0); 698 MacroAssembler* a = new MacroAssembler(&cbuf); 699 700 // Emit code. 701 set_getFeatures(a->pc()); 702 address code = a->pc(); 703 704 // Try STFLE. Possible INVOP will cause defaults to be used. 705 Label getFEATURES; 706 Label getCPUFEATURES; // fcode = -1 (cache) 707 Label getCIPHERFEATURES; // fcode = -2 (cipher) 708 Label getMSGDIGESTFEATURES; // fcode = -3 (SHA) 709 Label checkLongDispFast; 710 Label noLongDisp; 711 Label posDisp, negDisp; 712 Label errRTN; 713 a->z_ltgfr(Z_R0, Z_ARG2); // Buf len to r0 and test. 714 a->z_brl(getFEATURES); // negative -> Get machine features. 715 a->z_brz(checkLongDispFast); // zero -> Check for high-speed Long Displacement Facility. 716 a->z_aghi(Z_R0, -1); 717 a->z_stfle(0, Z_ARG1); 718 a->z_lg(Z_R1, 0, Z_ARG1); // Get first DW of facility list. 719 a->z_lgr(Z_RET, Z_R0); // Calculate rtn value for success. 720 a->z_la(Z_RET, 1, Z_RET); 721 a->z_brnz(errRTN); // Instr failed if non-zero CC. 722 a->z_ltgr(Z_R1, Z_R1); // Instr failed if first DW == 0. 723 a->z_bcr(Assembler::bcondNotZero, Z_R14); // Successful return. 724 725 a->bind(errRTN); 726 a->z_lngr(Z_RET, Z_RET); 727 a->z_ltgr(Z_R1, Z_R1); 728 a->z_bcr(Assembler::bcondNotZero, Z_R14); // Return "buffer too small". 729 a->z_xgr(Z_RET, Z_RET); 730 a->z_br(Z_R14); // Return "operation aborted". 731 732 a->bind(getFEATURES); 733 a->z_cghi(Z_R0, -1); // -1: Extract CPU attributes, currently: cache layout only. 734 a->z_bre(getCPUFEATURES); 735 a->z_cghi(Z_R0, -2); // -2: Extract detailed crypto capabilities (cipher instructions). 736 a->z_bre(getCIPHERFEATURES); 737 a->z_cghi(Z_R0, -3); // -3: Extract detailed crypto capabilities (msg digest instructions). 738 a->z_bre(getMSGDIGESTFEATURES); 739 740 a->z_xgr(Z_RET, Z_RET); // Not a valid function code. 741 a->z_br(Z_R14); // Return "operation aborted". 742 743 // Try KIMD/KLMD query function to get details about msg digest (secure hash, SHA) instructions. 744 a->bind(getMSGDIGESTFEATURES); 745 a->z_lghi(Z_R0,(int)MsgDigest::_Query); // query function code 746 a->z_lgr(Z_R1,Z_R2); // param block addr, 2*16 bytes min size 747 a->z_kimd(Z_R2,Z_R2); // Get available KIMD functions (bit pattern in param blk). 748 a->z_la(Z_R1,16,Z_R1); // next param block addr 749 a->z_klmd(Z_R2,Z_R2); // Get available KLMD functions (bit pattern in param blk). 750 a->z_lghi(Z_RET,4); 751 a->z_br(Z_R14); 752 753 // Try KM/KMC query function to get details about crypto instructions. 754 a->bind(getCIPHERFEATURES); 755 a->z_lghi(Z_R0,(int)Cipher::_Query); // query function code 756 a->z_lgr(Z_R1,Z_R2); // param block addr, 2*16 bytes min size (KIMD/KLMD output) 757 a->z_km(Z_R2,Z_R2); // get available KM functions 758 a->z_la(Z_R1,16,Z_R1); // next param block addr 759 a->z_kmc(Z_R2,Z_R2); // get available KMC functions 760 a->z_lghi(Z_RET,4); 761 a->z_br(Z_R14); 762 763 // Use EXTRACT CPU ATTRIBUTE instruction to get information about cache layout. 764 a->bind(getCPUFEATURES); 765 a->z_xgr(Z_R0,Z_R0); // as recommended in instruction documentation 766 a->z_ecag(Z_RET,Z_R0,0,Z_ARG3); // Extract information as requested by Z_ARG1 contents. 767 a->z_br(Z_R14); 768 769 // Check the performance of the Long Displacement Facility, i.e. find out if we are running on z900 or newer. 770 a->bind(checkLongDispFast); 771 a->z_llill(Z_R0, 0xffff); // preset #iterations 772 a->z_larl(Z_R1, posDisp); 773 a->z_stck(0, Z_ARG1); // Get begin timestamp. 774 775 a->bind(posDisp); // Positive disp loop. 776 a->z_lg(Z_ARG2, 0, Z_ARG1); 777 a->z_bctgr(Z_R0, Z_R1); 778 779 a->z_stck(0, Z_ARG1); // Get end timestamp. 780 a->z_sg(Z_ARG2, 0, Z_R0, Z_ARG1); // Calculate elapsed time. 781 a->z_lcgr(Z_ARG2, Z_ARG2); 782 a->z_srlg(Z_ARG2, Z_ARG2, 12); // LSB: now microseconds 783 a->z_stg(Z_ARG2, 8, Z_ARG1); // Store difference in buffer[1]. 784 785 a->z_llill(Z_R0, 0xffff); // preset #iterations 786 a->z_larl(Z_R1, negDisp); 787 a->z_xgr(Z_ARG2, Z_ARG2); // Clear to detect absence of LongDisp facility. 788 a->z_stck(0, Z_ARG1); // Get begin timestamp. 789 a->z_la(Z_ARG1, 8, Z_ARG1); 790 791 a->bind(negDisp); // Negative disp loop. 792 a->z_lg(Z_ARG2, -8, Z_ARG1); 793 a->z_bctgr(Z_R0, Z_R1); 794 795 a->z_aghi(Z_ARG1, -8); 796 a->z_stck(0, Z_ARG1); // Get end timestamp. 797 a->z_ltgr(Z_ARG2, Z_ARG2); // Check for absence of LongDisp facility. 798 a->z_brz(noLongDisp); 799 a->z_sg(Z_ARG2, 0, Z_R0, Z_ARG1); // Calc elapsed time. 800 a->z_lcgr(Z_ARG2, Z_ARG2); 801 a->z_srlg(Z_ARG2, Z_ARG2, 12); // LSB: now microseconds 802 a->z_stg(Z_ARG2, 0, Z_ARG1); // store difference in buffer[0] 803 804 a->z_llill(Z_RET,0xffff); 805 a->z_br(Z_R14); 806 807 a->bind(noLongDisp); 808 a->z_lghi(Z_RET,-1); 809 a->z_br(Z_R14); 810 811 address code_end = a->pc(); 812 a->flush(); 813 814 // Print the detection code. 815 bool printVerbose = Verbose || PrintAssembly || PrintStubCode; 816 if (printVerbose) { 817 ttyLocker ttyl; 818 tty->print_cr("Decoding CPU feature detection stub at " INTPTR_FORMAT " before execution:", p2i(code)); 819 tty->print_cr("Stub length is %ld bytes, codebuffer reserves %d bytes, %ld bytes spare.", 820 code_end-code, cbuf_size, cbuf_size-(code_end-code)); 821 822 // Use existing decode function. This enables the [Code] format which is needed to DecodeErrorFile. 823 Disassembler::decode((u_char*)code, (u_char*)code_end, tty); 824 } 825 826 // Prepare for detection code execution and clear work buffer. 827 _nfeatures = 0; 828 _ncipher_features = 0; 829 unsigned long buffer[buf_len]; 830 831 for (int i = 0; i < buf_len; i++) { 832 buffer[i] = 0L; 833 } 834 835 // execute code 836 // Illegal instructions will be replaced by 0 in signal handler. 837 // In case of problems, call_getFeatures will return a not-positive result. 838 long used_len = call_getFeatures(buffer, buf_len, 0); 839 840 bool ok; 841 if (used_len == 1) { 842 ok = true; 843 } else if (used_len > 1) { 844 unsigned int used_lenU = (unsigned int)used_len; 845 ok = true; 846 for (unsigned int i = 1; i < used_lenU; i++) { 847 ok = ok && (buffer[i] == 0L); 848 } 849 if (printVerbose && !ok) { 850 bool compact = false; 851 tty->print_cr("Note: feature list has %d (i.e. more than one) array elements.", used_lenU); 852 if (compact) { 853 tty->print("non-zero feature list elements:"); 854 for (unsigned int i = 0; i < used_lenU; i++) { 855 tty->print(" [%d]: 0x%16.16lx", i, buffer[i]); 856 } 857 tty->cr(); 858 } else { 859 for (unsigned int i = 0; i < used_lenU; i++) { 860 tty->print_cr("non-zero feature list[%d]: 0x%16.16lx", i, buffer[i]); 861 } 862 } 863 864 if (compact) { 865 tty->print_cr("Active features (compact view):"); 866 for (unsigned int k = 0; k < used_lenU; k++) { 867 tty->print_cr(" buffer[%d]:", k); 868 for (unsigned int j = k*sizeof(long); j < (k+1)*sizeof(long); j++) { 869 bool line = false; 870 for (unsigned int i = j*8; i < (j+1)*8; i++) { 871 bool bit = test_feature_bit(buffer, i, used_lenU*sizeof(long)*8); 872 if (bit) { 873 if (!line) { 874 tty->print(" byte[%d]:", j); 875 line = true; 876 } 877 tty->print(" [%3.3d]", i); 878 } 879 } 880 if (line) { 881 tty->cr(); 882 } 883 } 884 } 885 } else { 886 tty->print_cr("Active features (full view):"); 887 for (unsigned int k = 0; k < used_lenU; k++) { 888 tty->print_cr(" buffer[%d]:", k); 889 for (unsigned int j = k*sizeof(long); j < (k+1)*sizeof(long); j++) { 890 tty->print(" byte[%d]:", j); 891 for (unsigned int i = j*8; i < (j+1)*8; i++) { 892 bool bit = test_feature_bit(buffer, i, used_lenU*sizeof(long)*8); 893 if (bit) { 894 tty->print(" [%3.3d]", i); 895 } else { 896 tty->print(" "); 897 } 898 } 899 tty->cr(); 900 } 901 } 902 } 903 } 904 ok = true; 905 } else { // No features retrieved if we reach here. Buffer too short or instr not available. 906 if (used_len < 0) { 907 ok = false; 908 if (printVerbose) { 909 tty->print_cr("feature list buffer[%d] too short, required: buffer[%ld]", buf_len, -used_len); 910 } 911 } else { 912 if (printVerbose) { 913 tty->print_cr("feature list could not be retrieved. Running on z900 or z990? Trying to find out..."); 914 } 915 used_len = call_getFeatures(buffer, 0, 0); // Must provide at least two DW buffer elements!!!! 916 917 ok = used_len > 0; 918 if (ok) { 919 if (buffer[1]*10 < buffer[0]) { 920 set_features_z900(); 921 } else { 922 set_features_z990(); 923 } 924 925 if (printVerbose) { 926 tty->print_cr("Note: high-speed long displacement test used %ld iterations.", used_len); 927 tty->print_cr(" Positive displacement loads took %8.8lu microseconds.", buffer[1]); 928 tty->print_cr(" Negative displacement loads took %8.8lu microseconds.", buffer[0]); 929 if (has_long_displacement_fast()) { 930 tty->print_cr(" assuming high-speed long displacement IS available."); 931 } else { 932 tty->print_cr(" assuming high-speed long displacement is NOT available."); 933 } 934 } 935 } else { 936 if (printVerbose) { 937 tty->print_cr("Note: high-speed long displacement test was not successful."); 938 tty->print_cr(" assuming long displacement is NOT available."); 939 } 940 } 941 return; // Do not copy buffer to _features, no test for cipher features. 942 } 943 } 944 945 if (ok) { 946 // Fill features buffer. 947 // Clear work buffer. 948 for (int i = 0; i < buf_len; i++) { 949 _features[i] = buffer[i]; 950 _cipher_features[i] = 0; 951 _msgdigest_features[i] = 0; 952 buffer[i] = 0L; 953 } 954 _nfeatures = used_len; 955 } else { 956 for (int i = 0; i < buf_len; i++) { 957 _features[i] = 0; 958 _cipher_features[i] = 0; 959 _msgdigest_features[i] = 0; 960 buffer[i] = 0L; 961 } 962 _nfeatures = 0; 963 } 964 965 // Extract Crypto Facility details. 966 if (has_Crypto()) { 967 // Get cipher features. 968 used_len = call_getFeatures(buffer, -2, 0); 969 for (int i = 0; i < buf_len; i++) { 970 _cipher_features[i] = buffer[i]; 971 } 972 _ncipher_features = used_len; 973 974 // Get msg digest features. 975 used_len = call_getFeatures(buffer, -3, 0); 976 for (int i = 0; i < buf_len; i++) { 977 _msgdigest_features[i] = buffer[i]; 978 } 979 _nmsgdigest_features = used_len; 980 } 981 982 static int levelProperties[_max_cache_levels]; // All property indications per level. 983 static int levelScope[_max_cache_levels]; // private/shared 984 static const char* levelScopeText[4] = {"No cache ", 985 "CPU private", 986 "shared ", 987 "reserved "}; 988 989 static int levelType[_max_cache_levels]; // D/I/mixed 990 static const char* levelTypeText[4] = {"separate D and I caches", 991 "I cache only ", 992 "D-cache only ", 993 "combined D/I cache "}; 994 995 static unsigned int levelReserved[_max_cache_levels]; // reserved property bits 996 static unsigned int levelLineSize[_max_cache_levels]; 997 static unsigned int levelTotalSize[_max_cache_levels]; 998 static unsigned int levelAssociativity[_max_cache_levels]; 999 1000 1001 // Extract Cache Layout details. 1002 if (has_ExtractCPUAttributes() && printVerbose) { // For information only, as of now. 1003 bool lineSize_mismatch; 1004 bool print_something; 1005 long functionResult; 1006 unsigned int attributeIndication = 0; // 0..15 1007 unsigned int levelIndication = 0; // 0..8 1008 unsigned int typeIndication = 0; // 0..1 (D-Cache, I-Cache) 1009 int functionCode = calculate_ECAG_functionCode(attributeIndication, levelIndication, typeIndication); 1010 1011 // Get cache topology. 1012 functionResult = call_getFeatures(buffer, -1, functionCode); 1013 1014 for (unsigned int i = 0; i < _max_cache_levels; i++) { 1015 if (functionResult > 0) { 1016 int shiftVal = 8*(_max_cache_levels-(i+1)); 1017 levelProperties[i] = (functionResult & (0xffUL<<shiftVal)) >> shiftVal; 1018 levelReserved[i] = (levelProperties[i] & 0xf0) >> 4; 1019 levelScope[i] = (levelProperties[i] & 0x0c) >> 2; 1020 levelType[i] = (levelProperties[i] & 0x03); 1021 } else { 1022 levelProperties[i] = 0; 1023 levelReserved[i] = 0; 1024 levelScope[i] = 0; 1025 levelType[i] = 0; 1026 } 1027 levelLineSize[i] = 0; 1028 levelTotalSize[i] = 0; 1029 levelAssociativity[i] = 0; 1030 } 1031 1032 tty->cr(); 1033 tty->print_cr("------------------------------------"); 1034 tty->print_cr("--- Cache Topology Information ---"); 1035 tty->print_cr("------------------------------------"); 1036 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) { 1037 tty->print_cr(" Cache Level %d: <scope> %s | <type> %s", 1038 i+1, levelScopeText[levelScope[i]], levelTypeText[levelType[i]]); 1039 } 1040 1041 // Get D-cache details per level. 1042 _Dcache_lineSize = 0; 1043 lineSize_mismatch = false; 1044 print_something = false; 1045 typeIndication = 0; // 0..1 (D-Cache, I-Cache) 1046 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) { 1047 if ((levelType[i] == 0) || (levelType[i] == 2)) { 1048 print_something = true; 1049 1050 // Get cache line size of level i. 1051 attributeIndication = 1; 1052 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1053 levelLineSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1054 1055 // Get cache total size of level i. 1056 attributeIndication = 2; 1057 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1058 levelTotalSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1059 1060 // Get cache associativity of level i. 1061 attributeIndication = 3; 1062 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1063 levelAssociativity[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1064 1065 _Dcache_lineSize = _Dcache_lineSize == 0 ? levelLineSize[i] : _Dcache_lineSize; 1066 lineSize_mismatch = lineSize_mismatch || (_Dcache_lineSize != levelLineSize[i]); 1067 } else { 1068 levelLineSize[i] = 0; 1069 } 1070 } 1071 1072 if (print_something) { 1073 tty->cr(); 1074 tty->print_cr("------------------------------------"); 1075 tty->print_cr("--- D-Cache Detail Information ---"); 1076 tty->print_cr("------------------------------------"); 1077 if (lineSize_mismatch) { 1078 tty->print_cr("WARNING: D-Cache line size mismatch!"); 1079 } 1080 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) { 1081 if (levelLineSize[i] > 0) { 1082 tty->print_cr(" D-Cache Level %d: line size = %4d, total size = %6dKB, associativity = %2d", 1083 i+1, levelLineSize[i], levelTotalSize[i]/(int)K, levelAssociativity[i]); 1084 } 1085 } 1086 } 1087 1088 // Get I-cache details per level. 1089 _Icache_lineSize = 0; 1090 lineSize_mismatch = false; 1091 print_something = false; 1092 typeIndication = 1; // 0..1 (D-Cache, I-Cache) 1093 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) { 1094 if ((levelType[i] == 0) || (levelType[i] == 1)) { 1095 print_something = true; 1096 1097 // Get cache line size of level i. 1098 attributeIndication = 1; 1099 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1100 levelLineSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1101 1102 // Get cache total size of level i. 1103 attributeIndication = 2; 1104 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1105 levelTotalSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1106 1107 // Get cache associativity of level i. 1108 attributeIndication = 3; 1109 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1110 levelAssociativity[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1111 1112 _Icache_lineSize = _Icache_lineSize == 0 ? levelLineSize[i] : _Icache_lineSize; 1113 lineSize_mismatch = lineSize_mismatch || (_Icache_lineSize != levelLineSize[i]); 1114 } else { 1115 levelLineSize[i] = 0; 1116 } 1117 } 1118 1119 if (print_something) { 1120 tty->cr(); 1121 tty->print_cr("------------------------------------"); 1122 tty->print_cr("--- I-Cache Detail Information ---"); 1123 tty->print_cr("------------------------------------"); 1124 if (lineSize_mismatch) { 1125 tty->print_cr("WARNING: I-Cache line size mismatch!"); 1126 } 1127 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) { 1128 if (levelLineSize[i] > 0) { 1129 tty->print_cr(" I-Cache Level %d: line size = %4d, total size = %6dKB, associativity = %2d", 1130 i+1, levelLineSize[i], levelTotalSize[i]/(int)K, levelAssociativity[i]); 1131 } 1132 } 1133 } 1134 1135 // Get D/I-cache details per level. 1136 lineSize_mismatch = false; 1137 print_something = false; 1138 typeIndication = 0; // 0..1 (D-Cache, I-Cache) 1139 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) { 1140 if (levelType[i] == 3) { 1141 print_something = true; 1142 1143 // Get cache line size of level i. 1144 attributeIndication = 1; 1145 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1146 levelLineSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1147 1148 // Get cache total size of level i. 1149 attributeIndication = 2; 1150 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1151 levelTotalSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1152 1153 // Get cache associativity of level i. 1154 attributeIndication = 3; 1155 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1156 levelAssociativity[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1157 1158 _Dcache_lineSize = _Dcache_lineSize == 0 ? levelLineSize[i] : _Dcache_lineSize; 1159 _Icache_lineSize = _Icache_lineSize == 0 ? levelLineSize[i] : _Icache_lineSize; 1160 lineSize_mismatch = lineSize_mismatch || (_Dcache_lineSize != levelLineSize[i]) 1161 || (_Icache_lineSize != levelLineSize[i]); 1162 } else { 1163 levelLineSize[i] = 0; 1164 } 1165 } 1166 1167 if (print_something) { 1168 tty->cr(); 1169 tty->print_cr("--------------------------------------"); 1170 tty->print_cr("--- D/I-Cache Detail Information ---"); 1171 tty->print_cr("--------------------------------------"); 1172 if (lineSize_mismatch) { 1173 tty->print_cr("WARNING: D/I-Cache line size mismatch!"); 1174 } 1175 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) { 1176 if (levelLineSize[i] > 0) { 1177 tty->print_cr(" D/I-Cache Level %d: line size = %4d, total size = %6dKB, associativity = %2d", 1178 i+1, levelLineSize[i], levelTotalSize[i]/(int)K, levelAssociativity[i]); 1179 } 1180 } 1181 } 1182 tty->cr(); 1183 } 1184 return; 1185} 1186 1187unsigned long VM_Version::z_SIGILL() { 1188 unsigned long ZeroBuffer = 0; 1189 unsigned long work; 1190 asm( 1191 " LA %[work],%[buffer] \n\t" // Load address of buffer. 1192 " LARL 14,+6 \n\t" // Load address of faulting instruction. 1193 " BCR 15,%[work] \n\t" // Branch into buffer, execute whatever is in there. 1194 : [buffer] "+Q" (ZeroBuffer) /* outputs */ 1195 , [work] "=&a" (work) /* outputs */ 1196 : /* inputs */ 1197 : "cc" /* clobbered */ 1198 ); 1199 return ZeroBuffer; 1200} 1201 1202unsigned long VM_Version::z_SIGSEGV() { 1203 unsigned long ZeroBuffer = 0; 1204 unsigned long work; 1205 asm( 1206 " LG %[work],%[buffer] \n\t" // Load zero address. 1207 " STG %[work],0(,%[work])\n\t" // Store to address zero. 1208 : [buffer] "+Q" (ZeroBuffer) /* outputs */ 1209 , [work] "=&a" (work) /* outputs */ 1210 : /* inputs */ 1211 : "cc" /* clobbered */ 1212 ); 1213 return ZeroBuffer; 1214} 1215 1216