1/* $OpenBSD: qecreg.h,v 1.2 2008/06/26 05:42:18 ray Exp $ */ 2/* $NetBSD: qecreg.h,v 1.2 1999/01/16 12:46:08 pk Exp $ */ 3 4/*- 5 * Copyright (c) 1998 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Paul Kranenburg. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33/* 34 * Copyright (c) 1998 Theo de Raadt and Jason L. Wright. 35 * All rights reserved. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 3. The name of the authors may not be used to endorse or promote products 46 * derived from this software without specific prior written permission. 47 * 48 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR 49 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 50 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 51 * IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT, 52 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 53 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 54 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 55 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 56 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 57 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 58 */ 59 60/* 61 * QEC registers layout 62 *- 63struct qecregs { 64 u_int32_t qec_ctrl; // control 65 u_int32_t qec_stat; // status 66 u_int32_t qec_psize; // packet size 67 u_int32_t qec_msize; // local-mem size (64K) 68 u_int32_t qec_rsize; // receive partition size 69 u_int32_t qec_tsize; // transmit partition size 70}; 71 */ 72#define QEC_QRI_CTRL (0*4) 73#define QEC_QRI_STAT (1*4) 74#define QEC_QRI_PSIZE (2*4) 75#define QEC_QRI_MSIZE (3*4) 76#define QEC_QRI_RSIZE (4*4) 77#define QEC_QRI_TSIZE (5*4) 78 79#define QEC_CTRL_MODEMASK 0xf0000000 /* QEC mode: */ 80#define QEC_CTRL_MMODE 0x40000000 /* MACE qec mode */ 81#define QEC_CTRL_BMODE 0x10000000 /* BE qec mode */ 82#define QEC_CTRL_EPAR 0x00000020 /* enable parity */ 83#define QEC_CTRL_ACNTRL 0x00000018 /* sbus arbitration control */ 84#define QEC_CTRL_B64 0x00000004 /* 64 byte dvma bursts */ 85#define QEC_CTRL_B32 0x00000002 /* 32 byte dvma bursts */ 86#define QEC_CTRL_B16 0x00000000 /* 16 byte dvma bursts */ 87#define QEC_CTRL_RESET 0x00000001 /* reset the qec */ 88 89#define QEC_STAT_TX 0x00000008 /* bigmac transmit irq */ 90#define QEC_STAT_RX 0x00000004 /* bigmac receive irq */ 91#define QEC_STAT_BM 0x00000002 /* bigmac qec irq */ 92#define QEC_STAT_ER 0x00000001 /* bigmac error irq */ 93 94#define QEC_PSIZE_2048 0x00 /* 2k packet size */ 95#define QEC_PSIZE_4096 0x01 /* 4k packet size */ 96#define QEC_PSIZE_6144 0x10 /* 6k packet size */ 97#define QEC_PSIZE_8192 0x11 /* 8k packet size */ 98 99 100 101/* 102 * Transmit & receive buffer descriptor. 103 */ 104struct qec_xd { 105 volatile u_int32_t xd_flags; /* see below */ 106 volatile u_int32_t xd_addr; /* Buffer address (DMA) */ 107}; 108#define QEC_XD_OWN 0x80000000 /* ownership: 1=hw, 0=sw */ 109#define QEC_XD_SOP 0x40000000 /* start of packet marker (xmit) */ 110#define QEC_XD_EOP 0x20000000 /* end of packet marker (xmit) */ 111#define QEC_XD_UPDATE 0x10000000 /* being updated? */ 112#define QEC_XD_LENGTH 0x00001fff /* packet length mask */ 113/* Descriptor ring size is fixed */ 114#define QEC_XD_RING_MAXSIZE 256 /* maximum ring size */ 115