if_re_pci.c revision 1.7
1/* $OpenBSD: if_re_pci.c,v 1.7 2006/05/16 02:32:39 brad Exp $ */ 2 3/* 4 * Copyright (c) 2005 Peter Valchev <pvalchev@openbsd.org> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19/* 20 * PCI front-end for the Realtek 8169 21 */ 22 23#include <sys/param.h> 24#include <sys/endian.h> 25#include <sys/systm.h> 26#include <sys/sockio.h> 27#include <sys/mbuf.h> 28#include <sys/malloc.h> 29#include <sys/kernel.h> 30#include <sys/device.h> 31#include <sys/socket.h> 32 33#include <net/if.h> 34#include <net/if_dl.h> 35#include <net/if_media.h> 36 37#ifdef INET 38#include <netinet/in.h> 39#include <netinet/in_systm.h> 40#include <netinet/in_var.h> 41#include <netinet/ip.h> 42#include <netinet/if_ether.h> 43#endif 44 45#include <dev/mii/mii.h> 46#include <dev/mii/miivar.h> 47 48#include <dev/pci/pcireg.h> 49#include <dev/pci/pcivar.h> 50#include <dev/pci/pcidevs.h> 51 52#include <dev/ic/rtl81x9reg.h> 53#include <dev/ic/revar.h> 54 55struct re_pci_softc { 56 /* General */ 57 struct rl_softc sc_rl; 58 59 /* PCI-specific data */ 60 void *sc_ih; 61 pci_chipset_tag_t sc_pc; 62 pcitag_t sc_pcitag; 63}; 64 65const struct pci_matchid re_pci_devices[] = { 66 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8111B }, 67 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169 }, 68 { PCI_VENDOR_COREGA, PCI_PRODUCT_COREGA_CGLAPCIGT }, 69 { PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DGE528T }, 70 { PCI_VENDOR_USR2, PCI_PRODUCT_USR2_USR997902 } 71}; 72 73#define RE_LINKSYS_EG1032_SUBID 0x00241737 74 75int re_pci_probe(struct device *, void *, void *); 76void re_pci_attach(struct device *, struct device *, void *); 77 78/* 79 * PCI autoconfig definitions 80 */ 81struct cfattach re_pci_ca = { 82 sizeof(struct re_pci_softc), 83 re_pci_probe, 84 re_pci_attach 85}; 86 87/* 88 * Probe for a Realtek 8169/8110 chip. Check the PCI vendor and device 89 * IDs against our list and return a device name if we find a match. 90 */ 91int 92re_pci_probe(struct device *parent, void *match, void *aux) 93{ 94 struct pci_attach_args *pa = aux; 95 pci_chipset_tag_t pc = pa->pa_pc; 96 pcireg_t subid; 97 98 subid = pci_conf_read(pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 99 100 /* C+ mode 8139's */ 101 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_REALTEK && 102 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_REALTEK_RT8139 && 103 PCI_REVISION(pa->pa_class) == 0x20) 104 return (1); 105 106 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_LINKSYS && 107 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LINKSYS_EG1032 && 108 subid == RE_LINKSYS_EG1032_SUBID) 109 return (1); 110 111 return (pci_matchbyid((struct pci_attach_args *)aux, re_pci_devices, 112 sizeof(re_pci_devices)/sizeof(re_pci_devices[0]))); 113} 114 115/* 116 * PCI-specific attach routine 117 */ 118void 119re_pci_attach(struct device *parent, struct device *self, void *aux) 120{ 121 struct re_pci_softc *psc = (struct re_pci_softc *)self; 122 struct rl_softc *sc = &psc->sc_rl; 123 struct pci_attach_args *pa = aux; 124 pci_chipset_tag_t pc = pa->pa_pc; 125 pci_intr_handle_t ih; 126 const char *intrstr = NULL; 127 bus_size_t iosize; 128 pcireg_t command; 129 130 /* 131 * Handle power management nonsense. 132 */ 133 134 command = pci_conf_read(pc, pa->pa_tag, RL_PCI_CAPID) & 0x000000FF; 135 136 if (command == 0x01) { 137 u_int32_t iobase, membase, irq; 138 139 /* Save important PCI config data. */ 140 iobase = pci_conf_read(pc, pa->pa_tag, RL_PCI_LOIO); 141 membase = pci_conf_read(pc, pa->pa_tag, RL_PCI_LOMEM); 142 irq = pci_conf_read(pc, pa->pa_tag, RL_PCI_INTLINE); 143 144 /* Reset the power state. */ 145 printf("%s: chip is is in D%d power mode " 146 "-- setting to D0\n", sc->sc_dev.dv_xname, 147 command & RL_PSTATE_MASK); 148 command &= 0xFFFFFFFC; 149 150 /* Restore PCI config data. */ 151 pci_conf_write(pc, pa->pa_tag, RL_PCI_LOIO, iobase); 152 pci_conf_write(pc, pa->pa_tag, RL_PCI_LOMEM, membase); 153 pci_conf_write(pc, pa->pa_tag, RL_PCI_INTLINE, irq); 154 } 155 156 /* 157 * Map control/status registers. 158 */ 159 command = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 160 161 if ((command & (PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE)) == 0) { 162 printf(": neither i/o nor mem enabled\n"); 163 return; 164 } 165 166 if (command & PCI_COMMAND_MEM_ENABLE) { 167 if (pci_mapreg_map(pa, RL_PCI_LOMEM, PCI_MAPREG_TYPE_MEM, 0, 168 &sc->rl_btag, &sc->rl_bhandle, NULL, &iosize, 0)) { 169 printf(": can't map mem space\n"); 170 return; 171 } 172 } else { 173 if (pci_mapreg_map(pa, RL_PCI_LOIO, PCI_MAPREG_TYPE_IO, 0, 174 &sc->rl_btag, &sc->rl_bhandle, NULL, &iosize, 0)) { 175 printf(": can't map i/o space\n"); 176 return; 177 } 178 } 179 180 /* Allocate interrupt */ 181 if (pci_intr_map(pa, &ih)) { 182 printf(": couldn't map interrupt\n"); 183 return; 184 } 185 intrstr = pci_intr_string(pc, ih); 186 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, re_intr, sc, 187 sc->sc_dev.dv_xname); 188 if (psc->sc_ih == NULL) { 189 printf(": couldn't establish interrupt"); 190 if (intrstr != NULL) 191 printf(" at %s", intrstr); 192 return; 193 } 194 printf(": %s", intrstr); 195 196 sc->sc_dmat = pa->pa_dmat; 197 sc->sc_flags |= RL_ENABLED; 198 199 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_REALTEK_RT8139) 200 sc->rl_type = RL_8139; 201 else 202 sc->rl_type = RL_8169; 203 204 /* Call bus-independent attach routine */ 205 re_attach_common(sc); 206} 207