if_re_pci.c revision 1.34
1/* $OpenBSD: if_re_pci.c,v 1.34 2011/06/09 19:34:42 kettenis Exp $ */ 2 3/* 4 * Copyright (c) 2005 Peter Valchev <pvalchev@openbsd.org> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19/* 20 * PCI front-end for the Realtek 8169 21 */ 22 23#include <sys/param.h> 24#include <sys/endian.h> 25#include <sys/systm.h> 26#include <sys/sockio.h> 27#include <sys/mbuf.h> 28#include <sys/malloc.h> 29#include <sys/kernel.h> 30#include <sys/device.h> 31#include <sys/timeout.h> 32#include <sys/socket.h> 33 34#include <net/if.h> 35#include <net/if_dl.h> 36#include <net/if_media.h> 37 38#ifdef INET 39#include <netinet/in.h> 40#include <netinet/in_systm.h> 41#include <netinet/in_var.h> 42#include <netinet/ip.h> 43#include <netinet/if_ether.h> 44#endif 45 46#include <dev/mii/mii.h> 47#include <dev/mii/miivar.h> 48 49#include <dev/pci/pcireg.h> 50#include <dev/pci/pcivar.h> 51#include <dev/pci/pcidevs.h> 52 53#include <dev/ic/rtl81x9reg.h> 54#include <dev/ic/revar.h> 55 56struct re_pci_softc { 57 /* General */ 58 struct rl_softc sc_rl; 59 60 /* PCI-specific data */ 61 void *sc_ih; 62 pci_chipset_tag_t sc_pc; 63 pcitag_t sc_pcitag; 64 65 bus_size_t sc_iosize; 66}; 67 68const struct pci_matchid re_pci_devices[] = { 69 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8101E }, 70 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8168 }, 71 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169 }, 72 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169SC }, 73 { PCI_VENDOR_COREGA, PCI_PRODUCT_COREGA_CGLAPCIGT }, 74 { PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DGE528T }, 75 { PCI_VENDOR_USR2, PCI_PRODUCT_USR2_USR997902 }, 76 { PCI_VENDOR_TTTECH, PCI_PRODUCT_TTTECH_MC322 } 77}; 78 79#define RE_LINKSYS_EG1032_SUBID 0x00241737 80 81int re_pci_probe(struct device *, void *, void *); 82void re_pci_attach(struct device *, struct device *, void *); 83int re_pci_detach(struct device *, int); 84int re_pci_activate(struct device *, int); 85 86/* 87 * PCI autoconfig definitions 88 */ 89struct cfattach re_pci_ca = { 90 sizeof(struct re_pci_softc), 91 re_pci_probe, 92 re_pci_attach, 93 re_pci_detach, 94 re_pci_activate 95}; 96 97/* 98 * Probe for a Realtek 8169/8110 chip. Check the PCI vendor and device 99 * IDs against our list and return a device name if we find a match. 100 */ 101int 102re_pci_probe(struct device *parent, void *match, void *aux) 103{ 104 struct pci_attach_args *pa = aux; 105 pci_chipset_tag_t pc = pa->pa_pc; 106 pcireg_t subid; 107 108 subid = pci_conf_read(pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 109 110 /* C+ mode 8139's */ 111 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_REALTEK && 112 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_REALTEK_RT8139 && 113 PCI_REVISION(pa->pa_class) == 0x20) 114 return (1); 115 116 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_LINKSYS && 117 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LINKSYS_EG1032 && 118 subid == RE_LINKSYS_EG1032_SUBID) 119 return (1); 120 121 return (pci_matchbyid((struct pci_attach_args *)aux, re_pci_devices, 122 nitems(re_pci_devices))); 123} 124 125/* 126 * PCI-specific attach routine 127 */ 128void 129re_pci_attach(struct device *parent, struct device *self, void *aux) 130{ 131 struct re_pci_softc *psc = (struct re_pci_softc *)self; 132 struct rl_softc *sc = &psc->sc_rl; 133 struct pci_attach_args *pa = aux; 134 pci_chipset_tag_t pc = pa->pa_pc; 135 pci_intr_handle_t ih; 136 const char *intrstr = NULL; 137 pcireg_t command; 138 139 /* 140 * Handle power management nonsense. 141 */ 142 143 command = pci_conf_read(pc, pa->pa_tag, RL_PCI_CAPID) & 0x000000FF; 144 145 if (command == 0x01) { 146 u_int32_t iobase, membase, irq; 147 148 /* Save important PCI config data. */ 149 iobase = pci_conf_read(pc, pa->pa_tag, RL_PCI_LOIO); 150 membase = pci_conf_read(pc, pa->pa_tag, RL_PCI_LOMEM); 151 irq = pci_conf_read(pc, pa->pa_tag, RL_PCI_INTLINE); 152 153#if 0 154 /* Reset the power state. */ 155 printf(": chip is in D%d power mode " 156 "-- setting to D0", command & RL_PSTATE_MASK); 157#endif 158 command &= 0xFFFFFFFC; 159 160 /* Restore PCI config data. */ 161 pci_conf_write(pc, pa->pa_tag, RL_PCI_LOIO, iobase); 162 pci_conf_write(pc, pa->pa_tag, RL_PCI_LOMEM, membase); 163 pci_conf_write(pc, pa->pa_tag, RL_PCI_INTLINE, irq); 164 } 165 166#ifndef SMALL_KERNEL 167 /* Enable power management for wake on lan. */ 168 pci_conf_write(pc, pa->pa_tag, RL_PCI_PMCSR, RL_PME_EN); 169#endif 170 171 /* 172 * Map control/status registers. 173 */ 174 if (pci_mapreg_map(pa, RL_PCI_LOMEM, PCI_MAPREG_TYPE_MEM, 0, 175 &sc->rl_btag, &sc->rl_bhandle, NULL, &psc->sc_iosize, 0)) { 176 if (pci_mapreg_map(pa, RL_PCI_LOIO, PCI_MAPREG_TYPE_IO, 0, 177 &sc->rl_btag, &sc->rl_bhandle, NULL, &psc->sc_iosize, 0)) { 178 printf(": can't map mem or i/o space\n"); 179 return; 180 } 181 } 182 183 /* Allocate interrupt */ 184 if (pci_intr_map(pa, &ih)) { 185 printf(": couldn't map interrupt\n"); 186 return; 187 } 188 intrstr = pci_intr_string(pc, ih); 189 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, re_intr, sc, 190 sc->sc_dev.dv_xname); 191 if (psc->sc_ih == NULL) { 192 printf(": couldn't establish interrupt"); 193 if (intrstr != NULL) 194 printf(" at %s", intrstr); 195 return; 196 } 197 198 sc->sc_dmat = pa->pa_dmat; 199 psc->sc_pc = pc; 200 201 /* 202 * PCI Express check. 203 */ 204 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PCIEXPRESS, 205 NULL, NULL)) 206 sc->rl_flags |= RL_FLAG_PCIE; 207 208 /* Call bus-independent attach routine */ 209 if (re_attach(sc, intrstr)) { 210 pci_intr_disestablish(pc, psc->sc_ih); 211 bus_space_unmap(sc->rl_btag, sc->rl_bhandle, psc->sc_iosize); 212 } 213} 214 215int 216re_pci_detach(struct device *self, int flags) 217{ 218 struct re_pci_softc *psc = (struct re_pci_softc *)self; 219 struct rl_softc *sc = &psc->sc_rl; 220 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 221 222 /* Remove timeout handler */ 223 timeout_del(&sc->timer_handle); 224 225 /* Detach PHY */ 226 if (LIST_FIRST(&sc->sc_mii.mii_phys) != NULL) 227 mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY); 228 229 /* Delete media stuff */ 230 ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY); 231 ether_ifdetach(ifp); 232 if_detach(ifp); 233 234 /* Disable interrupts */ 235 if (psc->sc_ih != NULL) 236 pci_intr_disestablish(psc->sc_pc, psc->sc_ih); 237 238 /* Free pci resources */ 239 bus_space_unmap(sc->rl_btag, sc->rl_bhandle, psc->sc_iosize); 240 241 return (0); 242} 243 244int 245re_pci_activate(struct device *self, int act) 246{ 247 struct re_pci_softc *psc = (struct re_pci_softc *)self; 248 struct rl_softc *sc = &psc->sc_rl; 249 struct ifnet *ifp = &sc->sc_arpcom.ac_if; 250 251 switch (act) { 252 case DVACT_SUSPEND: 253 if (ifp->if_flags & IFF_RUNNING) 254 re_stop(ifp); 255 break; 256 case DVACT_RESUME: 257 re_reset(sc); 258 if (ifp->if_flags & IFF_UP) 259 re_init(ifp); 260 break; 261 } 262 263 return (0); 264} 265