if_re_pci.c revision 1.24
1/*	$OpenBSD: if_re_pci.c,v 1.24 2009/01/22 19:26:07 kettenis Exp $	*/
2
3/*
4 * Copyright (c) 2005 Peter Valchev <pvalchev@openbsd.org>
5 *
6 * Permission to use, copy, modify, and distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 */
18
19/*
20 * PCI front-end for the Realtek 8169
21 */
22
23#include <sys/param.h>
24#include <sys/endian.h>
25#include <sys/systm.h>
26#include <sys/sockio.h>
27#include <sys/mbuf.h>
28#include <sys/malloc.h>
29#include <sys/kernel.h>
30#include <sys/device.h>
31#include <sys/timeout.h>
32#include <sys/socket.h>
33
34#include <net/if.h>
35#include <net/if_dl.h>
36#include <net/if_media.h>
37
38#ifdef INET
39#include <netinet/in.h>
40#include <netinet/in_systm.h>
41#include <netinet/in_var.h>
42#include <netinet/ip.h>
43#include <netinet/if_ether.h>
44#endif
45
46#include <dev/mii/mii.h>
47#include <dev/mii/miivar.h>
48
49#include <dev/pci/pcireg.h>
50#include <dev/pci/pcivar.h>
51#include <dev/pci/pcidevs.h>
52
53#include <dev/ic/rtl81x9reg.h>
54#include <dev/ic/revar.h>
55
56struct re_pci_softc {
57	/* General */
58	struct rl_softc sc_rl;
59
60	/* PCI-specific data */
61	void *sc_ih;
62	pci_chipset_tag_t sc_pc;
63	pcitag_t sc_pcitag;
64
65	bus_size_t sc_iosize;
66};
67
68const struct pci_matchid re_pci_devices[] = {
69	{ PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8101E },
70	{ PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8168 },
71	{ PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169 },
72	{ PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169SC },
73	{ PCI_VENDOR_COREGA, PCI_PRODUCT_COREGA_CGLAPCIGT },
74	{ PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DGE528T },
75	{ PCI_VENDOR_USR2, PCI_PRODUCT_USR2_USR997902 },
76	{ PCI_VENDOR_TTTECH, PCI_PRODUCT_TTTECH_MC322 }
77};
78
79#define RE_LINKSYS_EG1032_SUBID 0x00241737
80
81int	re_pci_probe(struct device *, void *, void *);
82void	re_pci_attach(struct device *, struct device *, void *);
83int	re_pci_detach(struct device *, int);
84
85/*
86 * PCI autoconfig definitions
87 */
88struct cfattach re_pci_ca = {
89	sizeof(struct re_pci_softc),
90	re_pci_probe,
91	re_pci_attach,
92	re_pci_detach
93};
94
95/*
96 * Probe for a Realtek 8169/8110 chip. Check the PCI vendor and device
97 * IDs against our list and return a device name if we find a match.
98 */
99int
100re_pci_probe(struct device *parent, void *match, void *aux)
101{
102	struct pci_attach_args *pa = aux;
103	pci_chipset_tag_t pc = pa->pa_pc;
104	pcireg_t subid;
105
106	subid = pci_conf_read(pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
107
108	/* C+ mode 8139's */
109	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_REALTEK &&
110	    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_REALTEK_RT8139 &&
111	    PCI_REVISION(pa->pa_class) == 0x20)
112		return (1);
113
114	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_LINKSYS &&
115	    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LINKSYS_EG1032 &&
116	    subid == RE_LINKSYS_EG1032_SUBID)
117		return (1);
118
119	return (pci_matchbyid((struct pci_attach_args *)aux, re_pci_devices,
120	    sizeof(re_pci_devices)/sizeof(re_pci_devices[0])));
121}
122
123/*
124 * PCI-specific attach routine
125 */
126void
127re_pci_attach(struct device *parent, struct device *self, void *aux)
128{
129	struct re_pci_softc	*psc = (struct re_pci_softc *)self;
130	struct rl_softc		*sc = &psc->sc_rl;
131	struct pci_attach_args	*pa = aux;
132	pci_chipset_tag_t	pc = pa->pa_pc;
133	pci_intr_handle_t	ih;
134	const char		*intrstr = NULL;
135	pcireg_t		command;
136
137	/*
138	 * Handle power management nonsense.
139	 */
140
141	command = pci_conf_read(pc, pa->pa_tag, RL_PCI_CAPID) & 0x000000FF;
142
143	if (command == 0x01) {
144		u_int32_t		iobase, membase, irq;
145
146		/* Save important PCI config data. */
147		iobase = pci_conf_read(pc, pa->pa_tag,  RL_PCI_LOIO);
148		membase = pci_conf_read(pc, pa->pa_tag, RL_PCI_LOMEM);
149		irq = pci_conf_read(pc, pa->pa_tag, RL_PCI_INTLINE);
150
151#if 0
152		/* Reset the power state. */
153		printf(": chip is in D%d power mode "
154		    "-- setting to D0", command & RL_PSTATE_MASK);
155#endif
156		command &= 0xFFFFFFFC;
157
158		/* Restore PCI config data. */
159		pci_conf_write(pc, pa->pa_tag, RL_PCI_LOIO, iobase);
160		pci_conf_write(pc, pa->pa_tag, RL_PCI_LOMEM, membase);
161		pci_conf_write(pc, pa->pa_tag, RL_PCI_INTLINE, irq);
162	}
163
164	/*
165	 * Map control/status registers.
166	 */
167	if (pci_mapreg_map(pa, RL_PCI_LOMEM, PCI_MAPREG_TYPE_MEM, 0,
168	    &sc->rl_btag, &sc->rl_bhandle, NULL, &psc->sc_iosize, 0)) {
169		if (pci_mapreg_map(pa, RL_PCI_LOIO, PCI_MAPREG_TYPE_IO, 0,
170		    &sc->rl_btag, &sc->rl_bhandle, NULL, &psc->sc_iosize, 0)) {
171			printf(": can't map mem or i/o space\n");
172			return;
173		}
174	}
175
176	/* Allocate interrupt */
177	if (pci_intr_map(pa, &ih)) {
178		printf(": couldn't map interrupt\n");
179		return;
180	}
181	intrstr = pci_intr_string(pc, ih);
182	psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, re_intr, sc,
183	    sc->sc_dev.dv_xname);
184	if (psc->sc_ih == NULL) {
185		printf(": couldn't establish interrupt");
186		if (intrstr != NULL)
187			printf(" at %s", intrstr);
188		return;
189	}
190
191	sc->sc_dmat = pa->pa_dmat;
192	psc->sc_pc = pc;
193
194	/*
195	 * PCI Express check.
196	 */
197	if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PCIEXPRESS,
198	    NULL, NULL))
199		sc->rl_flags |= RL_FLAG_PCIE;
200
201	/* Call bus-independent attach routine */
202	if (re_attach(sc, intrstr)) {
203		pci_intr_disestablish(pc, psc->sc_ih);
204		bus_space_unmap(sc->rl_btag, sc->rl_bhandle, psc->sc_iosize);
205	}
206}
207
208int
209re_pci_detach(struct device *self, int flags)
210{
211	struct re_pci_softc	*psc = (struct re_pci_softc *)self;
212	struct rl_softc		*sc = &psc->sc_rl;
213	struct ifnet		*ifp = &sc->sc_arpcom.ac_if;
214
215	/* Remove timeout handler */
216	timeout_del(&sc->timer_handle);
217
218	/* Detach PHY */
219	if (LIST_FIRST(&sc->sc_mii.mii_phys) != NULL)
220		mii_detach(&sc->sc_mii, MII_PHY_ANY, MII_OFFSET_ANY);
221
222	/* Delete media stuff */
223	ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY);
224	ether_ifdetach(ifp);
225	if_detach(ifp);
226
227	/* No more hooks */
228	if (sc->sc_sdhook != NULL)
229		shutdownhook_disestablish(sc->sc_sdhook);
230	if (sc->sc_pwrhook != NULL)
231		powerhook_disestablish(sc->sc_pwrhook);
232
233	/* Disable interrupts */
234	if (psc->sc_ih != NULL)
235		pci_intr_disestablish(psc->sc_pc, psc->sc_ih);
236
237	/* Free pci resources */
238	bus_space_unmap(sc->rl_btag, sc->rl_bhandle, psc->sc_iosize);
239
240	return (0);
241}
242