if_re_pci.c revision 1.16
1/* $OpenBSD: if_re_pci.c,v 1.16 2006/08/06 01:01:21 brad Exp $ */ 2 3/* 4 * Copyright (c) 2005 Peter Valchev <pvalchev@openbsd.org> 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19/* 20 * PCI front-end for the Realtek 8169 21 */ 22 23#include <sys/param.h> 24#include <sys/endian.h> 25#include <sys/systm.h> 26#include <sys/sockio.h> 27#include <sys/mbuf.h> 28#include <sys/malloc.h> 29#include <sys/kernel.h> 30#include <sys/device.h> 31#include <sys/timeout.h> 32#include <sys/socket.h> 33 34#include <net/if.h> 35#include <net/if_dl.h> 36#include <net/if_media.h> 37 38#ifdef INET 39#include <netinet/in.h> 40#include <netinet/in_systm.h> 41#include <netinet/in_var.h> 42#include <netinet/ip.h> 43#include <netinet/if_ether.h> 44#endif 45 46#include <dev/mii/mii.h> 47#include <dev/mii/miivar.h> 48 49#include <dev/pci/pcireg.h> 50#include <dev/pci/pcivar.h> 51#include <dev/pci/pcidevs.h> 52 53#include <dev/ic/rtl81x9reg.h> 54#include <dev/ic/revar.h> 55 56struct re_pci_softc { 57 /* General */ 58 struct rl_softc sc_rl; 59 60 /* PCI-specific data */ 61 void *sc_ih; 62 pci_chipset_tag_t sc_pc; 63 pcitag_t sc_pcitag; 64}; 65 66const struct pci_matchid re_pci_devices[] = { 67 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8101E }, 68 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8168 }, 69 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169 }, 70 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169SC }, 71 { PCI_VENDOR_COREGA, PCI_PRODUCT_COREGA_CGLAPCIGT }, 72 { PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DGE528T }, 73 { PCI_VENDOR_USR2, PCI_PRODUCT_USR2_USR997902 }, 74 { PCI_VENDOR_TTTECH, PCI_PRODUCT_TTTECH_MC322 } 75}; 76 77#define RE_LINKSYS_EG1032_SUBID 0x00241737 78 79int re_pci_probe(struct device *, void *, void *); 80void re_pci_attach(struct device *, struct device *, void *); 81 82/* 83 * PCI autoconfig definitions 84 */ 85struct cfattach re_pci_ca = { 86 sizeof(struct re_pci_softc), 87 re_pci_probe, 88 re_pci_attach 89}; 90 91/* 92 * Probe for a Realtek 8169/8110 chip. Check the PCI vendor and device 93 * IDs against our list and return a device name if we find a match. 94 */ 95int 96re_pci_probe(struct device *parent, void *match, void *aux) 97{ 98 struct pci_attach_args *pa = aux; 99 pci_chipset_tag_t pc = pa->pa_pc; 100 pcireg_t subid; 101 102 subid = pci_conf_read(pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 103 104 /* C+ mode 8139's */ 105 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_REALTEK && 106 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_REALTEK_RT8139 && 107 PCI_REVISION(pa->pa_class) == 0x20) 108 return (1); 109 110 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_LINKSYS && 111 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LINKSYS_EG1032 && 112 subid == RE_LINKSYS_EG1032_SUBID) 113 return (1); 114 115 return (pci_matchbyid((struct pci_attach_args *)aux, re_pci_devices, 116 sizeof(re_pci_devices)/sizeof(re_pci_devices[0]))); 117} 118 119/* 120 * PCI-specific attach routine 121 */ 122void 123re_pci_attach(struct device *parent, struct device *self, void *aux) 124{ 125 struct re_pci_softc *psc = (struct re_pci_softc *)self; 126 struct rl_softc *sc = &psc->sc_rl; 127 struct pci_attach_args *pa = aux; 128 pci_chipset_tag_t pc = pa->pa_pc; 129 pci_intr_handle_t ih; 130 const char *intrstr = NULL; 131 bus_size_t iosize; 132 pcireg_t command; 133 134 /* 135 * Handle power management nonsense. 136 */ 137 138 command = pci_conf_read(pc, pa->pa_tag, RL_PCI_CAPID) & 0x000000FF; 139 140 if (command == 0x01) { 141 u_int32_t iobase, membase, irq; 142 143 /* Save important PCI config data. */ 144 iobase = pci_conf_read(pc, pa->pa_tag, RL_PCI_LOIO); 145 membase = pci_conf_read(pc, pa->pa_tag, RL_PCI_LOMEM); 146 irq = pci_conf_read(pc, pa->pa_tag, RL_PCI_INTLINE); 147 148 /* Reset the power state. */ 149 printf(": chip is is in D%d power mode " 150 "-- setting to D0", command & RL_PSTATE_MASK); 151 command &= 0xFFFFFFFC; 152 153 /* Restore PCI config data. */ 154 pci_conf_write(pc, pa->pa_tag, RL_PCI_LOIO, iobase); 155 pci_conf_write(pc, pa->pa_tag, RL_PCI_LOMEM, membase); 156 pci_conf_write(pc, pa->pa_tag, RL_PCI_INTLINE, irq); 157 } 158 159 /* 160 * Map control/status registers. 161 */ 162 if (pci_mapreg_map(pa, RL_PCI_LOMEM, PCI_MAPREG_TYPE_MEM, 0, 163 &sc->rl_btag, &sc->rl_bhandle, NULL, &iosize, 0)) { 164 if (pci_mapreg_map(pa, RL_PCI_LOIO, PCI_MAPREG_TYPE_IO, 0, 165 &sc->rl_btag, &sc->rl_bhandle, NULL, &iosize, 0)) { 166 printf(": can't map mem or i/o space\n"); 167 return; 168 } 169 } 170 171 /* Allocate interrupt */ 172 if (pci_intr_map(pa, &ih)) { 173 printf(": couldn't map interrupt\n"); 174 return; 175 } 176 intrstr = pci_intr_string(pc, ih); 177 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, re_intr, sc, 178 sc->sc_dev.dv_xname); 179 if (psc->sc_ih == NULL) { 180 printf(": couldn't establish interrupt"); 181 if (intrstr != NULL) 182 printf(" at %s", intrstr); 183 return; 184 } 185 printf(": %s", intrstr); 186 187 sc->sc_dmat = pa->pa_dmat; 188 sc->sc_flags |= RL_ENABLED; 189 190 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_REALTEK) { 191 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_REALTEK_RT8139) 192 sc->rl_type = RL_8139CPLUS; 193 else 194 sc->rl_type = RL_8169; 195 } else if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_TTTECH && 196 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_TTTECH_MC322) 197 sc->rl_type = RL_8139CPLUS; 198 else 199 sc->rl_type = RL_8169; 200 201 /* Call bus-independent attach routine */ 202 re_attach(sc); 203} 204