if_em.h revision 1.3
1/**************************************************************************
2
3Copyright (c) 2001-2003, Intel Corporation
4All rights reserved.
5
6Redistribution and use in source and binary forms, with or without
7modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,
10    this list of conditions and the following disclaimer.
11
12 2. Redistributions in binary form must reproduce the above copyright
13    notice, this list of conditions and the following disclaimer in the
14    documentation and/or other materials provided with the distribution.
15
16 3. Neither the name of the Intel Corporation nor the names of its
17    contributors may be used to endorse or promote products derived from
18    this software without specific prior written permission.
19
20THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30POSSIBILITY OF SUCH DAMAGE.
31
32***************************************************************************/
33
34/*$FreeBSD: if_em.h,v 1.24 2003/11/14 18:02:24 pdeuskar Exp $*/
35/* $OpenBSD: if_em.h,v 1.3 2004/04/18 04:15:00 henric Exp $ */
36
37#ifndef _EM_H_DEFINED_
38#define _EM_H_DEFINED_
39
40#include <dev/pci/if_em_hw.h>
41
42/* Tunables */
43
44/*
45 * EM_MAX_TXD: Maximum number of Transmit Descriptors
46 * Valid Range: 80-256 for 82542 and 82543-based adapters
47 *              80-4096 for others
48 * Default Value: 256
49 *   This value is the number of transmit descriptors allocated by the driver.
50 *   Increasing this value allows the driver to queue more transmits. Each
51 *   descriptor is 16 bytes.
52 */
53#define EM_MAX_TXD                      256
54
55/*
56 * EM_MAX_RXD - Maximum number of receive Descriptors
57 * Valid Range: 80-256 for 82542 and 82543-based adapters
58 *              80-4096 for others
59 * Default Value: 256
60 *   This value is the number of receive descriptors allocated by the driver.
61 *   Increasing this value allows the driver to buffer more incoming packets.
62 *   Each descriptor is 16 bytes.  A receive buffer is also allocated for each
63 *   descriptor. The maximum MTU size is 16110.
64 *
65 */
66#define EM_MAX_RXD                      256
67
68/*
69 * EM_TIDV - Transmit Interrupt Delay Value
70 * Valid Range: 0-65535 (0=off)
71 * Default Value: 64
72 *   This value delays the generation of transmit interrupts in units of
73 *   1.024 microseconds. Transmit interrupt reduction can improve CPU
74 *   efficiency if properly tuned for specific network traffic. If the
75 *   system is reporting dropped transmits, this value may be set too high
76 *   causing the driver to run out of available transmit descriptors.
77 */
78#define EM_TIDV                         64
79
80/*
81 * EM_TADV - Transmit Absolute Interrupt Delay Value (Not valid for 82542/82543/82544)
82 * Valid Range: 0-65535 (0=off)
83 * Default Value: 64
84 *   This value, in units of 1.024 microseconds, limits the delay in which a
85 *   transmit interrupt is generated. Useful only if EM_TIDV is non-zero,
86 *   this value ensures that an interrupt is generated after the initial
87 *   packet is sent on the wire within the set amount of time.  Proper tuning,
88 *   along with EM_TIDV, may improve traffic throughput in specific
89 *   network conditions.
90 */
91#define EM_TADV                         64
92
93/*
94 * EM_RDTR - Receive Interrupt Delay Timer (Packet Timer)
95 * Valid Range: 0-65535 (0=off)
96 * Default Value: 0
97 *   This value delays the generation of receive interrupts in units of 1.024
98 *   microseconds.  Receive interrupt reduction can improve CPU efficiency if
99 *   properly tuned for specific network traffic. Increasing this value adds
100 *   extra latency to frame reception and can end up decreasing the throughput
101 *   of TCP traffic. If the system is reporting dropped receives, this value
102 *   may be set too high, causing the driver to run out of available receive
103 *   descriptors.
104 *
105 *   CAUTION: When setting EM_RDTR to a value other than 0, adapters
106 *            may hang (stop transmitting) under certain network conditions.
107 *            If this occurs a WATCHDOG message is logged in the system event log.
108 *            In addition, the controller is automatically reset, restoring the
109 *            network connection. To eliminate the potential for the hang
110 *            ensure that EM_RDTR is set to 0.
111 */
112#define EM_RDTR                         0
113
114/*
115 * Receive Interrupt Absolute Delay Timer (Not valid for 82542/82543/82544)
116 * Valid Range: 0-65535 (0=off)
117 * Default Value: 64
118 *   This value, in units of 1.024 microseconds, limits the delay in which a
119 *   receive interrupt is generated. Useful only if EM_RDTR is non-zero,
120 *   this value ensures that an interrupt is generated after the initial
121 *   packet is received within the set amount of time.  Proper tuning,
122 *   along with EM_RDTR, may improve traffic throughput in specific network
123 *   conditions.
124 */
125#define EM_RADV                         64
126
127
128/*
129 * This parameter controls the maximum no of times the driver will loop
130 * in the isr.
131 *           Minimum Value = 1
132 */
133#define EM_MAX_INTR                     3
134
135/*
136 * Inform the stack about transmit checksum offload capabilities.
137 */
138#define EM_CHECKSUM_FEATURES            (CSUM_TCP | CSUM_UDP)
139
140/*
141 * This parameter controls the duration of transmit watchdog timer.
142 */
143#define EM_TX_TIMEOUT                   5    /* set to 5 seconds */
144
145/*
146 * This parameter controls when the driver calls the routine to reclaim
147 * transmit descriptors.
148 */
149#define EM_TX_CLEANUP_THRESHOLD         EM_MAX_TXD / 8
150
151/*
152 * This parameter controls whether or not autonegotation is enabled.
153 *              0 - Disable autonegotiation
154 *              1 - Enable  autonegotiation
155 */
156#define DO_AUTO_NEG                     1
157
158/*
159 * This parameter control whether or not the driver will wait for
160 * autonegotiation to complete.
161 *              1 - Wait for autonegotiation to complete
162 *              0 - Don't wait for autonegotiation to complete
163 */
164#define WAIT_FOR_AUTO_NEG_DEFAULT       0
165
166/*
167 * EM_MASTER_SLAVE is only defined to enable a workaround for a known compatibility issue
168 * with 82541/82547 devices and some switches.  See the "Known Limitations" section of
169 * the README file for a complete description and a list of affected switches.
170 *
171 *              0 = Hardware default
172 *              1 = Master mode
173 *              2 = Slave mode
174 *              3 = Auto master/slave
175 */
176/* #define EM_MASTER_SLAVE      2 */
177
178/* Tunables -- End */
179
180#define AUTONEG_ADV_DEFAULT             (ADVERTISE_10_HALF | ADVERTISE_10_FULL | \
181                                         ADVERTISE_100_HALF | ADVERTISE_100_FULL | \
182                                         ADVERTISE_1000_FULL)
183
184#define EM_VENDOR_ID                    0x8086
185#define EM_MMBA                         0x0010 /* Mem base address */
186#define EM_ROUNDUP(size, unit) (((size) + (unit) - 1) & ~((unit) - 1))
187
188#define EM_JUMBO_PBA                    0x00000028
189#define EM_DEFAULT_PBA                  0x00000030
190#define EM_SMARTSPEED_DOWNSHIFT         3
191#define EM_SMARTSPEED_MAX               15
192
193
194#define MAX_NUM_MULTICAST_ADDRESSES     128
195#define PCI_ANY_ID                      (~0U)
196#define ETHER_ALIGN                     2
197
198/* Defines for printing debug information */
199#define DEBUG_INIT  0
200#define DEBUG_IOCTL 0
201#define DEBUG_HW    0
202
203#define INIT_DEBUGOUT(S)            if (DEBUG_INIT)  printf(S "\n")
204#define INIT_DEBUGOUT1(S, A)        if (DEBUG_INIT)  printf(S "\n", A)
205#define INIT_DEBUGOUT2(S, A, B)     if (DEBUG_INIT)  printf(S "\n", A, B)
206#define IOCTL_DEBUGOUT(S)           if (DEBUG_IOCTL) printf(S "\n")
207#define IOCTL_DEBUGOUT1(S, A)       if (DEBUG_IOCTL) printf(S "\n", A)
208#define IOCTL_DEBUGOUT2(S, A, B)    if (DEBUG_IOCTL) printf(S "\n", A, B)
209#define HW_DEBUGOUT(S)              if (DEBUG_HW) printf(S "\n")
210#define HW_DEBUGOUT1(S, A)          if (DEBUG_HW) printf(S "\n", A)
211#define HW_DEBUGOUT2(S, A, B)       if (DEBUG_HW) printf(S "\n", A, B)
212
213
214/* Supported RX Buffer Sizes */
215#define EM_RXBUFFER_2048        2048
216#define EM_RXBUFFER_4096        4096
217#define EM_RXBUFFER_8192        8192
218#define EM_RXBUFFER_16384      16384
219
220#define EM_MAX_SCATTER            64
221
222/* ******************************************************************************
223 * vendor_info_array
224 *
225 * This array contains the list of Subvendor/Subdevice IDs on which the driver
226 * should load.
227 *
228 * ******************************************************************************/
229#ifdef __FreeBSD__
230typedef struct _em_vendor_info_t {
231        unsigned int vendor_id;
232        unsigned int device_id;
233        unsigned int subvendor_id;
234        unsigned int subdevice_id;
235        unsigned int index;
236} em_vendor_info_t;
237#endif /* __FreeBSD__ */
238
239
240struct em_buffer {
241        struct mbuf    *m_head;
242	bus_dmamap_t	map;		/* bus_dma map for packet */
243};
244
245struct em_q {
246	bus_dmamap_t       map;         /* bus_dma map for packet */
247#ifdef __FreeBSD__
248	int                nsegs;       /* # of segments/descriptors */
249	bus_dma_segment_t  segs[EM_MAX_SCATTER];
250#endif /* __FreeBSD__ */
251};
252
253/*
254 * Bus dma allocation structure used by
255 * em_dma_malloc and em_dma_free.
256 */
257struct em_dma_alloc {
258	bus_addr_t              dma_paddr;
259	caddr_t                 dma_vaddr;
260	bus_dma_tag_t           dma_tag;
261	bus_dmamap_t            dma_map;
262	bus_dma_segment_t       dma_seg;
263	bus_size_t              dma_size;
264	int                     dma_nseg;
265};
266
267typedef enum _XSUM_CONTEXT_T {
268	OFFLOAD_NONE,
269	OFFLOAD_TCP_IP,
270	OFFLOAD_UDP_IP
271} XSUM_CONTEXT_T;
272
273struct em_softc;
274struct em_int_delay_info {
275        struct em_softc *sc;    /* Back-pointer to the sc struct */
276        int offset;                     /* Register offset to read/write */
277        int value;                      /* Current value in usecs */
278};
279
280/* For 82544 PCIX  Workaround */
281typedef struct _ADDRESS_LENGTH_PAIR
282{
283    u_int64_t   address;
284    u_int32_t   length;
285} ADDRESS_LENGTH_PAIR, *PADDRESS_LENGTH_PAIR;
286
287typedef struct _DESCRIPTOR_PAIR
288{
289    ADDRESS_LENGTH_PAIR descriptor[4];
290    u_int32_t   elements;
291} DESC_ARRAY, *PDESC_ARRAY;
292
293/* Our adapter structure */
294struct em_softc {
295#ifdef __OpenBSD__
296	struct device	sc_dv;
297#endif
298	struct arpcom	interface_data;
299	struct em_softc *next;
300	struct em_softc *prev;
301	struct em_hw    hw;
302
303	/* FreeBSD operating-system-specific structures */
304	struct em_osdep osdep;
305#ifdef __FreeBSD__
306        struct device   *dev;
307        struct resource *res_memory;
308        struct resource *res_ioport;
309        struct resource *res_interrupt;
310        void            *int_handler_tag;
311#endif /* __FreeBSD__ */
312	struct ifmedia  media;
313#ifdef __FreeBSD__
314        struct callout  timer;
315        struct callout  tx_fifo_timer;
316#endif /* __FreeBSD__ */
317	int             io_rid;
318#ifdef __FreeBSD__
319        u_int8_t        unit;
320        struct mtx      mtx;
321#endif /* __FreeBSD__ */
322
323#ifdef __OpenBSD__
324	void           *sc_intrhand;
325	struct timeout	em_intr_enable;
326	struct timeout	timer_handle;
327	struct timeout	tx_fifo_timer_handle;
328#endif /* __OpenBSD__ */
329
330	/* Info about the board itself */
331	u_int32_t       part_num;
332	u_int8_t        link_active;
333	u_int16_t       link_speed;
334	u_int16_t       link_duplex;
335	u_int32_t       smartspeed;
336	struct em_int_delay_info tx_int_delay;
337	struct em_int_delay_info tx_abs_int_delay;
338	struct em_int_delay_info rx_int_delay;
339	struct em_int_delay_info rx_abs_int_delay;
340
341	XSUM_CONTEXT_T  active_checksum_context;
342
343        /*
344         * Transmit definitions
345         *
346         * We have an array of num_tx_desc descriptors (handled
347         * by the controller) paired with an array of tx_buffers
348         * (at tx_buffer_area).
349         * The index of the next available descriptor is next_avail_tx_desc.
350         * The number of remaining tx_desc is num_tx_desc_avail.
351         */
352	struct em_dma_alloc	txdma;		/* bus_dma glue for tx desc */
353	struct em_tx_desc	*tx_desc_base;
354	u_int32_t		next_avail_tx_desc;
355	u_int32_t		oldest_used_tx_desc;
356	volatile u_int16_t	num_tx_desc_avail;
357	u_int16_t		num_tx_desc;
358	u_int32_t		txd_cmd;
359	struct em_buffer	*tx_buffer_area;
360	bus_dma_tag_t		txtag;		/* dma tag for tx */
361
362        /*
363         * Receive definitions
364         *
365         * we have an array of num_rx_desc rx_desc (handled by the
366         * controller), and paired with an array of rx_buffers
367         * (at rx_buffer_area).
368         * The next pair to check on receive is at offset next_rx_desc_to_check
369         */
370	struct em_dma_alloc	rxdma;		/* bus_dma glue for rx desc */
371	struct em_rx_desc	*rx_desc_base;
372	u_int32_t		next_rx_desc_to_check;
373	u_int16_t		num_rx_desc;
374	u_int32_t		rx_buffer_len;
375	struct em_buffer	*rx_buffer_area;
376	bus_dma_tag_t		rxtag;
377
378	/* Jumbo frame */
379	struct mbuf        *fmp;
380	struct mbuf        *lmp;
381
382	u_int16_t          tx_fifo_head;
383
384#ifdef __FreeBSD__
385        struct sysctl_ctx_list sysctl_ctx;
386        struct sysctl_oid *sysctl_tree;
387#endif /* __FreeBSD__ */
388
389	/* Misc stats maintained by the driver */
390	unsigned long   dropped_pkts;
391	unsigned long   mbuf_alloc_failed;
392	unsigned long   mbuf_cluster_failed;
393	unsigned long   no_tx_desc_avail1;
394	unsigned long   no_tx_desc_avail2;
395	unsigned long   no_tx_map_avail;
396        unsigned long   no_tx_dma_setup;
397	u_int64_t       tx_fifo_reset;
398	u_int64_t       tx_fifo_wrk;
399
400        /* For 82544 PCIX Workaround */
401        boolean_t       pcix_82544;
402        boolean_t       in_detach;
403
404#ifdef DBG_STATS
405	unsigned long   no_pkts_avail;
406	unsigned long   clean_tx_interrupts;
407
408#endif
409	struct em_hw_stats stats;
410};
411
412#ifdef __FreeBSD__
413#define EM_LOCK_INIT(_sc, _name) \
414        mtx_init(&(_sc)->mtx, _name, MTX_NETWORK_LOCK, MTX_DEF)
415#define EM_LOCK_DESTROY(_sc)    mtx_destroy(&(_sc)->mtx)
416#define EM_LOCK(_sc)            mtx_lock(&(_sc)->mtx)
417#define EM_UNLOCK(_sc)          mtx_unlock(&(_sc)->mtx)
418#define EM_LOCK_ASSERT(_sc)     mtx_assert(&(_sc)->mtx, MA_OWNED)
419#endif /* __FreeBSD__ */
420
421#ifdef __OpenBSD__
422static inline int spl_use_arg(void *);
423static inline int spl_use_arg(void *v) { return splnet(); }
424#define EM_LOCK_INIT(_sc, _name)
425#define EM_LOCK_DESTROY(_sc)
426#define EM_LOCK_STATE()		int em_hidden_splnet_s
427#define EM_LOCK(_sc)		em_hidden_splnet_s = spl_use_arg(_sc)
428#define EM_UNLOCK(_sc)		splx(em_hidden_splnet_s)
429#define EM_LOCK_ASSERT(_sc)	splassert(IPL_NET)
430#endif /* __OpenBSD__ */
431
432#endif                                                  /* _EM_H_DEFINED_ */
433