if_em.h revision 1.19 
1/**************************************************************************
2
3Copyright (c) 2001-2003, Intel Corporation
4All rights reserved.
5
6Redistribution and use in source and binary forms, with or without
7modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,
10    this list of conditions and the following disclaimer.
11
12 2. Redistributions in binary form must reproduce the above copyright
13    notice, this list of conditions and the following disclaimer in the
14    documentation and/or other materials provided with the distribution.
15
16 3. Neither the name of the Intel Corporation nor the names of its
17    contributors may be used to endorse or promote products derived from
18    this software without specific prior written permission.
19
20THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30POSSIBILITY OF SUCH DAMAGE.
31
32***************************************************************************/
33
34/* $FreeBSD: if_em.h,v 1.26 2004/09/01 23:22:41 pdeuskar Exp $ */
35/* $OpenBSD: if_em.h,v 1.19 2005/11/18 18:13:29 brad Exp $ */
36
37#ifndef _EM_H_DEFINED_
38#define _EM_H_DEFINED_
39
40#include "bpfilter.h"
41#include "vlan.h"
42
43#include <sys/param.h>
44#include <sys/systm.h>
45#include <sys/sockio.h>
46#include <sys/mbuf.h>
47#include <sys/malloc.h>
48#include <sys/kernel.h>
49#include <sys/device.h>
50#include <sys/socket.h>
51
52#include <net/if.h>
53#include <net/if_dl.h>
54#include <net/if_media.h>
55
56#ifdef INET
57#include <netinet/in.h>
58#include <netinet/in_systm.h>
59#include <netinet/in_var.h>
60#include <netinet/ip.h>
61#include <netinet/if_ether.h>
62#include <netinet/tcp.h>
63#include <netinet/udp.h>
64#endif
65
66#if NVLAN > 0
67#include <net/if_types.h>
68#include <net/if_vlan_var.h>
69#endif
70
71#if NBPFILTER > 0
72#include <net/bpf.h>
73#endif
74
75#include <uvm/uvm_extern.h>
76
77#include <dev/pci/pcireg.h>
78#include <dev/pci/pcivar.h>
79#include <dev/pci/pcidevs.h>
80
81#include <dev/pci/if_em_hw.h>
82
83/* Tunables */
84
85/*
86 * EM_MAX_TXD: Maximum number of Transmit Descriptors
87 * Valid Range: 80-256 for 82542 and 82543-based adapters
88 *              80-4096 for others
89 * Default Value: 256
90 *   This value is the number of transmit descriptors allocated by the driver.
91 *   Increasing this value allows the driver to queue more transmits. Each
92 *   descriptor is 16 bytes.
93 */
94#define EM_MIN_TXD                      12
95#define EM_MAX_TXD                      256
96
97/*
98 * EM_MAX_RXD - Maximum number of receive Descriptors
99 * Valid Range: 80-256 for 82542 and 82543-based adapters
100 *              80-4096 for others
101 * Default Value: 256
102 *   This value is the number of receive descriptors allocated by the driver.
103 *   Increasing this value allows the driver to buffer more incoming packets.
104 *   Each descriptor is 16 bytes.  A receive buffer is also allocated for each
105 *   descriptor. The maximum MTU size is 16110.
106 *
107 */
108#define EM_MIN_RXD                      12
109#define EM_MAX_RXD                      256
110
111/*
112 * EM_TIDV - Transmit Interrupt Delay Value
113 * Valid Range: 0-65535 (0=off)
114 * Default Value: 64
115 *   This value delays the generation of transmit interrupts in units of
116 *   1.024 microseconds. Transmit interrupt reduction can improve CPU
117 *   efficiency if properly tuned for specific network traffic. If the
118 *   system is reporting dropped transmits, this value may be set too high
119 *   causing the driver to run out of available transmit descriptors.
120 */
121#define EM_TIDV                         64
122
123/*
124 * EM_TADV - Transmit Absolute Interrupt Delay Value (Not valid for 82542/82543/82544)
125 * Valid Range: 0-65535 (0=off)
126 * Default Value: 64
127 *   This value, in units of 1.024 microseconds, limits the delay in which a
128 *   transmit interrupt is generated. Useful only if EM_TIDV is non-zero,
129 *   this value ensures that an interrupt is generated after the initial
130 *   packet is sent on the wire within the set amount of time.  Proper tuning,
131 *   along with EM_TIDV, may improve traffic throughput in specific
132 *   network conditions.
133 */
134#define EM_TADV                         64
135
136/*
137 * EM_RDTR - Receive Interrupt Delay Timer (Packet Timer)
138 * Valid Range: 0-65535 (0=off)
139 * Default Value: 0
140 *   This value delays the generation of receive interrupts in units of 1.024
141 *   microseconds.  Receive interrupt reduction can improve CPU efficiency if
142 *   properly tuned for specific network traffic. Increasing this value adds
143 *   extra latency to frame reception and can end up decreasing the throughput
144 *   of TCP traffic. If the system is reporting dropped receives, this value
145 *   may be set too high, causing the driver to run out of available receive
146 *   descriptors.
147 *
148 *   CAUTION: When setting EM_RDTR to a value other than 0, adapters
149 *            may hang (stop transmitting) under certain network conditions.
150 *            If this occurs a WATCHDOG message is logged in the system event log.
151 *            In addition, the controller is automatically reset, restoring the
152 *            network connection. To eliminate the potential for the hang
153 *            ensure that EM_RDTR is set to 0.
154 */
155#define EM_RDTR                         0
156
157/*
158 * Receive Interrupt Absolute Delay Timer (Not valid for 82542/82543/82544)
159 * Valid Range: 0-65535 (0=off)
160 * Default Value: 64
161 *   This value, in units of 1.024 microseconds, limits the delay in which a
162 *   receive interrupt is generated. Useful only if EM_RDTR is non-zero,
163 *   this value ensures that an interrupt is generated after the initial
164 *   packet is received within the set amount of time.  Proper tuning,
165 *   along with EM_RDTR, may improve traffic throughput in specific network
166 *   conditions.
167 */
168#define EM_RADV                         64
169
170/*
171 * This parameter controls the duration of transmit watchdog timer.
172 */
173#define EM_TX_TIMEOUT                   5    /* set to 5 seconds */
174
175/*
176 * This parameter controls when the driver calls the routine to reclaim
177 * transmit descriptors.
178 */
179#define EM_TX_CLEANUP_THRESHOLD         EM_MAX_TXD / 8
180
181/*
182 * This parameter controls whether or not autonegotation is enabled.
183 *              0 - Disable autonegotiation
184 *              1 - Enable  autonegotiation
185 */
186#define DO_AUTO_NEG                     1
187
188/*
189 * This parameter control whether or not the driver will wait for
190 * autonegotiation to complete.
191 *              1 - Wait for autonegotiation to complete
192 *              0 - Don't wait for autonegotiation to complete
193 */
194#define WAIT_FOR_AUTO_NEG_DEFAULT       0
195
196/*
197 * EM_MASTER_SLAVE is only defined to enable a workaround for a known compatibility issue
198 * with 82541/82547 devices and some switches.  See the "Known Limitations" section of
199 * the README file for a complete description and a list of affected switches.
200 *
201 *              0 = Hardware default
202 *              1 = Master mode
203 *              2 = Slave mode
204 *              3 = Auto master/slave
205 */
206/* #define EM_MASTER_SLAVE      2 */
207
208/* Tunables -- End */
209
210#define AUTONEG_ADV_DEFAULT             (ADVERTISE_10_HALF | ADVERTISE_10_FULL | \
211                                         ADVERTISE_100_HALF | ADVERTISE_100_FULL | \
212                                         ADVERTISE_1000_FULL)
213
214#define EM_MMBA                         0x0010 /* Mem base address */
215#define EM_ROUNDUP(size, unit) (((size) + (unit) - 1) & ~((unit) - 1))
216
217#define EM_JUMBO_PBA                    0x00000028
218#define EM_DEFAULT_PBA                  0x00000030
219#define EM_SMARTSPEED_DOWNSHIFT         3
220#define EM_SMARTSPEED_MAX               15
221
222#define MAX_NUM_MULTICAST_ADDRESSES     128
223
224/* Defines for printing debug information */
225#define DEBUG_INIT  0
226#define DEBUG_IOCTL 0
227#define DEBUG_HW    0
228
229#define INIT_DEBUGOUT(S)            if (DEBUG_INIT)  printf(S "\n")
230#define INIT_DEBUGOUT1(S, A)        if (DEBUG_INIT)  printf(S "\n", A)
231#define INIT_DEBUGOUT2(S, A, B)     if (DEBUG_INIT)  printf(S "\n", A, B)
232#define IOCTL_DEBUGOUT(S)           if (DEBUG_IOCTL) printf(S "\n")
233#define IOCTL_DEBUGOUT1(S, A)       if (DEBUG_IOCTL) printf(S "\n", A)
234#define IOCTL_DEBUGOUT2(S, A, B)    if (DEBUG_IOCTL) printf(S "\n", A, B)
235#define HW_DEBUGOUT(S)              if (DEBUG_HW) printf(S "\n")
236#define HW_DEBUGOUT1(S, A)          if (DEBUG_HW) printf(S "\n", A)
237#define HW_DEBUGOUT2(S, A, B)       if (DEBUG_HW) printf(S "\n", A, B)
238
239/* Supported RX Buffer Sizes */
240#define EM_RXBUFFER_2048        2048
241#define EM_RXBUFFER_4096        4096
242#define EM_RXBUFFER_8192        8192
243#define EM_RXBUFFER_16384      16384
244
245#define EM_MAX_SCATTER            64
246
247struct em_buffer {
248        struct mbuf    *m_head;
249	bus_dmamap_t	map;		/* bus_dma map for packet */
250};
251
252struct em_q {
253	bus_dmamap_t       map;         /* bus_dma map for packet */
254};
255
256/*
257 * Bus dma allocation structure used by
258 * em_dma_malloc and em_dma_free.
259 */
260struct em_dma_alloc {
261	bus_addr_t              dma_paddr;
262	caddr_t                 dma_vaddr;
263	bus_dma_tag_t           dma_tag;
264	bus_dmamap_t            dma_map;
265	bus_dma_segment_t       dma_seg;
266	bus_size_t              dma_size;
267	int                     dma_nseg;
268};
269
270typedef enum _XSUM_CONTEXT_T {
271	OFFLOAD_NONE,
272	OFFLOAD_TCP_IP,
273	OFFLOAD_UDP_IP
274} XSUM_CONTEXT_T;
275
276/* For 82544 PCI-X Workaround */
277typedef struct _ADDRESS_LENGTH_PAIR
278{
279    u_int64_t   address;
280    u_int32_t   length;
281} ADDRESS_LENGTH_PAIR, *PADDRESS_LENGTH_PAIR;
282
283typedef struct _DESCRIPTOR_PAIR
284{
285    ADDRESS_LENGTH_PAIR descriptor[4];
286    u_int32_t   elements;
287} DESC_ARRAY, *PDESC_ARRAY;
288
289/* Our adapter structure */
290struct em_softc {
291	struct device	sc_dv;
292	struct arpcom	interface_data;
293	struct em_hw    hw;
294
295	/* OpenBSD operating-system-specific structures */
296	struct em_osdep osdep;
297	struct ifmedia  media;
298	int             io_rid;
299
300	void           *sc_intrhand;
301	struct timeout	em_intr_enable;
302	struct timeout	timer_handle;
303	struct timeout	tx_fifo_timer_handle;
304	void		*sc_powerhook;
305
306#ifdef __STRICT_ALIGNMENT
307	/* Used for carrying forward alignment adjustments */
308	unsigned char	align_buf[ETHER_ALIGN];	/* tail of unaligned packet */
309	u_int8_t	align_buf_len;		/* bytes in tail */
310#endif /* __STRICT_ALIGNMENT */
311
312	/* Info about the board itself */
313	u_int32_t       part_num;
314	u_int8_t        link_active;
315	u_int16_t       link_speed;
316	u_int16_t       link_duplex;
317	u_int32_t       smartspeed;
318	u_int32_t       tx_int_delay;
319	u_int32_t       tx_abs_int_delay;
320	u_int32_t	rx_int_delay;
321	u_int32_t	rx_abs_int_delay;
322
323	XSUM_CONTEXT_T  active_checksum_context;
324
325        /*
326         * Transmit definitions
327         *
328         * We have an array of num_tx_desc descriptors (handled
329         * by the controller) paired with an array of tx_buffers
330         * (at tx_buffer_area).
331         * The index of the next available descriptor is next_avail_tx_desc.
332         * The number of remaining tx_desc is num_tx_desc_avail.
333         */
334	struct em_dma_alloc	txdma;		/* bus_dma glue for tx desc */
335	struct em_tx_desc	*tx_desc_base;
336	u_int32_t		next_avail_tx_desc;
337	u_int32_t		oldest_used_tx_desc;
338	volatile u_int16_t	num_tx_desc_avail;
339	u_int16_t		num_tx_desc;
340	u_int32_t		txd_cmd;
341	struct em_buffer	*tx_buffer_area;
342	bus_dma_tag_t		txtag;		/* dma tag for tx */
343
344        /*
345         * Receive definitions
346         *
347         * we have an array of num_rx_desc rx_desc (handled by the
348         * controller), and paired with an array of rx_buffers
349         * (at rx_buffer_area).
350         * The next pair to check on receive is at offset next_rx_desc_to_check
351         */
352	struct em_dma_alloc	rxdma;		/* bus_dma glue for rx desc */
353	struct em_rx_desc	*rx_desc_base;
354	u_int32_t		next_rx_desc_to_check;
355	u_int16_t		num_rx_desc;
356	u_int32_t		rx_buffer_len;
357	struct em_buffer	*rx_buffer_area;
358	bus_dma_tag_t		rxtag;
359
360	/* Jumbo frame */
361	struct mbuf        *fmp;
362	struct mbuf        *lmp;
363
364	/* Misc stats maintained by the driver */
365	unsigned long   dropped_pkts;
366	unsigned long   mbuf_alloc_failed;
367	unsigned long   mbuf_cluster_failed;
368	unsigned long   no_tx_desc_avail1;
369	unsigned long   no_tx_desc_avail2;
370	unsigned long   no_tx_map_avail;
371	unsigned long   no_tx_dma_setup;
372	unsigned long   watchdog_events;
373	unsigned long	rx_overruns;
374
375	/* Used in for 82547 10Mb Half workaround */
376	#define EM_PBA_BYTES_SHIFT	0xA
377	#define EM_TX_HEAD_ADDR_SHIFT	7
378	#define EM_PBA_TX_MASK		0xFFFF0000
379	#define EM_FIFO_HDR              0x10
380
381	#define EM_82547_PKT_THRESH      0x3e0
382
383	u_int32_t       tx_fifo_size;
384	u_int32_t       tx_fifo_head;
385	u_int32_t       tx_fifo_head_addr;
386	u_int64_t       tx_fifo_reset_cnt;
387	u_int64_t       tx_fifo_wrk_cnt;
388	u_int32_t       tx_head_addr;
389
390        /* For 82544 PCI-X Workaround */
391        boolean_t       pcix_82544;
392        boolean_t       in_detach;
393
394	struct em_hw_stats stats;
395};
396
397#endif                                                  /* _EM_H_DEFINED_ */
398