1/*	$OpenBSD: emuxkivar.h,v 1.11 2016/09/19 06:46:44 ratchov Exp $	*/
2/*	$NetBSD: emuxkivar.h,v 1.1 2001/10/17 18:39:41 jdolecek Exp $	*/
3
4/*-
5 * Copyright (c) 2001 The NetBSD Foundation, Inc.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Yannick Montulet.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 *    notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 *    notice, this list of conditions and the following disclaimer in the
18 *    documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33#ifndef _DEV_PCI_EMU10K1VAR_H_
34#define _DEV_PCI_EMU10K1VAR_H_
35
36#define	EMU_PCI_CBIO		0x10
37#define	EMU_SUBSYS_APS		0x40011102
38
39/*
40 * dma memory management
41 */
42
43struct dmamem {
44	bus_dma_tag_t   dmat;
45	bus_size_t      size;
46	bus_size_t      align;
47	bus_size_t      bound;
48	bus_dma_segment_t *segs;
49	int             nsegs;
50	int             rsegs;
51	caddr_t         kaddr;
52	bus_dmamap_t    map;
53};
54
55#define	KERNADDR(ptr)		((void *)((ptr)->kaddr))
56#define	DMASEGADDR(ptr, segno)	((ptr)->segs[segno].ds_addr)
57#define	DMAADDR(ptr)		DMASEGADDR(ptr, 0)
58#define DMASIZE(ptr)		((ptr)->size)
59
60/*
61 * Emu10k1 hardware limits
62 */
63
64#define	EMU_PTESIZE		4096
65#define	EMU_MAXPTE ((EMU_CHAN_PSST_LOOPSTARTADDR_MASK + 1) /	\
66			EMU_PTESIZE)
67#define EMU_NUMCHAN		64
68#define EMU_NUMRECSRCS	3
69
70#define	EMU_DMA_ALIGN	4096
71#define	EMU_DMAMEM_NSEG	1
72
73/*
74 * Emu10k1 memory management
75 */
76
77struct emuxki_mem {
78	LIST_ENTRY(emuxki_mem) next;
79	struct dmamem  *dmamem;
80	u_int16_t       ptbidx;
81#define	EMU_RMEM		0xFFFF		/* recording memory */
82};
83
84/*
85 * Emu10k1 play channel params
86 */
87
88struct emuxki_chanparms_fxsend {
89	struct {
90		u_int8_t        level, dest;
91	} a, b, c, d, e, f, g, h;
92};
93
94struct emuxki_chanparms_pitch {
95	u_int16_t       initial;/* 4 bits of octave, 12 bits of fractional
96				 * octave */
97	u_int16_t       current;/* 0x4000 == unity pitch shift */
98	u_int16_t       target;	/* 0x4000 == unity pitch shift */
99	u_int8_t        envelope_amount;	/* Signed 2's complement, +/-
100						 * one octave peak extremes */
101};
102
103struct emuxki_chanparms_envelope {
104	u_int16_t       current_state;	/* 0x8000-n == 666*n usec delay */
105	u_int8_t        hold_time;	/* 127-n == n*(volume ? 88.2 :
106					 * 42)msec */
107	u_int8_t        attack_time;	/* 0 = infinite, 1 = (volume ? 11 :
108					 * 10.9) msec, 0x7f = 5.5msec */
109	u_int8_t        sustain_level;	/* 127 = full, 0 = off, 0.75dB
110					 * increments */
111	u_int8_t        decay_time;	/* 0 = 43.7msec, 1 = 21.8msec, 0x7f =
112					 * 22msec */
113};
114
115struct emuxki_chanparms_volume {
116	u_int16_t current, target;
117	struct emuxki_chanparms_envelope envelope;
118};
119
120struct emuxki_chanparms_filter {
121	u_int16_t       initial_cutoff_frequency;
122	/*
123	 * 6 most  significant bits are semitones, 2 least significant bits
124	 * are fractions
125	 */
126	u_int16_t       current_cutoff_frequency;
127	u_int16_t       target_cutoff_frequency;
128	u_int8_t        lowpass_resonance_height;
129	u_int8_t        interpolation_ROM;	/* 1 = full band, 7 = low
130						 * pass */
131	u_int8_t        envelope_amount;	/* Signed 2's complement, +/-
132						 * six octaves peak extremes */
133	u_int8_t        LFO_modulation_depth;	/* Signed 2's complement, +/-
134						 * three octave extremes */
135};
136
137struct emuxki_chanparms_loop {
138	u_int32_t       start;	/* index in the PTB (in samples) */
139	u_int32_t       end;	/* index in the PTB (in samples) */
140};
141
142struct emuxki_chanparms_modulation {
143	struct emuxki_chanparms_envelope envelope;
144	u_int16_t       LFO_state;	/* 0x8000-n = 666*n usec delay */
145};
146
147struct emuxki_chanparms_vibrato_LFO {
148	u_int16_t       state;		/* 0x8000-n == 666*n usec delay */
149	u_int8_t        modulation_depth;	/* Signed 2's complement, +/-
150						 * one octave extremes */
151	u_int8_t        vibrato_depth;	/* Signed 2's complement, +/- one
152					 * octave extremes */
153	u_int8_t        frequency;	/* 0.039Hz steps, maximum of 9.85 Hz */
154};
155
156struct emuxki_channel {
157	u_int8_t        num;	/* voice number */
158	struct emuxki_voice *voice;
159	struct emuxki_chanparms_fxsend fxsend;
160	struct emuxki_chanparms_pitch pitch;
161	u_int16_t       initial_attenuation;	/* 0.375dB steps */
162	struct emuxki_chanparms_volume volume;
163	struct emuxki_chanparms_filter filter;
164	struct emuxki_chanparms_loop loop;
165	struct emuxki_chanparms_modulation modulation;
166	struct emuxki_chanparms_vibrato_LFO vibrato_LFO;
167	u_int8_t        tremolo_depth;
168};
169
170/*
171 * Voices, streams
172 */
173
174typedef enum {
175	EMU_RECSRC_MIC = 0,
176	EMU_RECSRC_ADC,
177	EMU_RECSRC_FX,
178	EMU_RECSRC_NOTSET
179} emuxki_recsrc_t;
180
181struct emuxki_voice {
182	struct emuxki_softc *sc;	/* our softc */
183
184	u_int8_t        use;
185#define	EMU_VOICE_USE_PLAY		(1 << 0)
186	u_int8_t        state;
187#define EMU_VOICE_STATE_STARTED	(1 << 0)
188	u_int8_t        stereo;
189#define	EMU_VOICE_STEREO_NOTSET	0xFF
190	u_int8_t        b16;
191	u_int32_t       sample_rate;
192	union {
193		struct emuxki_channel *chan[2];
194		emuxki_recsrc_t source;
195	} dataloc;
196	struct emuxki_mem *buffer;
197	u_int16_t       blksize;/* in samples */
198	u_int16_t       trigblk;/* blk on which to trigger inth */
199	u_int16_t       blkmod;	/* Modulo value to wrap trigblk */
200	u_int16_t       timerate;
201	void            (*inth) (void *);
202	void           *inthparam;
203	                LIST_ENTRY(emuxki_voice) next;
204};
205
206#if 0 /* Not yet */
207/*
208 * I intend this to be able to manage things like AC-3
209 */
210struct emuxki_stream {
211	struct emu10k1			*emu;
212	u_int8_t			nmono;
213	u_int8_t			nstereo;
214	struct emuxki_voice		*mono;
215	struct emuxki_voice		*stereo;
216	LIST_ENTRY(emuxki_stream)	next;
217};
218#endif /* Not yet */
219
220struct emuxki_softc {
221	struct device   sc_dev;
222
223	/* Autoconfig parameters */
224	bus_space_tag_t 	sc_iot;
225	bus_space_handle_t	sc_ioh;
226	bus_addr_t		sc_iob;
227	bus_size_t		sc_ios;
228	pci_chipset_tag_t	sc_pc;		/* PCI tag */
229	bus_dma_tag_t		sc_dmat;
230	void			*sc_ih;		/* interrupt handler */
231
232	/* EMU10k1 device structures */
233	LIST_HEAD(, emuxki_mem) mem;
234
235	struct dmamem		*ptb;
236	struct dmamem		*silentpage;
237
238	struct emuxki_channel	*channel[EMU_NUMCHAN];
239	struct emuxki_voice	*recsrc[EMU_NUMRECSRCS];
240
241	LIST_HEAD(, emuxki_voice) voices;
242	/* LIST_HEAD(, emuxki_stream)	streams; */
243
244	u_int8_t		timerstate;
245#define	EMU_TIMER_STATE_ENABLED	1
246
247	struct ac97_host_if	hostif;
248	struct ac97_codec_if	*codecif;
249	struct device		*sc_audev;
250
251	struct emuxki_voice	*pvoice, *rvoice, *lvoice;
252
253	int			sc_flags;
254#define EMUXKI_SBLIVE		0x0001
255#define EMUXKI_AUDIGY		0x0002
256#define EMUXKI_AUDIGY2		0x0004
257#define EMUXKI_SBLIVE51		0x0008
258#define EMUXKI_APS		0x0010
259#define EMUXKI_CA0108		0x0020
260#define EMUXKI_CA0151		0x0040
261};
262
263#endif				/* !_DEV_PCI_EMU10K1VAR_H_ */
264