1/* $OpenBSD: exuartreg.h,v 1.4 2021/02/22 18:32:02 kettenis Exp $ */
2/*
3 * Copyright (c) 2013 Patrick Wildt <patrick@blueri.se>
4 *
5 * Permission to use, copy, modify, and distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#define	EXUART_ULCON				0x00
19#define		EXUART_ULCON_WORD_FIVE			(0x0 << 0)
20#define		EXUART_ULCON_WORD_SIX			(0x1 << 0)
21#define		EXUART_ULCON_WORD_SEVEN			(0x2 << 0)
22#define		EXUART_ULCON_WORD_EIGHT			(0x3 << 0)
23#define		EXUART_ULCON_WORD_MASK			(0x3 << 0)
24#define		EXUART_ULCON_STOP_ONE			(0x0 << 2)
25#define		EXUART_ULCON_STOP_TWO			(0x1 << 2)
26#define		EXUART_ULCON_PARITY_NONE		(0x0 << 3)
27#define		EXUART_ULCON_PARITY_ODD			(0x4 << 3)
28#define		EXUART_ULCON_PARITY_EVEN		(0x5 << 3)
29#define		EXUART_ULCON_PARITY_FORCED1		(0x6 << 3)
30#define		EXUART_ULCON_PARITY_FORCED0		(0x7 << 3)
31#define		EXUART_ULCON_PARITY_MASK		(0x7 << 3)
32#define		EXUART_ULCON_INFRARED			(0x1 << 6)
33#define	EXUART_UCON				0x04
34#define		EXUART_UCON_RX_IRQORPOLL		(0x1 << 0)
35#define		EXUART_UCON_RX_DMA			(0x2 << 0)
36#define		EXUART_UCON_TX_IRQORPOLL		(0x1 << 2)
37#define		EXUART_UCON_TX_DMA			(0x2 << 2)
38#define		EXUART_UCON_SEND_BREAK			(0x1 << 4)
39#define		EXUART_UCON_LOOPBACK_MODE		(0x1 << 5)
40#define		EXUART_UCON_RX_ERR_STS_INT		(0x1 << 6)
41#define		EXUART_UCON_RX_TIMEOUT			(0x1 << 7)
42#define		EXUART_UCON_RX_INT_TYPE_PULSE		(0x0 << 8)
43#define		EXUART_UCON_RX_INT_TYPE_LEVEL		(0x1 << 8)
44#define		EXUART_UCON_TX_INT_TYPE_PULSE		(0x0 << 9)
45#define		EXUART_UCON_TX_INT_TYPE_LEVEL		(0x1 << 9)
46#define		EXUART_UCON_RX_TIMEOUT_DMA_SUSPEND	(0x1 << 10)
47#define		EXUART_UCON_RX_TIMEOUT_EMPTY_FIFO	(0x1 << 11)
48#define		EXUART_UCON_RX_TIMEOUT_INTERVAL(x)	(((x) & 0xf) << 12) /* 8 * (x + a) frame time */
49#define		EXUART_UCON_RX_DMA_BURST_1B		(0x0 << 16)
50#define		EXUART_UCON_RX_DMA_BURST_4B		(0x1 << 16)
51#define		EXUART_UCON_RX_DMA_BURST_8B		(0x2 << 16)
52#define		EXUART_UCON_RX_DMA_BURST_16B		(0x3 << 16)
53#define		EXUART_UCON_TX_DMA_BURST_1B		(0x0 << 20)
54#define		EXUART_UCON_TX_DMA_BURST_4B		(0x1 << 20)
55#define		EXUART_UCON_TX_DMA_BURST_8B		(0x2 << 20)
56#define		EXUART_UCON_TX_DMA_BURST_16B		(0x3 << 20)
57#define		EXUART_S5L_UCON_RX_TIMEOUT		(0x1 << 9)
58#define		EXUART_S5L_UCON_RXTHRESH		(0x1 << 12)
59#define		EXUART_S5L_UCON_TXTHRESH		(0x1 << 13)
60#define	EXUART_UFCON				0x08
61#define		EXUART_UFCON_FIFO_ENABLE		(0x1 << 0)
62#define		EXUART_UFCON_RX_FIFO_RESET		(0x1 << 1)
63#define		EXUART_UFCON_TX_FIFO_RESET		(0x1 << 2)
64#define		EXUART_UFCON_RX_FIFO_TRIGGER_LEVEL(x)	(((x) & 0x7) << 4)
65#define		EXUART_UFCON_TX_FIFO_TRIGGER_LEVEL(x)	(((x) & 0x7) << 8)
66#define	EXUART_UMCON				0x0c
67#define		EXUART_UMCON_RTS			(0x1 << 0)
68#define		EXUART_UMCON_MODEM_INT_EN		(0x1 << 3)
69#define		EXUART_UMCON_AUTO_FLOW_CONTROL		(0x1 << 4)
70#define		EXUART_UMCON_RTS_TRIGGER_LEVEL		(((x) & 0x7) << 5)
71#define	EXUART_UTRSTAT				0x10
72#define		EXUART_UTRSTAT_RXBREADY			(0x1 << 0)
73#define		EXUART_UTRSTAT_TXBEMPTY			(0x1 << 1)
74#define		EXUART_UTRSTAT_TXEMPTY			(0x1 << 2)
75#define		EXUART_UTRSTAT_RX_TIMEOUT_STSCLR	(0x1 << 3)
76#define		EXUART_UTRSTAT_RX_DMA_FSM_STS(x)	(((x) >> 8) & 0xf)
77#define		EXUART_UTRSTAT_TX_DMA_FSM_STS(x)	(((x) >> 12) & 0xf)
78#define		EXUART_UTRSTAT_RX_FIFO_CNT_TIMEOUT(x)	(((x) >> 16) & 0xff)
79#define		EXUART_S5L_UTRSTAT_RXTHRESH		(0x1 << 4)
80#define		EXUART_S5L_UTRSTAT_TXTHRESH		(0x1 << 5)
81#define		EXUART_S5L_UTRSTAT_RX_TIMEOUT		(0x1 << 9)
82#define	EXUART_UERSTAT				0x14
83#define		EXUART_UERSTAT_OVERRUN			(0x1 << 0)
84#define		EXUART_UERSTAT_PARITY			(0x1 << 1)
85#define		EXUART_UERSTAT_FRAME			(0x1 << 2)
86#define		EXUART_UERSTAT_BREAK			(0x1 << 3)
87#define	EXUART_UFSTAT				0x18
88#define		EXUART_UFSTAT_RX_FIFO_CNT(x)		(((x) >> 0) & 0xff) /* 0 when full */
89#define		EXUART_UFSTAT_RX_FIFO_CNT_MASK		(0xff << 0) /* 0 when full */
90#define		EXUART_UFSTAT_RX_FIFO_FULL		(0x1 << 8)
91#define		EXUART_UFSTAT_RX_FIFO_ERROR		(0x1 << 9)
92#define		EXUART_UFSTAT_TX_FIFO_CNT(x)		(((x) >> 16) & 0xff) /* 0 when full */
93#define		EXUART_UFSTAT_TX_FIFO_CNT_MASK		(0xff << 16) /* 0 when full */
94#define		EXUART_UFSTAT_TX_FIFO_FULL		(0x1 << 24)
95#define		EXUART_S5L_UFSTAT_RX_FIFO_CNT(x)	(((x) >> 0) & 0xf) /* 0 when full */
96#define		EXUART_S5L_UFSTAT_RX_FIFO_CNT_MASK	(0xf << 0) /* 0 when full */
97#define		EXUART_S5L_UFSTAT_RX_FIFO_FULL		(0x1 << 8)
98#define		EXUART_S5L_UFSTAT_TX_FIFO_CNT(x)	(((x) >> 4) & 0xf) /* 0 when full */
99#define		EXUART_S5L_UFSTAT_TX_FIFO_CNT_MASK	(0xf << 4) /* 0 when full */
100#define		EXUART_S5L_UFSTAT_TX_FIFO_FULL		(0x1 << 9)
101#define	EXUART_UMSTAT				0x1c
102#define		EXUART_UMSTAT_CTS			(0x1 << 0)
103#define		EXUART_UMSTAT_DELTA_CTS			(0x1 << 4)
104#define	EXUART_UTXH				0x20
105#define	EXUART_URXH				0x24
106#define	EXUART_UBRDIV				0x28
107#define		EXUART_UBRDIV_SEL(x)			(((x) & 0xffff) << 0)
108#define	EXUART_UFRACVAL				0x2c
109#define		EXUART_UFRACVAL_SEL(x)			(((x) & 0xf) << 0)
110#define	EXUART_UINTP				0x30
111#define		EXUART_UINTP_RXD			(0x1 << 0)
112#define		EXUART_UINTP_ERROR			(0x1 << 1)
113#define		EXUART_UINTP_TXD			(0x1 << 2)
114#define		EXUART_UINTP_MODEM			(0x1 << 3)
115#define	EXUART_UINTS				0x34
116#define		EXUART_UINTS_RXD			(0x1 << 0)
117#define		EXUART_UINTS_ERROR			(0x1 << 1)
118#define		EXUART_UINTS_TXD			(0x1 << 2)
119#define		EXUART_UINTS_MODEM			(0x1 << 3)
120#define	EXUART_UINTM				0x38
121#define		EXUART_UINTM_RXD			(0x1 << 0)
122#define		EXUART_UINTM_ERROR			(0x1 << 1)
123#define		EXUART_UINTM_TXD			(0x1 << 2)
124#define		EXUART_UINTM_MODEM			(0x1 << 3)
125