1/*	$OpenBSD: stfpciephy.c,v 1.1 2023/07/08 10:06:14 kettenis Exp $	*/
2/*
3 * Copyright (c) 2023 Mark Kettenis <kettenis@openbsd.org>
4 *
5 * Permission to use, copy, modify, and distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#include <sys/param.h>
19#include <sys/systm.h>
20#include <sys/device.h>
21
22#include <machine/intr.h>
23#include <machine/bus.h>
24#include <machine/fdt.h>
25
26#include <dev/ofw/openfirm.h>
27#include <dev/ofw/ofw_clock.h>
28#include <dev/ofw/ofw_misc.h>
29#include <dev/ofw/fdt.h>
30
31#define PCIE_KVO_LEVEL		0x28
32#define  PCIE_KVO_FINE_TUNE_LEVEL	0x91
33#define PCIE_KVO_TUNE_SIGNAL	0x80
34#define  PCIE_KVO_FINE_TUNE_SIGNAL	0x0c
35
36#define HREAD4(sc, reg)							\
37	(bus_space_read_4((sc)->sc_iot, (sc)->sc_ioh, (reg)))
38#define HWRITE4(sc, reg, val)						\
39	bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (reg), (val))
40#define HSET4(sc, reg, bits)						\
41	HWRITE4((sc), (reg), HREAD4((sc), (reg)) | (bits))
42#define HCLR4(sc, reg, bits)						\
43	HWRITE4((sc), (reg), HREAD4((sc), (reg)) & ~(bits))
44
45struct stfpciephy_softc {
46	struct device		sc_dev;
47	bus_space_tag_t		sc_iot;
48	bus_space_handle_t	sc_ioh;
49
50	struct phy_device	sc_pd;
51};
52
53int	stfpciephy_match(struct device *, void *, void *);
54void	stfpciephy_attach(struct device *, struct device *, void *);
55
56const struct cfattach stfpciephy_ca = {
57	sizeof (struct stfpciephy_softc), stfpciephy_match, stfpciephy_attach
58};
59
60struct cfdriver stfpciephy_cd = {
61	NULL, "stfpciephy", DV_DULL
62};
63
64int	stfpciephy_enable(void *, uint32_t *);
65
66int
67stfpciephy_match(struct device *parent, void *match, void *aux)
68{
69	struct fdt_attach_args *faa = aux;
70
71	return OF_is_compatible(faa->fa_node, "starfive,jh7110-pcie-phy");
72}
73
74void
75stfpciephy_attach(struct device *parent, struct device *self, void *aux)
76{
77	struct stfpciephy_softc *sc = (struct stfpciephy_softc *)self;
78	struct fdt_attach_args *faa = aux;
79
80	if (faa->fa_nreg < 1) {
81		printf(": no registers\n");
82		return;
83	}
84
85	sc->sc_iot = faa->fa_iot;
86	if (bus_space_map(sc->sc_iot, faa->fa_reg[0].addr,
87	    faa->fa_reg[0].size, 0, &sc->sc_ioh)) {
88		printf(": can't map registers\n");
89		return;
90	}
91
92	printf("\n");
93
94	HWRITE4(sc, PCIE_KVO_LEVEL, PCIE_KVO_FINE_TUNE_LEVEL);
95	HWRITE4(sc, PCIE_KVO_TUNE_SIGNAL, PCIE_KVO_FINE_TUNE_SIGNAL);
96
97	sc->sc_pd.pd_node = faa->fa_node;
98	sc->sc_pd.pd_cookie = sc;
99	sc->sc_pd.pd_enable = stfpciephy_enable;
100	phy_register(&sc->sc_pd);
101}
102
103int
104stfpciephy_enable(void *cookie, uint32_t *cells)
105{
106	return 0;
107}
108