1/* $OpenBSD: gscpcib.c,v 1.8 2023/01/30 10:49:05 jsg Exp $ */ 2/* 3 * Copyright (c) 2004 Alexander Yurchenko <grange@openbsd.org> 4 * 5 * Permission to use, copy, modify, and distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18/* 19 * Special driver for the National Semiconductor Geode SC1100 PCI-ISA bridge 20 * that attaches instead of pcib(4). In addition to the core pcib(4) 21 * functionality this driver provides support for the GPIO interface. 22 */ 23 24#include <sys/param.h> 25#include <sys/systm.h> 26#include <sys/device.h> 27#include <sys/gpio.h> 28 29#include <machine/bus.h> 30 31#include <dev/pci/pcireg.h> 32#include <dev/pci/pcivar.h> 33#include <dev/pci/pcidevs.h> 34 35#include <dev/gpio/gpiovar.h> 36 37#include <i386/pci/gscpcibreg.h> 38 39struct gscpcib_softc { 40 struct device sc_dev; 41 42 /* GPIO interface */ 43 bus_space_tag_t sc_gpio_iot; 44 bus_space_handle_t sc_gpio_ioh; 45 struct gpio_chipset_tag sc_gpio_gc; 46 gpio_pin_t sc_gpio_pins[GSCGPIO_NPINS]; 47}; 48 49int gscpcib_match(struct device *, void *, void *); 50void gscpcib_attach(struct device *, struct device *, void *); 51 52int gscpcib_gpio_pin_read(void *, int); 53void gscpcib_gpio_pin_write(void *, int, int); 54void gscpcib_gpio_pin_ctl(void *, int, int); 55 56/* arch/i386/pci/pcib.c */ 57void pcibattach(struct device *, struct device *, void *); 58 59const struct cfattach gscpcib_ca = { 60 sizeof (struct gscpcib_softc), 61 gscpcib_match, 62 gscpcib_attach 63}; 64 65struct cfdriver gscpcib_cd = { 66 NULL, "gscpcib", DV_DULL 67}; 68 69int 70gscpcib_match(struct device *parent, void *match, void *aux) 71{ 72 struct pci_attach_args *pa = aux; 73 74 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_BRIDGE || 75 PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_BRIDGE_ISA) 76 return (0); 77 78 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_NS && 79 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NS_SC1100_ISA) 80 return (2); /* supersede pcib(4) */ 81 82 return (0); 83} 84 85void 86gscpcib_attach(struct device *parent, struct device *self, void *aux) 87{ 88#ifndef SMALL_KERNEL 89 struct gscpcib_softc *sc = (struct gscpcib_softc *)self; 90 struct pci_attach_args *pa = aux; 91 struct gpiobus_attach_args gba; 92 pcireg_t gpiobase; 93 int i; 94 int gpio_present = 0; 95 96 /* Map GPIO I/O space */ 97 gpiobase = pci_conf_read(pa->pa_pc, pa->pa_tag, GSCGPIO_BASE); 98 sc->sc_gpio_iot = pa->pa_iot; 99 if (PCI_MAPREG_IO_ADDR(gpiobase) == 0 || 100 bus_space_map(sc->sc_gpio_iot, PCI_MAPREG_IO_ADDR(gpiobase), 101 GSCGPIO_SIZE, 0, &sc->sc_gpio_ioh)) { 102 printf(": can't map GPIO i/o space"); 103 goto corepcib; 104 } 105 106 /* Initialize pins array */ 107 for (i = 0; i < GSCGPIO_NPINS; i++) { 108 sc->sc_gpio_pins[i].pin_num = i; 109 sc->sc_gpio_pins[i].pin_caps = GPIO_PIN_INPUT | 110 GPIO_PIN_OUTPUT | GPIO_PIN_OPENDRAIN | 111 GPIO_PIN_PUSHPULL | GPIO_PIN_TRISTATE | 112 GPIO_PIN_PULLUP; 113 114 /* Read initial state */ 115 sc->sc_gpio_pins[i].pin_state = gscpcib_gpio_pin_read(sc, i) ? 116 GPIO_PIN_HIGH : GPIO_PIN_LOW; 117 } 118 119 /* Create controller tag */ 120 sc->sc_gpio_gc.gp_cookie = sc; 121 sc->sc_gpio_gc.gp_pin_read = gscpcib_gpio_pin_read; 122 sc->sc_gpio_gc.gp_pin_write = gscpcib_gpio_pin_write; 123 sc->sc_gpio_gc.gp_pin_ctl = gscpcib_gpio_pin_ctl; 124 125 gba.gba_name = "gpio"; 126 gba.gba_gc = &sc->sc_gpio_gc; 127 gba.gba_pins = sc->sc_gpio_pins; 128 gba.gba_npins = GSCGPIO_NPINS; 129 130 gpio_present = 1; 131 132corepcib: 133#endif /* !SMALL_KERNEL */ 134 /* Provide core pcib(4) functionality */ 135 pcibattach(parent, self, aux); 136 137#ifndef SMALL_KERNEL 138 /* Attach GPIO framework */ 139 if (gpio_present) 140 config_found(&sc->sc_dev, &gba, gpiobus_print); 141#endif /* !SMALL_KERNEL */ 142} 143 144#ifndef SMALL_KERNEL 145static __inline void 146gscpcib_gpio_pin_select(struct gscpcib_softc *sc, int pin) 147{ 148 bus_space_write_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, GSCGPIO_SEL, pin); 149} 150 151int 152gscpcib_gpio_pin_read(void *arg, int pin) 153{ 154 struct gscpcib_softc *sc = arg; 155 int reg, shift; 156 u_int32_t data; 157 158 reg = (pin < 32 ? GSCGPIO_GPDI0 : GSCGPIO_GPDI1); 159 shift = pin % 32; 160 data = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, reg); 161 162 return ((data >> shift) & 0x1); 163} 164 165void 166gscpcib_gpio_pin_write(void *arg, int pin, int value) 167{ 168 struct gscpcib_softc *sc = arg; 169 int reg, shift; 170 u_int32_t data; 171 172 reg = (pin < 32 ? GSCGPIO_GPDO0 : GSCGPIO_GPDO1); 173 shift = pin % 32; 174 data = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, reg); 175 if (value == 0) 176 data &= ~(1 << shift); 177 else if (value == 1) 178 data |= (1 << shift); 179 180 bus_space_write_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, reg, data); 181} 182 183void 184gscpcib_gpio_pin_ctl(void *arg, int pin, int flags) 185{ 186 struct gscpcib_softc *sc = arg; 187 u_int32_t conf; 188 189 gscpcib_gpio_pin_select(sc, pin); 190 conf = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, 191 GSCGPIO_CONF); 192 193 conf &= ~(GSCGPIO_CONF_OUTPUTEN | GSCGPIO_CONF_PUSHPULL | 194 GSCGPIO_CONF_PULLUP); 195 if ((flags & GPIO_PIN_TRISTATE) == 0) 196 conf |= GSCGPIO_CONF_OUTPUTEN; 197 if (flags & GPIO_PIN_PUSHPULL) 198 conf |= GSCGPIO_CONF_PUSHPULL; 199 if (flags & GPIO_PIN_PULLUP) 200 conf |= GSCGPIO_CONF_PULLUP; 201 bus_space_write_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, 202 GSCGPIO_CONF, conf); 203} 204#endif /* !SMALL_KERNEL */ 205