1/* $OpenBSD: psl.h,v 1.11 2021/03/11 11:16:57 jsg Exp $ */ 2 3/* 4 * Copyright (c) 1999-2004 Michael Shalayeff 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 22 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 25 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 26 * THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29#ifndef _MACHINE_PSL_H_ 30#define _MACHINE_PSL_H_ 31 32/* 33 * Reference: 34 * 1. PA-RISC 1.1 Architecture and Instruction Set Manual 35 * Hewlett Packard, 3rd Edition, February 1994; Part Number 09740-90039 36 */ 37 38/* 39 * Processor Status Word Bit Positions (in PA-RISC bit order) 40 */ 41#define PSL_Y_POS (0) 42#define PSL_Z_POS (1) 43#define PSL_SS_POS (3) /* Reserved, Software-defined */ 44#define PSL_W_POS (4) 45#define PSL_E_POS (5) 46#define PSL_S_POS (6) 47#define PSL_T_POS (7) 48#define PSL_H_POS (8) 49#define PSL_L_POS (9) 50#define PSL_N_POS (10) 51#define PSL_X_POS (11) 52#define PSL_B_POS (12) 53#define PSL_C_POS (13) 54#define PSL_V_POS (14) 55#define PSL_M_POS (15) 56#define PSL_CB_POS (16) 57#define PSL_O_POS (24) 58#define PSL_G_POS (25) 59#define PSL_F_POS (26) 60#define PSL_R_POS (27) 61#define PSL_Q_POS (28) 62#define PSL_P_POS (29) 63#define PSL_D_POS (30) 64#define PSL_I_POS (31) 65 66#define PSL_BITS "\020\001I\002D\003P\004Q\005R\006F\007G\010O" \ 67 "\021M\022V\023C\024B\025X\026N\027L\030H" \ 68 "\031T\032S\033E\034W\037Z\040Y" 69 70/* 71 * Processor Status Word Bit Values 72 */ 73#define PSL_Y (1 << (31-PSL_Y_POS)) /* Data Debug Trap Disable */ 74#define PSL_Z (1 << (31-PSL_Z_POS)) /* Instruction Debug Trap Disable */ 75#define PSL_SS (1 << (31-PSL_SS_POS)) /* Reserved; Software Single-Step */ 76#define PSL_W (1 << (31-PSL_W_POS)) /* 64bit address decode enable */ 77#define PSL_E (1 << (31-PSL_E_POS)) /* Little Endian Memory Access Enable */ 78#define PSL_S (1 << (31-PSL_S_POS)) /* Secure Interval Timer */ 79#define PSL_T (1 << (31-PSL_T_POS)) /* Taken Branch Trap Enable */ 80#define PSL_H (1 << (31-PSL_H_POS)) /* Higher-privilege Transfer Trap Enable */ 81#define PSL_L (1 << (31-PSL_L_POS)) /* Lower-privilege Transfer Trap Enable */ 82#define PSL_N (1 << (31-PSL_N_POS)) /* Nullify */ 83#define PSL_X (1 << (31-PSL_X_POS)) /* Data Memory Break Disable */ 84#define PSL_B (1 << (31-PSL_B_POS)) /* Taken Branch */ 85#define PSL_C (1 << (31-PSL_C_POS)) /* Instruction Address Translation Enable */ 86#define PSL_V (1 << (31-PSL_V_POS)) /* Divide Step Correction */ 87#define PSL_M (1 << (31-PSL_M_POS)) /* High-priority Machine Check Mask */ 88#define PSL_CB (1 << (31-PSL_CB_POS)) /* Carry/Borrow Bits */ 89#define PSL_O (1 << (31-PSL_O_POS)) /* Force strong ordering (2.0) */ 90#define PSL_G (1 << (31-PSL_G_POS)) /* Debug Trap Enable */ 91#define PSL_F (1 << (31-PSL_F_POS)) /* Performance Monitor Interrupt Unmask */ 92#define PSL_R (1 << (31-PSL_R_POS)) /* Recover Counter Enable */ 93#define PSL_Q (1 << (31-PSL_Q_POS)) /* Interrupt State Collection Enable */ 94#define PSL_P (1 << (31-PSL_P_POS)) /* Protection Identifier Validation Enable */ 95#define PSL_D (1 << (31-PSL_D_POS)) /* Data Address Translation Enable */ 96#define PSL_I (1 << (31-PSL_I_POS)) /* External Interrupt, Power Failure 97 Interrupt, and Low-Priority Machine 98 Check Interrupt unmask */ 99 100/* 101 * Frequently Used PSW Values 102 */ 103#define RESET_PSL (PSL_R | PSL_Q | PSL_P | PSL_D | PSL_I) 104 105#endif /* _MACHINE_PSL_H_ */ 106