1/*	$OpenBSD: siop_gsc.c,v 1.6 2024/05/22 14:25:47 jsg Exp $	*/
2
3/*
4 * Copyright (c) 2007 Mark Kettenis
5 *
6 * Permission to use, copy, modify, and distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
9 *
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 */
18
19#include <sys/param.h>
20#include <sys/device.h>
21#include <sys/systm.h>
22
23#include <machine/autoconf.h>
24#include <machine/bus.h>
25#include <machine/iomod.h>
26
27#include <scsi/scsi_all.h>
28#include <scsi/scsiconf.h>
29
30#include <dev/ic/siopreg.h>
31#include <dev/ic/siopvar_common.h>
32#include <dev/ic/siopvar.h>
33
34#include <hppa/dev/cpudevs.h>
35#include <hppa/gsc/gscbusvar.h>
36
37#define	SIOP_GSC_RESET	0x0000
38#define	SIOP_GSC_OFFSET	0x0100
39
40int siop_gsc_match(struct device *, void *, void *);
41void siop_gsc_attach(struct device *, struct device *, void *);
42void siop_gsc_reset(struct siop_common_softc *);
43
44u_int8_t siop_gsc_r1(void *, bus_space_handle_t, bus_size_t);
45u_int16_t siop_gsc_r2(void *, bus_space_handle_t, bus_size_t);
46void siop_gsc_w1(void *, bus_space_handle_t, bus_size_t, u_int8_t);
47void siop_gsc_w2(void *, bus_space_handle_t, bus_size_t, u_int16_t);
48
49struct siop_gsc_softc {
50	struct siop_softc sc_siop;
51	bus_space_tag_t sc_iot;
52	bus_space_handle_t sc_ioh;
53	struct hppa_bus_space_tag sc_bustag;
54};
55
56const struct cfattach siop_gsc_ca = {
57	sizeof(struct siop_gsc_softc), siop_gsc_match, siop_gsc_attach
58};
59
60int
61siop_gsc_match(struct device *parent, void *match, void *aux)
62{
63	struct gsc_attach_args *ga = aux;
64
65	if (ga->ga_type.iodc_type != HPPA_TYPE_FIO ||
66	    ga->ga_type.iodc_sv_model != HPPA_FIO_FWSCSI)
67		return 0;
68
69	return 1;
70}
71
72void
73siop_gsc_attach(struct device *parent, struct device *self, void *aux)
74{
75	struct siop_gsc_softc *sc = (struct siop_gsc_softc *)self;
76	struct gsc_attach_args *ga = aux;
77
78	sc->sc_iot = ga->ga_iot;
79	if (bus_space_map(sc->sc_iot, ga->ga_hpa,
80	    IOMOD_HPASIZE, 0, &sc->sc_ioh)) {
81		printf(": cannot map io space\n");
82		return;
83	}
84
85	sc->sc_bustag = *sc->sc_iot;
86	sc->sc_bustag.hbt_r1 = siop_gsc_r1;
87	sc->sc_bustag.hbt_r2 = siop_gsc_r2;
88	sc->sc_bustag.hbt_w1 = siop_gsc_w1;
89	sc->sc_bustag.hbt_w2 = siop_gsc_w2;
90
91	sc->sc_siop.sc_c.features = SF_CHIP_PF | SF_CHIP_BE | SF_BUS_WIDE;
92	sc->sc_siop.sc_c.maxburst = 4;
93	sc->sc_siop.sc_c.maxoff = 8;
94	sc->sc_siop.sc_c.clock_div = 3;
95	sc->sc_siop.sc_c.clock_period = 250;
96	sc->sc_siop.sc_c.ram_size = 0;
97
98	sc->sc_siop.sc_c.sc_reset = siop_gsc_reset;
99	sc->sc_siop.sc_c.sc_dmat = ga->ga_dmatag;
100
101	sc->sc_siop.sc_c.sc_rt = &sc->sc_bustag;
102	bus_space_subregion(sc->sc_iot, sc->sc_ioh, SIOP_GSC_OFFSET,
103	    IOMOD_HPASIZE - SIOP_GSC_OFFSET, &sc->sc_siop.sc_c.sc_rh);
104
105	/*
106	 * Reset the SCSI subsystem.
107	 */
108	bus_space_write_1(sc->sc_iot, sc->sc_ioh, SIOP_GSC_RESET, 0);
109	DELAY(1000);
110	siop_gsc_reset(&sc->sc_siop.sc_c);
111
112	gsc_intr_establish((struct gsc_softc *)parent, ga->ga_irq,
113	    IPL_BIO, siop_intr, sc, sc->sc_siop.sc_c.sc_dev.dv_xname);
114
115	printf(": NCR53C720 rev %d\n", bus_space_read_1(sc->sc_siop.sc_c.sc_rt,
116	    sc->sc_siop.sc_c.sc_rh, SIOP_CTEST3) >> 4);
117
118	siop_attach(&sc->sc_siop);
119}
120
121void
122siop_gsc_reset(struct siop_common_softc *sc)
123{
124	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_DCNTL, DCNTL_EA);
125	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST0, CTEST0_EHP);
126	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST4, CTEST4_MUX);
127
128	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STIME0,
129	    (0xc << STIME0_SEL_SHIFT));
130}
131
132u_int8_t
133siop_gsc_r1(void *v, bus_space_handle_t h, bus_size_t o)
134{
135	return *(volatile u_int8_t *)(h + (o ^ 3));
136}
137
138u_int16_t
139siop_gsc_r2(void *v, bus_space_handle_t h, bus_size_t o)
140{
141	if (o == SIOP_SIST0) {
142		u_int16_t reg;
143
144		reg = siop_gsc_r1(v, h, SIOP_SIST0);
145		reg |= siop_gsc_r1(v, h, SIOP_SIST1) << 8;
146		return reg;
147	}
148	return *(volatile u_int16_t *)(h + (o ^ 2));
149}
150
151void
152siop_gsc_w1(void *v, bus_space_handle_t h, bus_size_t o, u_int8_t vv)
153{
154	*(volatile u_int8_t *)(h + (o ^ 3)) = vv;
155}
156
157void
158siop_gsc_w2(void *v, bus_space_handle_t h, bus_size_t o, u_int16_t vv)
159{
160	*(volatile u_int16_t *)(h + (o ^ 2)) = vv;
161}
162