osiop_gsc.c revision 1.8
1/* $OpenBSD: osiop_gsc.c,v 1.8 2003/10/31 18:32:43 mickey Exp $ */ 2/* $NetBSD: osiop_gsc.c,v 1.6 2002/10/02 05:17:50 thorpej Exp $ */ 3 4/* 5 * Copyright (c) 2001 Matt Fredette. All rights reserved. 6 * Copyright (c) 2001 Izumi Tsutsui. All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. The name of the author may not be used to endorse or promote products 17 * derived from this software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE AUTHORS ``AS IS'' AND ANY EXPRESS OR 20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 21 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 22 * IN NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT, 23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 24 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 28 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 */ 30/* 31 * Copyright (c) 1998 Michael Shalayeff 32 * All rights reserved. 33 * 34 * Redistribution and use in source and binary forms, with or without 35 * modification, are permitted provided that the following conditions 36 * are met: 37 * 1. Redistributions of source code must retain the above copyright 38 * notice, this list of conditions and the following disclaimer. 39 * 2. Redistributions in binary form must reproduce the above copyright 40 * notice, this list of conditions and the following disclaimer in the 41 * documentation and/or other materials provided with the distribution. 42 * 3. All advertising materials mentioning features or use of this software 43 * must display the following acknowledgement: 44 * This product includes software developed by Michael Shalayeff. 45 * 4. The name of the author may not be used to endorse or promote products 46 * derived from this software without specific prior written permission. 47 * 48 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 49 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 50 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 51 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 52 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 53 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 54 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 55 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 56 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 57 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 58 */ 59 60#include <sys/param.h> 61#include <sys/systm.h> 62#include <sys/device.h> 63#include <sys/buf.h> 64#include <sys/malloc.h> 65 66#include <scsi/scsi_all.h> 67#include <scsi/scsiconf.h> 68 69#include <machine/cpu.h> 70#include <machine/intr.h> 71#include <machine/iomod.h> 72#include <machine/autoconf.h> 73#include <machine/bus.h> 74 75#include <dev/ic/osiopreg.h> 76#include <dev/ic/osiopvar.h> 77 78#include <hppa/dev/cpudevs.h> 79#include <hppa/gsc/gscbusvar.h> 80/* #include <hppa/hppa/machdep.h> */ 81 82#define OSIOP_GSC_RESET 0x0000 83#define OSIOP_GSC_OFFSET 0x0100 84 85int osiop_gsc_match(struct device *, void *, void *); 86void osiop_gsc_attach(struct device *, struct device *, void *); 87int osiop_gsc_intr(void *); 88 89struct cfattach osiop_gsc_ca = { 90 sizeof(struct osiop_softc), osiop_gsc_match, osiop_gsc_attach 91}; 92 93int 94osiop_gsc_match(parent, match, aux) 95 struct device *parent; 96 void *match, *aux; 97{ 98 struct gsc_attach_args *ga = aux; 99 100 if (ga->ga_type.iodc_type != HPPA_TYPE_FIO || 101 (ga->ga_type.iodc_sv_model != HPPA_FIO_GSCSI && 102 ga->ga_type.iodc_sv_model != HPPA_FIO_SCSI)) 103 return 0; 104 105 return 1; 106} 107 108void 109osiop_gsc_attach(parent, self, aux) 110 struct device *parent, *self; 111 void *aux; 112{ 113 struct osiop_softc *sc = (void *)self; 114 struct gsc_attach_args *ga = aux; 115 bus_space_handle_t ioh; 116 117 sc->sc_bst = ga->ga_iot; 118 sc->sc_dmat = ga->ga_dmatag; 119 if (bus_space_map(sc->sc_bst, ga->ga_hpa, 120 OSIOP_GSC_OFFSET + OSIOP_NREGS, 0, &ioh)) 121 panic("osiop_gsc_attach: couldn't map I/O ports"); 122 if (bus_space_subregion(sc->sc_bst, ioh, 123 OSIOP_GSC_OFFSET, OSIOP_NREGS, &sc->sc_reg)) 124 panic("osiop_gsc_attach: couldn't get chip ports"); 125 126 sc->sc_clock_freq = ga->ga_ca.ca_pdc_iodc_read->filler2[14] / 1000000; 127 if (!sc->sc_clock_freq) 128 sc->sc_clock_freq = 50; 129 130 if (ga->ga_ca.ca_type.iodc_sv_model == HPPA_FIO_GSCSI) { 131 sc->sc_dcntl = OSIOP_DCNTL_EA; 132 /* XXX set burst mode to 8 words (32 bytes) */ 133 sc->sc_ctest7 = OSIOP_CTEST7_CDIS; 134 sc->sc_dmode = OSIOP_DMODE_BL8; /* | OSIOP_DMODE_FC2 */ 135 } else { 136 sc->sc_dcntl = 0; 137 sc->sc_ctest7 = 0; 138 sc->sc_dmode = 0; /* | OSIOP_DMODE_FC2 */ 139 } 140 141 sc->sc_flags = 0; 142 sc->sc_id = 7; /* XXX */ 143 144 /* 145 * Reset the SCSI subsystem. 146 */ 147 bus_space_write_1(sc->sc_bst, ioh, OSIOP_GSC_RESET, 0); 148 DELAY(1000); 149 150 /* 151 * Call common attachment 152 */ 153#ifdef OSIOP_DEBUG 154 { 155 extern int osiop_debug; 156 osiop_debug = -1; 157 } 158#endif /* OSIOP_DEBUG */ 159 osiop_attach(sc); 160 161 (void)gsc_intr_establish((struct gsc_softc *)parent, IPL_BIO, 162 ga->ga_irq, osiop_gsc_intr, sc, sc->sc_dev.dv_xname); 163} 164 165/* 166 * interrupt handler 167 */ 168int 169osiop_gsc_intr(arg) 170 void *arg; 171{ 172 struct osiop_softc *sc = arg; 173 u_int8_t istat; 174 175 /* This is potentially nasty, since the IRQ is level triggered... */ 176 if (sc->sc_flags & OSIOP_INTSOFF) 177 return (0); 178 179 istat = osiop_read_1(sc, OSIOP_ISTAT); 180 181 if ((istat & (OSIOP_ISTAT_SIP | OSIOP_ISTAT_DIP)) == 0) 182 return (0); 183 184 /* Save interrupt details for the back-end interrupt handler */ 185 sc->sc_sstat0 = osiop_read_1(sc, OSIOP_SSTAT0); 186 sc->sc_istat = istat; 187 /* 188 * Per page 4-18 of the LSI 53C710 Technical Manual, 189 * "insert a delay equivalent to 12 BCLK periods between 190 * the reads [of DSTAT and SSTAT0] to ensure that the 191 * interrupts clear properly." 1 BCLK = 40ns. Pg. 6-10. 192 */ 193 DELAY(25); 194 sc->sc_dstat = osiop_read_1(sc, OSIOP_DSTAT); 195 196 /* Deal with the interrupt */ 197 osiop_intr(sc); 198 199#ifdef USELEDS 200 ledctl(PALED_DISK, 0, 0); 201#endif 202 203 return (1); 204} 205