bus_space_asm_armv7.S revision 1.3 
1/*	$OpenBSD: bus_space_asm_armv7.S,v 1.3 2015/06/02 02:30:16 jsg Exp $	*/
2/*	$NetBSD: bus_space_asm_armv7.S,v 1.3 2003/03/27 19:46:14 mycroft Exp $	*/
3
4/*
5 * Copyright (c) 1997 Causality Limited.
6 * Copyright (c) 1997 Mark Brinicombe.
7 * All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 *    must display the following acknowledgement:
19 *	This product includes software developed by Mark Brinicombe
20 *	for the NetBSD Project.
21 * 4. The name of the company nor the name of the author may be used to
22 *    endorse or promote products derived from this software without specific
23 *    prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
26 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
27 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 */
37
38#include <arm/asm.h>
39#include <arm/cpuconf.h>
40
41/*
42 * Generic bus_space functions.
43 */
44
45/*
46 * read single
47 */
48
49ENTRY(armv7_bs_r_1)
50	dsb	sy
51	ldrb	r0, [r1, r2]
52	mov	pc, lr
53
54#if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0
55ENTRY(armv7_bs_r_2)
56	dsb	sy
57	ldrh	r0, [r1, r2]
58	mov	pc, lr
59#endif
60
61ENTRY(armv7_bs_r_4)
62	dsb	sy
63	ldr	r0, [r1, r2]
64	mov	pc, lr
65
66/*
67 * write single
68 */
69
70ENTRY(armv7_bs_w_1)
71	strb	r3, [r1, r2]
72	dsb	sy
73	mov	pc, lr
74
75ENTRY(armv7_bs_w_2)
76	strh	r3, [r1, r2]
77	dsb	sy
78	mov	pc, lr
79
80ENTRY(armv7_bs_w_4)
81	str	r3, [r1, r2]
82	dsb	sy
83	mov	pc, lr
84
85/*
86 * read multiple
87 */
88
89ENTRY(armv7_bs_rm_1)
90	add	r0, r1, r2
91	mov	r1, r3
92	ldr	r2, [sp, #0]
93	teq	r2, #0
94	moveq	pc, lr
95
961:	ldrb	r3, [r0]
97	strb	r3, [r1], #1
98	subs	r2, r2, #1
99	bne	1b
100	dsb	sy
101
102	mov	pc, lr
103
104ENTRY(armv7_bs_rm_2)
105	add	r0, r1, r2
106	mov	r1, r3
107	ldr	r2, [sp, #0]
108	teq	r2, #0
109	moveq	pc, lr
110
1111:	ldrh	r3, [r0]
112	strh	r3, [r1], #2
113	subs	r2, r2, #1
114	bne	1b
115	dsb	sy
116
117	mov	pc, lr
118
119ENTRY(armv7_bs_rm_4)
120	add	r0, r1, r2
121	mov	r1, r3
122	ldr	r2, [sp, #0]
123	teq	r2, #0
124	moveq	pc, lr
125
1261:	ldr	r3, [r0]
127	str	r3, [r1], #4
128	subs	r2, r2, #1
129	bne	1b
130	dsb	sy
131
132	mov	pc, lr
133
134/*
135 * write multiple
136 */
137
138ENTRY(armv7_bs_wm_1)
139	add	r0, r1, r2
140	mov	r1, r3
141	ldr	r2, [sp, #0]
142	teq	r2, #0
143	moveq	pc, lr
144
1451:	ldrb	r3, [r1], #1
146	strb	r3, [r0]
147	subs	r2, r2, #1
148	bne	1b
149	dsb	sy
150
151	mov	pc, lr
152
153ENTRY(armv7_bs_wm_2)
154	add	r0, r1, r2
155	mov	r1, r3
156	ldr	r2, [sp, #0]
157	teq	r2, #0
158	moveq	pc, lr
159
1601:	ldrh	r3, [r1], #2
161	strh	r3, [r0]
162	subs	r2, r2, #1
163	bne	1b
164	dsb	sy
165
166	mov	pc, lr
167
168ENTRY(armv7_bs_wm_4)
169	add	r0, r1, r2
170	mov	r1, r3
171	ldr	r2, [sp, #0]
172	teq	r2, #0
173	moveq	pc, lr
174
1751:	ldr	r3, [r1], #4
176	str	r3, [r0]
177	subs	r2, r2, #1
178	bne	1b
179	dsb	sy
180
181	mov	pc, lr
182
183/*
184 * read region
185 */
186
187ENTRY(armv7_bs_rr_1)
188	add	r0, r1, r2
189	mov	r1, r3
190	ldr	r2, [sp, #0]
191	teq	r2, #0
192	moveq	pc, lr
193
1941:	ldrb	r3, [r0], #1
195	strb	r3, [r1], #1
196	subs	r2, r2, #1
197	bne	1b
198	dsb	sy
199
200	mov	pc, lr
201
202ENTRY(armv7_bs_rr_2)
203	add	r0, r1, r2
204	mov	r1, r3
205	ldr	r2, [sp, #0]
206	teq	r2, #0
207	moveq	pc, lr
208
2091:	ldrh	r3, [r0], #2
210	strh	r3, [r1], #2
211	subs	r2, r2, #1
212	bne	1b
213	dsb	sy
214
215	mov	pc, lr
216
217ENTRY(armv7_bs_rr_4)
218	add	r0, r1, r2
219	mov	r1, r3
220	ldr	r2, [sp, #0]
221	teq	r2, #0
222	moveq	pc, lr
223
2241:	ldr	r3, [r0], #4
225	str	r3, [r1], #4
226	subs	r2, r2, #1
227	bne	1b
228
229	mov	pc, lr
230
231/*
232 * write region.
233 */
234
235ENTRY(armv7_bs_wr_1)
236	add	r0, r1, r2
237	mov	r1, r3
238	ldr	r2, [sp, #0]
239	teq	r2, #0
240	moveq	pc, lr
241
2421:	ldrb	r3, [r1], #1
243	strb	r3, [r0], #1
244	subs	r2, r2, #1
245	bne	1b
246	dsb	sy
247
248	mov	pc, lr
249
250ENTRY(armv7_bs_wr_2)
251	add	r0, r1, r2
252	mov	r1, r3
253	ldr	r2, [sp, #0]
254	teq	r2, #0
255	moveq	pc, lr
256
2571:	ldrh	r3, [r1], #2
258	strh	r3, [r0], #2
259	subs	r2, r2, #1
260	bne	1b
261	dsb	sy
262
263	mov	pc, lr
264
265ENTRY(armv7_bs_wr_4)
266	add	r0, r1, r2
267	mov	r1, r3
268	ldr	r2, [sp, #0]
269	teq	r2, #0
270	moveq	pc, lr
271
2721:	ldr	r3, [r1], #4
273	str	r3, [r0], #4
274	subs	r2, r2, #1
275	bne	1b
276	dsb	sy
277
278	mov	pc, lr
279
280/*
281 * set region
282 */
283
284ENTRY(armv7_bs_sr_1)
285	add	r0, r1, r2
286	mov	r1, r3
287	ldr	r2, [sp, #0]
288	teq	r2, #0
289	moveq	pc, lr
290
2911:	strb	r1, [r0], #1
292	subs	r2, r2, #1
293	bne	1b
294	dsb	sy
295
296	mov	pc, lr
297
298ENTRY(armv7_bs_sr_2)
299	add	r0, r1, r2
300	mov	r1, r3
301	ldr	r2, [sp, #0]
302	teq	r2, #0
303	moveq	pc, lr
304
3051:	strh	r1, [r0], #2
306	subs	r2, r2, #1
307	bne	1b
308	dsb	sy
309
310	mov	pc, lr
311
312ENTRY(armv7_bs_sr_4)
313	add	r0, r1, r2
314	mov	r1, r3
315	ldr	r2, [sp, #0]
316	teq	r2, #0
317	moveq	pc, lr
318
3191:	str	r1, [r0], #4
320	subs	r2, r2, #1
321	bne	1b
322	dsb	sy
323
324	mov	pc, lr
325
326/*
327 * copy region
328 */
329
330ENTRY(armv7_bs_c_2)
331	add	r0, r1, r2
332	ldr	r2, [sp, #0]
333	add	r1, r2, r3
334	ldr	r2, [sp, #4]
335	teq	r2, #0
336	moveq	pc, lr
337
338	cmp	r0, r1
339	blt	2f
340
3411:	ldrh	r3, [r0], #2
342	strh	r3, [r1], #2
343	subs	r2, r2, #1
344	bne	1b
345	dsb	sy
346
347	mov	pc, lr
348
3492:	add	r0, r0, r2, lsl #1
350	add	r1, r1, r2, lsl #1
351	sub	r0, r0, #2
352	sub	r1, r1, #2
353
3543:	ldrh	r3, [r0], #-2
355	strh	r3, [r1], #-2
356	subs	r2, r2, #1
357	bne	3b
358	dsb	sy
359
360	mov	pc, lr
361