1/* $OpenBSD: bus_space_asm_armv7.S,v 1.5 2016/03/22 23:35:01 patrick Exp $ */ 2/* $NetBSD: bus_space_asm_armv7.S,v 1.3 2003/03/27 19:46:14 mycroft Exp $ */ 3 4/* 5 * Copyright (c) 1997 Causality Limited. 6 * Copyright (c) 1997 Mark Brinicombe. 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by Mark Brinicombe 20 * for the NetBSD Project. 21 * 4. The name of the company nor the name of the author may be used to 22 * endorse or promote products derived from this software without specific 23 * prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 26 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 27 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 */ 37 38#include <arm/asm.h> 39#include <arm/cpuconf.h> 40 41/* 42 * Generic bus_space functions. 43 */ 44 45/* 46 * read single 47 */ 48 49ENTRY(armv7_bs_r_1) 50 dsb sy 51 ldrb r0, [r1, r2] 52 mov pc, lr 53 54ENTRY(armv7_bs_r_2) 55 dsb sy 56 ldrh r0, [r1, r2] 57 mov pc, lr 58 59ENTRY(armv7_bs_r_4) 60 dsb sy 61 ldr r0, [r1, r2] 62 mov pc, lr 63 64/* 65 * write single 66 */ 67 68ENTRY(armv7_bs_w_1) 69 strb r3, [r1, r2] 70 dsb sy 71 mov pc, lr 72 73ENTRY(armv7_bs_w_2) 74 strh r3, [r1, r2] 75 dsb sy 76 mov pc, lr 77 78ENTRY(armv7_bs_w_4) 79 str r3, [r1, r2] 80 dsb sy 81 mov pc, lr 82 83/* 84 * read multiple 85 */ 86 87ENTRY(armv7_bs_rm_1) 88 add r0, r1, r2 89 mov r1, r3 90 ldr r2, [sp, #0] 91 teq r2, #0 92 moveq pc, lr 93 941: ldrb r3, [r0] 95 strb r3, [r1], #1 96 subs r2, r2, #1 97 bne 1b 98 dsb sy 99 100 mov pc, lr 101 102ENTRY(armv7_bs_rm_2) 103 add r0, r1, r2 104 mov r1, r3 105 ldr r2, [sp, #0] 106 teq r2, #0 107 moveq pc, lr 108 1091: ldrh r3, [r0] 110 strh r3, [r1], #2 111 subs r2, r2, #1 112 bne 1b 113 dsb sy 114 115 mov pc, lr 116 117ENTRY(armv7_bs_rm_4) 118 add r0, r1, r2 119 mov r1, r3 120 ldr r2, [sp, #0] 121 teq r2, #0 122 moveq pc, lr 123 1241: ldr r3, [r0] 125 str r3, [r1], #4 126 subs r2, r2, #1 127 bne 1b 128 dsb sy 129 130 mov pc, lr 131 132/* 133 * write multiple 134 */ 135 136ENTRY(armv7_bs_wm_1) 137 add r0, r1, r2 138 mov r1, r3 139 ldr r2, [sp, #0] 140 teq r2, #0 141 moveq pc, lr 142 1431: ldrb r3, [r1], #1 144 strb r3, [r0] 145 subs r2, r2, #1 146 bne 1b 147 dsb sy 148 149 mov pc, lr 150 151ENTRY(armv7_bs_wm_2) 152 add r0, r1, r2 153 mov r1, r3 154 ldr r2, [sp, #0] 155 teq r2, #0 156 moveq pc, lr 157 1581: ldrh r3, [r1], #2 159 strh r3, [r0] 160 subs r2, r2, #1 161 bne 1b 162 dsb sy 163 164 mov pc, lr 165 166ENTRY(armv7_bs_wm_4) 167 add r0, r1, r2 168 mov r1, r3 169 ldr r2, [sp, #0] 170 teq r2, #0 171 moveq pc, lr 172 1731: ldr r3, [r1], #4 174 str r3, [r0] 175 subs r2, r2, #1 176 bne 1b 177 dsb sy 178 179 mov pc, lr 180 181/* 182 * read region 183 */ 184 185ENTRY(armv7_bs_rr_1) 186 add r0, r1, r2 187 mov r1, r3 188 ldr r2, [sp, #0] 189 teq r2, #0 190 moveq pc, lr 191 1921: ldrb r3, [r0], #1 193 strb r3, [r1], #1 194 subs r2, r2, #1 195 bne 1b 196 dsb sy 197 198 mov pc, lr 199 200ENTRY(armv7_bs_rr_2) 201 add r0, r1, r2 202 mov r1, r3 203 ldr r2, [sp, #0] 204 teq r2, #0 205 moveq pc, lr 206 2071: ldrh r3, [r0], #2 208 strh r3, [r1], #2 209 subs r2, r2, #1 210 bne 1b 211 dsb sy 212 213 mov pc, lr 214 215ENTRY(armv7_bs_rr_4) 216 add r0, r1, r2 217 mov r1, r3 218 ldr r2, [sp, #0] 219 teq r2, #0 220 moveq pc, lr 221 2221: ldr r3, [r0], #4 223 str r3, [r1], #4 224 subs r2, r2, #1 225 bne 1b 226 227 mov pc, lr 228 229/* 230 * write region. 231 */ 232 233ENTRY(armv7_bs_wr_1) 234 add r0, r1, r2 235 mov r1, r3 236 ldr r2, [sp, #0] 237 teq r2, #0 238 moveq pc, lr 239 2401: ldrb r3, [r1], #1 241 strb r3, [r0], #1 242 subs r2, r2, #1 243 bne 1b 244 dsb sy 245 246 mov pc, lr 247 248ENTRY(armv7_bs_wr_2) 249 add r0, r1, r2 250 mov r1, r3 251 ldr r2, [sp, #0] 252 teq r2, #0 253 moveq pc, lr 254 2551: ldrh r3, [r1], #2 256 strh r3, [r0], #2 257 subs r2, r2, #1 258 bne 1b 259 dsb sy 260 261 mov pc, lr 262 263ENTRY(armv7_bs_wr_4) 264 add r0, r1, r2 265 mov r1, r3 266 ldr r2, [sp, #0] 267 teq r2, #0 268 moveq pc, lr 269 2701: ldr r3, [r1], #4 271 str r3, [r0], #4 272 subs r2, r2, #1 273 bne 1b 274 dsb sy 275 276 mov pc, lr 277 278/* 279 * set region 280 */ 281 282ENTRY(armv7_bs_sr_1) 283 add r0, r1, r2 284 mov r1, r3 285 ldr r2, [sp, #0] 286 teq r2, #0 287 moveq pc, lr 288 2891: strb r1, [r0], #1 290 subs r2, r2, #1 291 bne 1b 292 dsb sy 293 294 mov pc, lr 295 296ENTRY(armv7_bs_sr_2) 297 add r0, r1, r2 298 mov r1, r3 299 ldr r2, [sp, #0] 300 teq r2, #0 301 moveq pc, lr 302 3031: strh r1, [r0], #2 304 subs r2, r2, #1 305 bne 1b 306 dsb sy 307 308 mov pc, lr 309 310ENTRY(armv7_bs_sr_4) 311 add r0, r1, r2 312 mov r1, r3 313 ldr r2, [sp, #0] 314 teq r2, #0 315 moveq pc, lr 316 3171: str r1, [r0], #4 318 subs r2, r2, #1 319 bne 1b 320 dsb sy 321 322 mov pc, lr 323 324/* 325 * copy region 326 */ 327 328ENTRY(armv7_bs_c_2) 329 add r0, r1, r2 330 ldr r2, [sp, #0] 331 add r1, r2, r3 332 ldr r2, [sp, #4] 333 teq r2, #0 334 moveq pc, lr 335 336 cmp r0, r1 337 blt 2f 338 3391: ldrh r3, [r0], #2 340 strh r3, [r1], #2 341 subs r2, r2, #1 342 bne 1b 343 dsb sy 344 345 mov pc, lr 346 3472: add r0, r0, r2, lsl #1 348 add r1, r1, r2, lsl #1 349 sub r0, r0, #2 350 sub r1, r1, #2 351 3523: ldrh r3, [r0], #-2 353 strh r3, [r1], #-2 354 subs r2, r2, #1 355 bne 3b 356 dsb sy 357 358 mov pc, lr 359