1/* $OpenBSD: irongate.c,v 1.12 2022/03/13 08:04:13 mpi Exp $ */ 2/* $NetBSD: irongate.c,v 1.3 2000/11/29 06:29:10 thorpej Exp $ */ 3 4/*- 5 * Copyright (c) 2000 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Jason R. Thorpe. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33#include <sys/param.h> 34#include <sys/systm.h> 35#include <sys/device.h> 36#include <sys/malloc.h> 37 38#include <machine/autoconf.h> 39#include <machine/rpb.h> 40 41#include <dev/isa/isareg.h> 42#include <dev/isa/isavar.h> 43#include <dev/pci/pcireg.h> 44#include <dev/pci/pcivar.h> 45 46#include <alpha/pci/irongatereg.h> 47#include <alpha/pci/irongatevar.h> 48 49#ifdef API_UP1000 50#include <alpha/pci/pci_up1000.h> 51#endif 52 53int irongate_match(struct device *, void *, void *); 54void irongate_attach(struct device *, struct device *, void *); 55 56const struct cfattach irongate_ca = { 57 sizeof(struct device), irongate_match, irongate_attach, 58}; 59 60int irongate_print(void *, const char *pnp); 61 62struct cfdriver irongate_cd = { 63 NULL, "irongate", DV_DULL, 64}; 65 66/* There can be only one. */ 67struct irongate_config irongate_configuration; 68int irongate_found; 69 70#if 0 71int irongate_bus_get_window(int, int, 72 struct alpha_bus_space_translation *); 73#endif 74 75/* 76 * Set up the chipset's function pointers. 77 */ 78void 79irongate_init(struct irongate_config *icp, int mallocsafe) 80{ 81 pcitag_t tag; 82 pcireg_t reg; 83 84 icp->ic_mallocsafe = mallocsafe; 85 86 /* 87 * Set up PCI configuration space; we can only read the 88 * revision info through configuration space. 89 */ 90 irongate_pci_init(&icp->ic_pc, icp); 91 alpha_pci_chipset = &icp->ic_pc; 92 alpha_pci_chipset->pc_name = "irongate"; 93 alpha_pci_chipset->pc_mem = IRONGATE_MEM_BASE; 94 alpha_pci_chipset->pc_mem = IRONGATE_MEM_BASE; 95 alpha_pci_chipset->pc_bwx = 1; 96 97 tag = pci_make_tag(&icp->ic_pc, 0, IRONGATE_PCIHOST_DEV, 0); 98 99 /* Read the revision. */ 100 reg = irongate_conf_read0(icp, tag, PCI_CLASS_REG); 101 icp->ic_rev = PCI_REVISION(reg); 102 103 if (icp->ic_initted == 0) { 104 /* Don't do these twice, since they set up extents. */ 105 irongate_bus_io_init(&icp->ic_iot, icp); 106 irongate_bus_mem_init(&icp->ic_memt, icp); 107 108#if 0 109 /* Only one each PCI I/O and MEM window. */ 110 alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_IO] = 1; 111 alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_MEM] = 1; 112 113 alpha_bus_get_window = irongate_bus_get_window; 114#endif 115 } 116 117 icp->ic_initted = 1; 118} 119 120int 121irongate_match(struct device *parent, void *match, void *aux) 122{ 123 struct mainbus_attach_args *ma = aux; 124 125 /* Make sure we're looking for an Irongate. */ 126 if (strcmp(ma->ma_name, irongate_cd.cd_name) != 0) 127 return (0); 128 129 if (irongate_found) 130 return (0); 131 132 return (1); 133} 134 135void 136irongate_attach(struct device *parent, struct device *self, void *aux) 137{ 138 struct irongate_config *icp; 139 struct pcibus_attach_args pba; 140 141 /* Note that we've attached the chipset; can't have 2 Irongates. */ 142 irongate_found = 1; 143 144 /* 145 * Set up the chipset's info; done once at console init time 146 * (maybe), but we must do it here as well to take care of things 147 * that need to use memory allocation. 148 */ 149 icp = &irongate_configuration; 150 irongate_init(icp, 1); 151 152 printf(": rev. %d\n", icp->ic_rev); 153 154 irongate_dma_init(icp); 155 156 /* 157 * Do PCI memory initialization that needs to be deferred until 158 * malloc is safe. 159 */ 160 irongate_bus_mem_init2(&icp->ic_memt, icp); 161 162 switch (cputype) { 163#ifdef API_UP1000 164 case ST_API_NAUTILUS: 165 pci_up1000_pickintr(icp); 166 break; 167#endif 168 169 default: 170 panic("irongate_attach: shouldn't be here, really..."); 171 } 172 173 bzero(&pba, sizeof(pba)); 174 pba.pba_busname = "pci"; 175 pba.pba_iot = &icp->ic_iot; 176 pba.pba_memt = &icp->ic_memt; 177 pba.pba_dmat = 178 alphabus_dma_get_tag(&icp->ic_dmat_pci, ALPHA_BUS_PCI); 179 pba.pba_pc = &icp->ic_pc; 180 pba.pba_domain = pci_ndomains++; 181 pba.pba_bus = 0; 182#ifdef notyet 183 pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED | 184 PCI_FLAGS_MRL_OKAY | PCI_FLAGS_MRM_OKAY | PCI_FLAGS_MWI_OKAY; 185#endif 186 config_found(self, &pba, irongate_print); 187} 188 189int 190irongate_print(void *aux, const char *pnp) 191{ 192 struct pcibus_attach_args *pba = aux; 193 194 /* Only PCIs can attach to Irongates; easy. */ 195 if (pnp != NULL) 196 printf("%s at %s", pba->pba_busname, pnp); 197 printf(" bus %d", pba->pba_bus); 198 return (UNCONF); 199} 200 201#if 0 202int 203irongate_bus_get_window(int type, int window, 204 struct alpha_bus_space_translation *abst) 205{ 206 struct irongate_config *icp = &irongate_configuration; 207 bus_space_tag_t st; 208 int error; 209 210 switch (type) { 211 case ALPHA_BUS_TYPE_PCI_IO: 212 st = &icp->ic_iot; 213 break; 214 215 case ALPHA_BUS_TYPE_PCI_MEM: 216 st = &icp->ic_memt; 217 break; 218 219 default: 220 panic("irongate_bus_get_window"); 221 } 222 223 error = alpha_bus_space_get_window(st, window, abst); 224 if (error) 225 return (error); 226 227 abst->abst_sys_start = IRONGATE_PHYSADDR(abst->abst_sys_start); 228 abst->abst_sys_end = IRONGATE_PHYSADDR(abst->abst_sys_end); 229 230 return (0); 231} 232#endif 233